2019-06-14 11:31:17 +00:00
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; SameBoy SGB bootstrap ROM
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2022-04-18 16:09:16 +00:00
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INCLUDE "hardware.inc"
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; Registers used only by the boot ROM
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DEF rBANK EQU $FF50
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2018-11-10 23:16:32 +00:00
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SECTION "BootCode", ROM0[$0]
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Start:
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; Init stack pointer
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ld sp, $fffe
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; Clear memory VRAM
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ld hl, $8000
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.clearVRAMLoop
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ldi [hl], a
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bit 5, h
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jr z, .clearVRAMLoop
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; Init Audio
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ld a, $80
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2022-04-18 16:09:16 +00:00
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ldh [rNR52], a
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ldh [rNR11], a
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2018-11-10 23:16:32 +00:00
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ld a, $f3
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2022-04-18 16:09:16 +00:00
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ldh [rNR12], a
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ldh [rNR51], a
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2018-11-10 23:16:32 +00:00
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ld a, $77
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2022-04-18 16:09:16 +00:00
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ldh [rNR50], a
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2018-11-10 23:16:32 +00:00
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; Init BG palette to white
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ld a, $0
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2022-04-18 16:09:16 +00:00
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ldh [rBGP], a
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2018-11-10 23:16:32 +00:00
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; Load logo from ROM.
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; A nibble represents a 4-pixels line, 2 bytes represent a 4x4 tile, scaled to 8x8.
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; Tiles are ordered left to right, top to bottom.
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ld de, $104 ; Logo start
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ld hl, $8010 ; This is where we load the tiles in VRAM
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.loadLogoLoop
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ld a, [de] ; Read 2 rows
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ld b, a
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call DoubleBitsAndWriteRow
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call DoubleBitsAndWriteRow
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inc de
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ld a, e
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xor $34 ; End of logo
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jr nz, .loadLogoLoop
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; Load trademark symbol
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ld de, TrademarkSymbol
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ld c,$08
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.loadTrademarkSymbolLoop:
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ld a,[de]
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inc de
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ldi [hl],a
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inc hl
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dec c
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jr nz, .loadTrademarkSymbolLoop
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; Set up tilemap
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ld a,$19 ; Trademark symbol
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ld [$9910], a ; ... put in the superscript position
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ld hl,$992f ; Bottom right corner of the logo
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ld c,$c ; Tiles in a logo row
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.tilemapLoop
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dec a
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jr z, .tilemapDone
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ldd [hl], a
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dec c
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jr nz, .tilemapLoop
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ld l,$0f ; Jump to top row
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jr .tilemapLoop
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.tilemapDone
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; Turn on LCD
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ld a, $91
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2022-04-18 16:09:16 +00:00
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ldh [rLCDC], a
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2018-11-10 23:16:32 +00:00
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ld a, $f1 ; Packet magic, increases by 2 for every packet
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2022-04-18 16:09:16 +00:00
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ldh [_HRAM], a
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2018-11-10 23:16:32 +00:00
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ld hl, $104 ; Header start
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xor a
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ld c, a ; JOYP
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.sendCommand
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xor a
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2019-06-01 11:29:46 +00:00
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ld [c], a
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2018-11-10 23:16:32 +00:00
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ld a, $30
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2019-06-01 11:29:46 +00:00
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ld [c], a
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2018-11-10 23:16:32 +00:00
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2022-04-18 16:09:16 +00:00
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ldh a, [_HRAM]
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2018-11-10 23:16:32 +00:00
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call SendByte
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push hl
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ld b, $e
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ld d, 0
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.checksumLoop
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call ReadHeaderByte
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add d
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ld d, a
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dec b
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jr nz, .checksumLoop
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; Send checksum
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call SendByte
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pop hl
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ld b, $e
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.sendLoop
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call ReadHeaderByte
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call SendByte
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dec b
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jr nz, .sendLoop
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; Done bit
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ld a, $20
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2019-06-01 11:29:46 +00:00
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ld [c], a
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2018-11-10 23:16:32 +00:00
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ld a, $30
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2019-06-01 11:29:46 +00:00
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ld [c], a
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2018-11-10 23:16:32 +00:00
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; Update command
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2022-04-18 16:09:16 +00:00
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ldh a, [_HRAM]
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2018-11-10 23:16:32 +00:00
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add 2
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2022-04-18 16:09:16 +00:00
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ldh [_HRAM], a
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2018-11-10 23:16:32 +00:00
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ld a, $58
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cp l
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jr nz, .sendCommand
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; Write to sound registers for DMG compatibility
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ld c, $13
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ld a, $c1
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2019-06-01 11:29:46 +00:00
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ld [c], a
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2018-11-10 23:16:32 +00:00
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inc c
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ld a, 7
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2019-06-01 11:29:46 +00:00
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ld [c], a
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2018-11-10 23:16:32 +00:00
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; Init BG palette
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ld a, $fc
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2022-04-18 16:09:16 +00:00
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ldh [rBGP], a
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2018-11-10 23:16:32 +00:00
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; Set registers to match the original SGB boot
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2018-12-01 15:28:57 +00:00
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IF DEF(SGB2)
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ld a, $FF
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ELSE
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2018-11-10 23:16:32 +00:00
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ld a, 1
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2018-12-01 15:28:57 +00:00
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ENDC
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2018-11-10 23:16:32 +00:00
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ld hl, $c060
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; Boot the game
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jp BootGame
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ReadHeaderByte:
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ld a, $4F
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cp l
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jr c, .zero
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ld a, [hli]
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ret
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.zero:
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inc hl
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xor a
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ret
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SendByte:
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ld e, a
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ld d, 8
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.loop
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ld a, $10
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rr e
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jr c, .zeroBit
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add a ; 10 -> 20
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.zeroBit
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2019-06-01 11:29:46 +00:00
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ld [c], a
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2018-11-10 23:16:32 +00:00
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ld a, $30
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2019-06-01 11:29:46 +00:00
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ld [c], a
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2018-11-10 23:16:32 +00:00
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dec d
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ret z
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jr .loop
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DoubleBitsAndWriteRow:
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; Double the most significant 4 bits, b is shifted by 4
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ld a, 4
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ld c, 0
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.doubleCurrentBit
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sla b
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push af
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rl c
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pop af
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rl c
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dec a
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jr nz, .doubleCurrentBit
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ld a, c
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; Write as two rows
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ldi [hl], a
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inc hl
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ldi [hl], a
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inc hl
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ret
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WaitFrame:
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push hl
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ld hl, $FF0F
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res 0, [hl]
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.wait
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bit 0, [hl]
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jr z, .wait
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pop hl
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ret
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TrademarkSymbol:
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db $3c,$42,$b9,$a5,$b9,$a5,$42,$3c
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SECTION "BootGame", ROM0[$fe]
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BootGame:
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2022-04-18 16:09:16 +00:00
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ldh [rBANK], a
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