LCDOff behavior, basic halt/stop behavior
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ad1f019893
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1a41957b3c
@ -437,16 +437,14 @@ void GB_lcd_off(GB_gameboy_t *gb)
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gb->display_cycles = 0;
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/* When the LCD is disabled, state is constant */
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if (gb->hdma_on_hblank && (gb->io_registers[GB_IO_STAT] & 3)) {
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gb->hdma_on = true;
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}
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/* When the LCD is off, LY is 0 and STAT mode is 0. */
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gb->io_registers[GB_IO_LY] = 0;
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gb->io_registers[GB_IO_STAT] &= ~3;
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if (gb->hdma_on_hblank) {
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gb->hdma_on_hblank = false;
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gb->hdma_on = false;
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/* Todo: is this correct? */
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gb->hdma_steps_left = 0xff;
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}
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gb->oam_read_blocked = false;
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gb->vram_read_blocked = false;
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@ -696,7 +694,7 @@ static inline uint8_t vram_read(GB_gameboy_t *gb, uint16_t addr)
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if (unlikely(gb->vram_ppu_blocked)) {
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return 0xFF;
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}
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if (unlikely(gb->hdma_on)) {
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if (unlikely(gb->hdma_in_progress)) {
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gb->addr_for_hdma_conflict = addr;
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return 0;
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}
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@ -779,6 +779,7 @@ struct GB_gameboy_internal_s {
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bool tile_sel_glitch;
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bool disable_oam_corruption; // For safe memory reads
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bool in_dma_read;
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bool hdma_in_progress;
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uint16_t addr_for_hdma_conflict;
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GB_gbs_header_t gbs_header;
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@ -1736,6 +1736,7 @@ void GB_hdma_run(GB_gameboy_t *gb)
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while (gb->hdma_on) {
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uint8_t byte = gb->hdma_open_bus;
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gb->addr_for_hdma_conflict = 0xFFFF;
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gb->hdma_in_progress = true; // TODO: timing? (affects VRAM reads)
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GB_advance_cycles(gb, cycles);
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if (gb->hdma_current_src < 0x8000 ||
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@ -1773,6 +1774,7 @@ void GB_hdma_run(GB_gameboy_t *gb)
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}
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}
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}
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gb->hdma_in_progress = false; // TODO: timing? (affects VRAM reads)
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if (!gb->cgb_double_speed) {
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GB_advance_cycles(gb, 2);
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}
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@ -1580,9 +1580,6 @@ static opcode_t *opcodes[256] = {
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};
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void GB_cpu_run(GB_gameboy_t *gb)
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{
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if (unlikely(gb->hdma_on && (gb->stopped || gb->halted))) {
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GB_hdma_run(gb);
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}
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if (gb->stopped) {
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GB_timing_sync(gb);
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GB_advance_cycles(gb, 4);
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@ -1686,9 +1683,6 @@ void GB_cpu_run(GB_gameboy_t *gb)
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}
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opcodes[opcode](gb, opcode);
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}
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else if (gb->hdma_on) {
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GB_hdma_run(gb);
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}
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flush_pending_cycles(gb);
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}
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