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LCDOff behavior, basic halt/stop behavior

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This commit is contained in:
Lior Halphon 2022-01-31 01:02:31 +02:00
parent ad1f019893
commit 1a41957b3c
4 changed files with 9 additions and 14 deletions
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12
Core/display.c
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@ -437,16 +437,14 @@ void GB_lcd_off(GB_gameboy_t *gb)
gb->display_cycles = 0; gb->display_cycles = 0;
/* When the LCD is disabled, state is constant */ /* When the LCD is disabled, state is constant */
if (gb->hdma_on_hblank && (gb->io_registers[GB_IO_STAT] & 3)) {
gb->hdma_on = true;
}
/* When the LCD is off, LY is 0 and STAT mode is 0. */ /* When the LCD is off, LY is 0 and STAT mode is 0. */
gb->io_registers[GB_IO_LY] = 0; gb->io_registers[GB_IO_LY] = 0;
gb->io_registers[GB_IO_STAT] &= ~3; gb->io_registers[GB_IO_STAT] &= ~3;
if (gb->hdma_on_hblank) {
gb->hdma_on_hblank = false;
gb->hdma_on = false;
/* Todo: is this correct? */
gb->hdma_steps_left = 0xff;
}
gb->oam_read_blocked = false; gb->oam_read_blocked = false;
gb->vram_read_blocked = false; gb->vram_read_blocked = false;
@ -696,7 +694,7 @@ static inline uint8_t vram_read(GB_gameboy_t *gb, uint16_t addr)
if (unlikely(gb->vram_ppu_blocked)) { if (unlikely(gb->vram_ppu_blocked)) {
return 0xFF; return 0xFF;
} }
if (unlikely(gb->hdma_on)) { if (unlikely(gb->hdma_in_progress)) {
gb->addr_for_hdma_conflict = addr; gb->addr_for_hdma_conflict = addr;
return 0; return 0;
} }

1
Core/gb.h
View File

@ -779,6 +779,7 @@ struct GB_gameboy_internal_s {
bool tile_sel_glitch; bool tile_sel_glitch;
bool disable_oam_corruption; // For safe memory reads bool disable_oam_corruption; // For safe memory reads
bool in_dma_read; bool in_dma_read;
bool hdma_in_progress;
uint16_t addr_for_hdma_conflict; uint16_t addr_for_hdma_conflict;
GB_gbs_header_t gbs_header; GB_gbs_header_t gbs_header;

2
Core/memory.c
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@ -1736,6 +1736,7 @@ void GB_hdma_run(GB_gameboy_t *gb)
while (gb->hdma_on) { while (gb->hdma_on) {
uint8_t byte = gb->hdma_open_bus; uint8_t byte = gb->hdma_open_bus;
gb->addr_for_hdma_conflict = 0xFFFF; gb->addr_for_hdma_conflict = 0xFFFF;
gb->hdma_in_progress = true; // TODO: timing? (affects VRAM reads)
GB_advance_cycles(gb, cycles); GB_advance_cycles(gb, cycles);
if (gb->hdma_current_src < 0x8000 || if (gb->hdma_current_src < 0x8000 ||
@ -1773,6 +1774,7 @@ void GB_hdma_run(GB_gameboy_t *gb)
} }
} }
} }
gb->hdma_in_progress = false; // TODO: timing? (affects VRAM reads)
if (!gb->cgb_double_speed) { if (!gb->cgb_double_speed) {
GB_advance_cycles(gb, 2); GB_advance_cycles(gb, 2);
} }

6
Core/sm83_cpu.c
View File

@ -1580,9 +1580,6 @@ static opcode_t *opcodes[256] = {
}; };
void GB_cpu_run(GB_gameboy_t *gb) void GB_cpu_run(GB_gameboy_t *gb)
{ {
if (unlikely(gb->hdma_on && (gb->stopped || gb->halted))) {
GB_hdma_run(gb);
}
if (gb->stopped) { if (gb->stopped) {
GB_timing_sync(gb); GB_timing_sync(gb);
GB_advance_cycles(gb, 4); GB_advance_cycles(gb, 4);
@ -1686,9 +1683,6 @@ void GB_cpu_run(GB_gameboy_t *gb)
} }
opcodes[opcode](gb, opcode); opcodes[opcode](gb, opcode);
} }
else if (gb->hdma_on) {
GB_hdma_run(gb);
}
flush_pending_cycles(gb); flush_pending_cycles(gb);
} }