Reimplemented delayed/future interrupts, currently correct only for CGB.
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742c9e95d3
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1e90400916
@ -305,6 +305,9 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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uint8_t vram_blocking_rush = gb->is_cgb? 0 : 4;
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for (; cycles; cycles -= atomic_increase) {
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gb->io_registers[GB_IO_IF] |= gb->future_interrupts & 3;
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gb->future_interrupts &= ~3;
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bool previous_stat_interrupt_line = gb->stat_interrupt_line;
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gb->stat_interrupt_line = false;
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@ -351,7 +354,12 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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else if (gb->display_cycles == LINES * LINE_LENGTH + stat_delay) {
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gb->io_registers[GB_IO_STAT] &= ~3;
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gb->io_registers[GB_IO_STAT] |= 1;
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gb->io_registers[GB_IO_IF] |= 1;
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if (gb->is_cgb) {
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gb->future_interrupts |= 1;
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}
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else {
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gb->io_registers[GB_IO_IF] |= 1;
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}
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/* Entering VBlank state triggers the OAM interrupt. In CGB, it happens 4 cycles earlier */
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if (gb->io_registers[GB_IO_STAT] & 0x20 && !gb->is_cgb) {
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@ -573,7 +581,12 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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}
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if (gb->stat_interrupt_line && !previous_stat_interrupt_line) {
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gb->io_registers[GB_IO_IF] |= 2;
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if (gb->is_cgb) {
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gb->future_interrupts |= 2;
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}
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else {
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gb->io_registers[GB_IO_IF] |= 2;
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}
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}
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}
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@ -332,9 +332,8 @@ struct GB_gameboy_internal_s {
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GB_PADDING(uint16_t, serial_cycles);
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uint16_t serial_cycles; /* This field changed its meaning in v0.10 */
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uint16_t serial_length;
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bool dont_delay_timer_interrupt; /* If the timer glitch causes a TIMA overflow, it causes the timer to overflow
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with different timing, so the triggered interrupt is not delayed.
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Todo: needs test ROM. */
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uint8_t future_interrupts; /* Interrupts can occur in any T-cycle. Some timings result in different interrupt
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timing when the CPU is in halt mode, and might also affect the DI instruction. */
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);
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/* APU */
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@ -136,7 +136,7 @@ static uint8_t read_high_memory(GB_gameboy_t *gb, uint16_t addr)
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if (addr < 0xFF80) {
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switch (addr & 0xFF) {
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case GB_IO_IF:
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return gb->io_registers[GB_IO_IF] | 0xE0;
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return gb->io_registers[GB_IO_IF] | 0xE0 | gb->future_interrupts;
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case GB_IO_TAC:
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return gb->io_registers[GB_IO_TAC] | 0xF8;
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case GB_IO_STAT:
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@ -416,8 +416,9 @@ static void write_high_memory(GB_gameboy_t *gb, uint16_t addr, uint8_t value)
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case GB_IO_WX:
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GB_window_related_write(gb, addr & 0xFF, value);
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break;
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case GB_IO_SCX:
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case GB_IO_IF:
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gb->future_interrupts = 0;
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case GB_IO_SCX:
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case GB_IO_SCY:
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case GB_IO_LYC:
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case GB_IO_BGP:
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@ -82,14 +82,13 @@ static void GB_ir_run(GB_gameboy_t *gb)
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static void advance_tima_state_machine(GB_gameboy_t *gb)
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{
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gb->io_registers[GB_IO_IF] |= gb->future_interrupts & 4;
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gb->future_interrupts &= ~4;
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if (gb->tima_reload_state == GB_TIMA_RELOADED) {
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gb->tima_reload_state = GB_TIMA_RUNNING;
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}
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else if (gb->tima_reload_state == GB_TIMA_RELOADING) {
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gb->io_registers[GB_IO_IF] |= 4;
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if (!gb->dont_delay_timer_interrupt) {
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// Todo
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}
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gb->future_interrupts |= 4;
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gb->tima_reload_state = GB_TIMA_RELOADED;
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}
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}
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@ -157,7 +156,6 @@ static void increase_tima(GB_gameboy_t *gb)
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{
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gb->io_registers[GB_IO_TIMA]++;
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if (gb->io_registers[GB_IO_TIMA] == 0) {
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gb->dont_delay_timer_interrupt = false;
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gb->io_registers[GB_IO_TIMA] = gb->io_registers[GB_IO_TMA];
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gb->tima_reload_state = GB_TIMA_RELOADING;
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}
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@ -197,7 +195,6 @@ void GB_emulate_timer_glitch(GB_gameboy_t *gb, uint8_t old_tac, uint8_t new_tac)
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/* And now either the timer must be disabled, or the new bit used for overflow testing be 0. */
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if (!(new_tac & 4) || gb->div_cycles & (new_clocks >> 1)) {
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increase_tima(gb);
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gb->dont_delay_timer_interrupt = true;
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}
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}
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}
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@ -1338,6 +1338,10 @@ void GB_cpu_run(GB_gameboy_t *gb)
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{
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gb->vblank_just_occured = false;
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uint8_t interrupt_queue = gb->interrupt_enable & gb->io_registers[GB_IO_IF] & 0x1F;
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if (!gb->halted) {
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interrupt_queue |= gb->future_interrupts & gb->interrupt_enable;
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}
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if (interrupt_queue) {
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gb->halted = false;
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