diff --git a/Core/gb.h b/Core/gb.h
index 6a22b2f..5330461 100644
--- a/Core/gb.h
+++ b/Core/gb.h
@@ -436,6 +436,7 @@ struct GB_gameboy_internal_s {
         bool dma_ppu_vram_conflict;
         uint16_t dma_ppu_vram_conflict_addr;
         uint8_t hdma_open_bus; /* Required to emulate HDMA reads from Exxx */
+        bool allow_hdma_on_wake;
     )
     
     /* MBC */
diff --git a/Core/sm83_cpu.c b/Core/sm83_cpu.c
index 6d22867..7fad1ab 100644
--- a/Core/sm83_cpu.c
+++ b/Core/sm83_cpu.c
@@ -360,6 +360,7 @@ static void enter_stop_mode(GB_gameboy_t *gb)
         gb->div_cycles = -4; // Emulate the CPU-side DIV-reset signal being held
     }
     gb->stopped = true;
+    gb->allow_hdma_on_wake = (gb->io_registers[GB_IO_STAT] & 3);
     gb->oam_ppu_blocked = !gb->oam_read_blocked;
     gb->vram_ppu_blocked = !gb->vram_read_blocked;
     gb->cgb_palettes_ppu_blocked = !gb->cgb_palettes_blocked;
@@ -368,6 +369,9 @@ static void enter_stop_mode(GB_gameboy_t *gb)
 static void leave_stop_mode(GB_gameboy_t *gb)
 {
     gb->stopped = false;
+    if (gb->hdma_on_hblank && (gb->io_registers[GB_IO_STAT] & 3) == 0 && gb->allow_hdma_on_wake) {
+        gb->hdma_on = true;
+    }
     // TODO: verify this
     gb->dma_cycles = 4;
     GB_dma_run(gb);
@@ -437,6 +441,7 @@ static void stop(GB_gameboy_t *gb, uint8_t opcode)
             GB_dma_run(gb);
             gb->halted = true;
             gb->just_halted = true;
+            gb->allow_hdma_on_wake = (gb->io_registers[GB_IO_STAT] & 3);
         }
         else {
             gb->speed_switch_halt_countdown = 0;
@@ -1038,6 +1043,7 @@ static void halt(GB_gameboy_t *gb, uint8_t opcode)
     }
     else {
         gb->halted = true;
+        gb->allow_hdma_on_wake = (gb->io_registers[GB_IO_STAT] & 3);
     }
     gb->just_halted = true;
 }
@@ -1631,6 +1637,9 @@ void GB_cpu_run(GB_gameboy_t *gb)
     /* Wake up from HALT mode without calling interrupt code. */
     if (gb->halted && !effective_ime && interrupt_queue) {
         gb->halted = false;
+        if (gb->hdma_on_hblank && (gb->io_registers[GB_IO_STAT] & 3) == 0 && gb->allow_hdma_on_wake) {
+            gb->hdma_on = true;
+        }
         gb->dma_cycles = 4;
         GB_dma_run(gb);
         gb->speed_switch_halt_countdown = 0;
@@ -1639,6 +1648,9 @@ void GB_cpu_run(GB_gameboy_t *gb)
     /* Call interrupt */
     else if (effective_ime && interrupt_queue) {
         gb->halted = false;
+        if (gb->hdma_on_hblank && (gb->io_registers[GB_IO_STAT] & 3) == 0 && gb->allow_hdma_on_wake) {
+            gb->hdma_on = true;
+        }
         // TODO: verify the timing!
         gb->dma_cycles = 4;
         GB_dma_run(gb);