GDMA/PPU conflicts
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@ -696,7 +696,12 @@ static inline uint8_t vram_read(GB_gameboy_t *gb, uint16_t addr)
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if (unlikely(gb->vram_ppu_blocked)) {
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if (unlikely(gb->vram_ppu_blocked)) {
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return 0xFF;
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return 0xFF;
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}
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}
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if (unlikely(gb->dma_current_dest <= 0xa0 && gb->dma_current_dest > 0 && (gb->dma_current_src & 0xE000) == 0x8000)) { // TODO: what happens in the last and first M cycles?
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if (unlikely(gb->hdma_on)) {
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gb->addr_for_hdma_conflict = addr;
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return 0;
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}
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// TODO: what if both?
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else if (unlikely(gb->dma_current_dest <= 0xa0 && gb->dma_current_dest > 0 && (gb->dma_current_src & 0xE000) == 0x8000)) { // TODO: what happens in the last and first M cycles?
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// DMAing from VRAM!
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// DMAing from VRAM!
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/* TODO: AGS has its own, very different pattern, but AGS is not currently a supported model */
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/* TODO: AGS has its own, very different pattern, but AGS is not currently a supported model */
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/* TODO: Research this when researching odd modes */
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/* TODO: Research this when researching odd modes */
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@ -776,6 +776,7 @@ struct GB_gameboy_internal_s {
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bool tile_sel_glitch;
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bool tile_sel_glitch;
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bool disable_oam_corruption; // For safe memory reads
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bool disable_oam_corruption; // For safe memory reads
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bool in_dma_read;
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bool in_dma_read;
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uint16_t addr_for_hdma_conflict;
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GB_gbs_header_t gbs_header;
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GB_gbs_header_t gbs_header;
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)
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)
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@ -1735,17 +1735,37 @@ void GB_hdma_run(GB_gameboy_t *gb)
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if (gb->model < GB_MODEL_CGB_D || gb->pc > 0x8000) {
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if (gb->model < GB_MODEL_CGB_D || gb->pc > 0x8000) {
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gb->hdma_open_bus = 0xFF;
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gb->hdma_open_bus = 0xFF;
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}
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}
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GB_advance_cycles(gb, 4);
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gb->addr_for_hdma_conflict = 0xFFFF;
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gb->hdma_current_dest &= 0x1FFF;
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uint16_t vram_base = gb->cgb_vram_bank? 0x2000 : 0;
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GB_advance_cycles(gb, cycles);
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while (gb->hdma_on) {
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while (gb->hdma_on) {
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uint8_t byte = gb->hdma_open_bus;
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uint8_t byte = gb->hdma_open_bus;
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gb->addr_for_hdma_conflict = 0xFFFF;
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GB_advance_cycles(gb, cycles);
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if (gb->hdma_current_src < 0x8000 ||
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if (gb->hdma_current_src < 0x8000 ||
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(gb->hdma_current_src & 0xE000) == 0xC000 ||
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(gb->hdma_current_src & 0xE000) == 0xC000 ||
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(gb->hdma_current_src & 0xE000) == 0xA000) {
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(gb->hdma_current_src & 0xE000) == 0xA000) {
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byte = GB_read_memory(gb, gb->hdma_current_src);
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byte = GB_read_memory(gb, gb->hdma_current_src);
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}
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}
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gb->hdma_current_src++;
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gb->hdma_current_src++;
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GB_write_memory(gb, 0x8000 | (gb->hdma_current_dest++ & 0x1FFF), byte);
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if (gb->addr_for_hdma_conflict == 0xFFFF /* || gb->model == GB_MODEL_AGS */) {
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GB_advance_cycles(gb, cycles);
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gb->vram[vram_base + gb->hdma_current_dest++] = byte;
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}
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else {
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if (gb->model == GB_MODEL_CGB_E || gb->cgb_double_speed) {
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/*
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These corruptions revision (unit?) specific in single speed. They happen only on my CGB-E.
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*/
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gb->addr_for_hdma_conflict &= 0x1FFF;
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// Can't write to even bitmap bytes in single speed mode
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if (gb->cgb_double_speed || gb->addr_for_hdma_conflict >= 0x1900 || (gb->addr_for_hdma_conflict & 1)) {
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gb->vram[vram_base + (gb->hdma_current_dest & gb->addr_for_hdma_conflict)] = byte;
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}
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}
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gb->hdma_current_dest++;
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}
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gb->hdma_open_bus = 0xFF;
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gb->hdma_open_bus = 0xFF;
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if ((gb->hdma_current_dest & 0xf) == 0) {
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if ((gb->hdma_current_dest & 0xf) == 0) {
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@ -1759,4 +1779,7 @@ void GB_hdma_run(GB_gameboy_t *gb)
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}
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}
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}
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}
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}
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}
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if (!gb->cgb_double_speed) {
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GB_advance_cycles(gb, 2);
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}
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}
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}
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