From 4541efe86ab169cd6dc9895e44f7d830ff8e3c02 Mon Sep 17 00:00:00 2001 From: Lior Halphon Date: Sat, 29 Jun 2019 14:03:42 +0300 Subject: [PATCH] =?UTF-8?q?Fixed=20a=20bug=20that=20prevented=20writing=20?= =?UTF-8?q?to=20the=20wave=20RAM,=20as=20well=20as=20a=20bug=20where=20the?= =?UTF-8?q?=20wave=20RAM=20was=20treated=20as=20zeros=20despite=20not=20be?= =?UTF-8?q?ing=20zero=E2=80=99d=20out?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- Core/apu.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/Core/apu.c b/Core/apu.c index 5e975cb..ee58138 100644 --- a/Core/apu.c +++ b/Core/apu.c @@ -506,6 +506,11 @@ void GB_apu_run(GB_gameboy_t *gb) void GB_apu_init(GB_gameboy_t *gb) { memset(&gb->apu, 0, sizeof(gb->apu)); + /* Restore the wave form */ + for (unsigned reg = GB_IO_WAV_START; reg <= GB_IO_WAV_END; reg++) { + gb->apu.wave_channel.wave_form[(reg - GB_IO_WAV_START) * 2] = gb->io_registers[reg] >> 4; + gb->apu.wave_channel.wave_form[(reg - GB_IO_WAV_START) * 2 + 1] = gb->io_registers[reg] & 0xF; + } gb->apu.lf_div = 1; /* APU glitch: When turning the APU on while DIV's bit 4 (or 5 in double speed mode) is on, the first DIV/APU event is skipped. */ @@ -556,14 +561,14 @@ uint8_t GB_apu_read(GB_gameboy_t *gb, uint8_t reg) void GB_apu_write(GB_gameboy_t *gb, uint8_t reg, uint8_t value) { - if (!gb->apu.global_enable && reg != GB_IO_NR52 && (GB_is_cgb(gb) || - ( - reg != GB_IO_NR11 && - reg != GB_IO_NR21 && - reg != GB_IO_NR31 && - reg != GB_IO_NR41 - ) - )) { + if (!gb->apu.global_enable && reg != GB_IO_NR52 && reg < GB_IO_WAV_START && (GB_is_cgb(gb) || + ( + reg != GB_IO_NR11 && + reg != GB_IO_NR21 && + reg != GB_IO_NR31 && + reg != GB_IO_NR41 + ) + )) { return; }