From 4904277f0db816aadcd534899580f2fe6a530662 Mon Sep 17 00:00:00 2001 From: Lior Halphon Date: Sat, 1 Oct 2016 22:10:44 +0300 Subject: [PATCH] Corrected behavior of palette registers in DMG mode. This affected a broken Game & Watch Gallery 2 ROM that was previously used in the automation test. --- Core/memory.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/Core/memory.c b/Core/memory.c index 819e4d0..9bc8809 100644 --- a/Core/memory.c +++ b/Core/memory.c @@ -197,7 +197,7 @@ static uint8_t read_high_memory(GB_gameboy_t *gb, uint16_t addr) case GB_IO_BGPI: case GB_IO_OBPI: - if (!gb->is_cgb) { + if (!gb->cgb_mode && gb->boot_rom_finished) { return 0xFF; } return gb->io_registers[addr & 0xFF] | 0x40; @@ -205,7 +205,7 @@ static uint8_t read_high_memory(GB_gameboy_t *gb, uint16_t addr) case GB_IO_BGPD: case GB_IO_OBPD: { - if (!gb->is_cgb) { + if (!gb->cgb_mode && gb->boot_rom_finished) { return 0xFF; } uint8_t index_reg = (addr & 0xFF) - 1; @@ -479,14 +479,16 @@ static void write_high_memory(GB_gameboy_t *gb, uint16_t addr, uint8_t value) case GB_IO_BGPI: case GB_IO_OBPI: - if (!gb->is_cgb) { + if (!gb->cgb_mode && gb->boot_rom_finished) { return; } gb->io_registers[addr & 0xFF] = value; return; case GB_IO_BGPD: case GB_IO_OBPD: - if (!gb->is_cgb) { + if (!gb->cgb_mode && gb->boot_rom_finished) { + /* Todo: Due to the behavior of a broken Game & Watch Gallery 2 ROM on a real CGB. A proper test ROM + is required. */ return; } uint8_t index_reg = (addr & 0xFF) - 1;