It's not verified because it's wrong
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6ffe924637
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59dfb1a85a
@ -285,10 +285,10 @@ static uint8_t read_mbc_rom(GB_gameboy_t *gb, uint16_t addr)
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static uint8_t read_vram(GB_gameboy_t *gb, uint16_t addr)
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{
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GB_display_sync(gb);
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if (gb->vram_read_blocked) {
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if (unlikely(gb->vram_read_blocked)) {
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return 0xFF;
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}
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if (gb->display_state == 22 && GB_is_cgb(gb) && !gb->cgb_double_speed) {
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if (unlikely(gb->display_state == 22 && GB_is_cgb(gb) && !gb->cgb_double_speed)) {
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if (addr & 0x1000) {
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addr = gb->last_tile_index_address;
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}
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@ -882,23 +882,10 @@ static void write_mbc(GB_gameboy_t *gb, uint16_t addr, uint8_t value)
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static void write_vram(GB_gameboy_t *gb, uint16_t addr, uint8_t value)
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{
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GB_display_sync(gb);
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if (gb->vram_write_blocked) {
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if (unlikely(gb->vram_write_blocked)) {
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//GB_log(gb, "Wrote %02x to %04x (VRAM) during mode 3\n", value, addr);
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return;
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}
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/* TODO: not verified */
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if (gb->display_state == 22 && GB_is_cgb(gb) && !gb->cgb_double_speed) {
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if (addr & 0x1000) {
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addr = gb->last_tile_index_address;
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}
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else if (gb->last_tile_data_address & 0x1000) {
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/* TODO: This is case is more complicated then the rest and differ between revisions
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It's probably affected by how VRAM is layed out, might be easier after a decap is done */
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}
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else {
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addr = gb->last_tile_data_address;
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}
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}
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gb->vram[(addr & 0x1FFF) + (gb->cgb_vram_bank? 0x2000 : 0)] = value;
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}
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