From 6a8db89ae5f6ed01c7f977c8c7037a0ff6fa1325 Mon Sep 17 00:00:00 2001 From: Lior Halphon Date: Sat, 5 Feb 2022 14:52:09 +0200 Subject: [PATCH] Emulate PPU OAM reads while both DMA and GDMA are active --- Core/display.c | 3 +++ Core/memory.c | 4 ++-- Core/memory.h | 1 + 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/Core/display.c b/Core/display.c index 5057fcb..09991d3 100644 --- a/Core/display.c +++ b/Core/display.c @@ -469,6 +469,9 @@ static inline uint8_t oam_read(GB_gameboy_t *gb, uint8_t addr) return 0xFF; } if (unlikely(gb->dma_current_dest <= 0xa0 && gb->dma_current_dest > 0)) { // TODO: what happens in the last and first M cycles? + if (gb->hdma_in_progress) { + return GB_read_oam(gb, (gb->hdma_current_src & ~1) | (addr & 1)); + } return gb->oam[((gb->dma_current_dest - 1 + (gb->halted || gb->stopped)) & ~1) | (addr & 1)]; } return gb->oam[addr]; diff --git a/Core/memory.c b/Core/memory.c index 12e9bd3..0ad9c84 100644 --- a/Core/memory.c +++ b/Core/memory.c @@ -473,7 +473,7 @@ static inline void sync_ppu_if_needed(GB_gameboy_t *gb, uint8_t register_accesse } } -static uint8_t read_oam(GB_gameboy_t *gb, uint8_t addr) +internal uint8_t GB_read_oam(GB_gameboy_t *gb, uint8_t addr) { if (addr < 0xa0) { return gb->oam[addr]; @@ -588,7 +588,7 @@ static uint8_t read_high_memory(GB_gameboy_t *gb, uint16_t addr) return 0xff; } - return read_oam(gb, addr); + return GB_read_oam(gb, addr); } if (addr < 0xFF80) { diff --git a/Core/memory.h b/Core/memory.h index 7a78283..9a5824d 100644 --- a/Core/memory.h +++ b/Core/memory.h @@ -16,6 +16,7 @@ internal void GB_dma_run(GB_gameboy_t *gb); internal bool GB_is_dma_active(GB_gameboy_t *gb); internal void GB_hdma_run(GB_gameboy_t *gb); internal void GB_trigger_oam_bug(GB_gameboy_t *gb, uint16_t address); +internal uint8_t GB_read_oam(GB_gameboy_t *gb, uint8_t addr); #endif #endif /* memory_h */