Updated previous timing improvements to correctly implement double speed behavior
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@ -291,8 +291,14 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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these findings.
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these findings.
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Todo: Investigate what causes the difference between our findings */
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Todo: Investigate what causes the difference between our findings */
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uint8_t stat_delay = gb->cgb_double_speed? 2 : 4; // (gb->cgb_mode? 0 : 4);
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uint8_t stat_delay = gb->cgb_double_speed? 2 : 4; // (gb->cgb_mode? 0 : 4);
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/* Todo: This is correct for DMG and single speed CGB. Is it correct for double speed and DMG mode CGB?*/
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/* Todo: Is this correct for DMG mode CGB? */
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uint8_t scx_delay = (gb->effective_scx + (gb->first_scanline ? 2 : 0)) & (gb->cgb_double_speed? ~1 : ~3);
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uint8_t scx_delay = gb->effective_scx;
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if (gb->cgb_double_speed) {
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scx_delay = (scx_delay + 1) & ~1;
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}
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else {
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scx_delay = (scx_delay + (gb->first_scanline ? 2 : 0)) & ~3;
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}
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/* Todo: These are correct for DMG, DMG-mode CGB, and single speed CGB. Is is correct for double speed CGB? */
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/* Todo: These are correct for DMG, DMG-mode CGB, and single speed CGB. Is is correct for double speed CGB? */
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uint8_t oam_blocking_rush = gb->cgb_double_speed? 2 : 4;
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uint8_t oam_blocking_rush = gb->cgb_double_speed? 2 : 4;
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@ -544,7 +550,7 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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switch (gb->io_registers[GB_IO_STAT] & 3) {
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switch (gb->io_registers[GB_IO_STAT] & 3) {
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case 0:
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case 0:
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gb->stat_interrupt_line = (gb->io_registers[GB_IO_STAT] & 8);
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gb->stat_interrupt_line = (gb->io_registers[GB_IO_STAT] & 8);
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if (just_entered_hblank && ((gb->effective_scx + (gb->first_scanline ? 2 : 0)) & 3) == 3) {
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if (!gb->cgb_double_speed && just_entered_hblank && ((gb->effective_scx + (gb->first_scanline ? 2 : 0)) & 3) == 3) {
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gb->stat_interrupt_line = false;
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gb->stat_interrupt_line = false;
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}
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}
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break;
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break;
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