Accuracy improvements, especially to the length control
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d65c2247e5
commit
ab5611119a
90
Core/apu.c
90
Core/apu.c
@ -73,6 +73,9 @@ static void render(GB_gameboy_t *gb)
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void GB_apu_div_event(GB_gameboy_t *gb)
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{
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if (!gb->apu.global_enable) return;
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gb->apu.div_divider++;
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if ((gb->apu.div_divider & 1) == 1) {
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for (unsigned i = GB_SQUARE_2 + 1; i--;) {
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if (gb->apu.square_channels[i].length_enabled) {
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if (gb->apu.square_channels[i].pulse_length) {
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@ -95,7 +98,7 @@ void GB_apu_div_event(GB_gameboy_t *gb)
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gb->apu.square_channels[i].current_volume--;
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}
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gb->apu.square_channels[i].volume_countdown = (nrx2 & 7) * 8;
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gb->apu.square_channels[i].volume_countdown = (nrx2 & 7) * 4;
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uint8_t duty = gb->io_registers[i == GB_SQUARE_1? GB_IO_NR11 :GB_IO_NR21] >> 6;
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update_sample(gb, i,
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@ -106,9 +109,18 @@ void GB_apu_div_event(GB_gameboy_t *gb)
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}
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}
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gb->apu.square_sweep_div++;
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if (gb->apu.wave_channel.length_enabled) {
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if (gb->apu.wave_channel.pulse_length) {
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if (!--gb->apu.wave_channel.pulse_length) {
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gb->apu.is_active[GB_WAVE] = false;
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gb->apu.wave_channel.current_sample = 0;
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update_sample(gb, GB_WAVE, 0, 0);
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}
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}
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}
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}
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if ((gb->apu.square_sweep_div & 3) == 3) {
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if ((gb->apu.div_divider & 3) == 3) {
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if (gb->apu.square_sweep_countdown) {
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if (!--gb->apu.square_sweep_countdown) {
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gb->apu.square_channels[GB_SQUARE_1].sample_length ^= 0x7FF;
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@ -130,16 +142,6 @@ void GB_apu_div_event(GB_gameboy_t *gb)
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}
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}
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}
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if (gb->apu.wave_channel.length_enabled) {
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if (gb->apu.wave_channel.pulse_length) {
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if (!--gb->apu.wave_channel.pulse_length) {
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gb->apu.is_active[GB_WAVE] = false;
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gb->apu.wave_channel.current_sample = 0;
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update_sample(gb, GB_WAVE, 0, 0);
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}
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}
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}
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}
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@ -252,10 +254,11 @@ void GB_apu_init(GB_gameboy_t *gb)
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memset(&gb->apu, 0, sizeof(gb->apu));
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// gb->apu.wave_channels[0].duty = gb->apu.wave_channels[1].duty = 4;
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// gb->apu.lfsr = 0x7FFF;
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gb->io_registers[GB_IO_NR50] = 0x77;
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for (int i = 0; i < 4; i++) {
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gb->apu.left_enabled[i] = gb->apu.right_enabled[i] = true;
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}
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gb->apu.square_channels[GB_SQUARE_1].sample_length = 0x7FF;
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gb->apu.square_channels[GB_SQUARE_2].sample_length = 0x7FF;
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gb->apu.wave_channel.sample_length = 0x7FF;
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gb->apu.square_carry = 1;
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}
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@ -347,7 +350,7 @@ void GB_apu_write(GB_gameboy_t *gb, uint8_t reg, uint8_t value)
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case GB_IO_NR11:
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case GB_IO_NR21: {
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unsigned index = reg == GB_IO_NR21? GB_SQUARE_2: GB_SQUARE_1;
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gb->apu.square_channels[index].pulse_length = (0x40 - (value & 0x3f)) * 2 - 1;
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gb->apu.square_channels[index].pulse_length = (0x40 - (value & 0x3f));
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break;
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}
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@ -376,7 +379,6 @@ void GB_apu_write(GB_gameboy_t *gb, uint8_t reg, uint8_t value)
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case GB_IO_NR14:
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case GB_IO_NR24: {
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unsigned index = reg == GB_IO_NR24? GB_SQUARE_2: GB_SQUARE_1;
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gb->apu.square_channels[index].length_enabled = value & 0x40;
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gb->apu.square_channels[index].sample_length &= 0xFF;
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gb->apu.square_channels[index].sample_length |= ((~value) & 7) << 8;
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if (value & 0x80) {
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@ -398,16 +400,35 @@ void GB_apu_write(GB_gameboy_t *gb, uint8_t reg, uint8_t value)
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}
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}
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gb->apu.square_channels[index].current_volume = gb->io_registers[index == GB_SQUARE_1 ? GB_IO_NR12 : GB_IO_NR22] >> 4;
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gb->apu.square_channels[index].volume_countdown = (gb->io_registers[index == GB_SQUARE_1 ? GB_IO_NR12 : GB_IO_NR22] & 7) * 8;
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gb->apu.square_channels[index].volume_countdown = (gb->io_registers[index == GB_SQUARE_1 ? GB_IO_NR12 : GB_IO_NR22] & 7) * 4;
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if ((gb->io_registers[index == GB_SQUARE_1 ? GB_IO_NR12 : GB_IO_NR22] & 0xF8) != 0) {
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gb->apu.is_active[index] = true;
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}
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if (gb->apu.square_channels[index].pulse_length == 0) {
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gb->apu.square_channels[index].pulse_length = 0x7F;
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gb->apu.square_channels[index].pulse_length = 0x40;
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gb->apu.square_channels[index].length_enabled = false;
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}
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/* Note that we don't change the sample just yet! This was verified on hardware. */
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}
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/* APU glitch - if length is enabled while the DIV-divider's LSB is 1, tick the length once. */
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if ((value & 0x40) &&
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!gb->apu.square_channels[index].length_enabled &&
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(gb->apu.div_divider & 1) &&
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gb->apu.square_channels[index].pulse_length) {
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gb->apu.square_channels[index].pulse_length--;
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if (gb->apu.square_channels[index].pulse_length == 0) {
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if (value & 0x80) {
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gb->apu.square_channels[index].pulse_length = 0x3F;
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}
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else {
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update_sample(gb, index, 0, 0);
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gb->apu.is_active[index] = false;
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}
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}
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}
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gb->apu.square_channels[index].length_enabled = value & 0x40;
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break;
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}
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@ -421,7 +442,7 @@ void GB_apu_write(GB_gameboy_t *gb, uint8_t reg, uint8_t value)
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}
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break;
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case GB_IO_NR31:
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gb->apu.wave_channel.pulse_length = (0x100 - value) * 2 - 1;
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gb->apu.wave_channel.pulse_length = (0x100 - value);
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break;
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case GB_IO_NR32:
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gb->apu.wave_channel.shift = (uint8_t[]){4, 0, 1, 2}[(value >> 5) & 3];
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@ -432,13 +453,15 @@ void GB_apu_write(GB_gameboy_t *gb, uint8_t reg, uint8_t value)
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gb->apu.wave_channel.sample_length |= (~value) & 0xFF;
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break;
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case GB_IO_NR34:
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gb->apu.wave_channel.length_enabled = value & 0x40;
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gb->apu.wave_channel.sample_length &= 0xFF;
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gb->apu.wave_channel.sample_length |= ((~value) & 7) << 8;
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if ((value & 0x80) && gb->apu.wave_channel.enable) {
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if ((value & 0x80)) {
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/* DMG bug: wave RAM gets corrupted if the channel is retriggerred 1 cycle before the APU
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reads from it. */
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if (!gb->is_cgb && gb->apu.is_active[GB_WAVE] && gb->apu.wave_channel.sample_countdown == 0) {
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if (!gb->is_cgb &&
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gb->apu.is_active[GB_WAVE] &&
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gb->apu.wave_channel.sample_countdown == 0 &&
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gb->apu.wave_channel.enable) {
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unsigned offset = ((gb->apu.wave_channel.current_sample_index + 1) >> 1) & 0xF;
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/* On SGB2 (and probably SGB1 and MGB as well) this behavior is not accurate,
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@ -461,10 +484,31 @@ void GB_apu_write(GB_gameboy_t *gb, uint8_t reg, uint8_t value)
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gb->apu.wave_channel.sample_countdown = gb->apu.wave_channel.sample_length + 3;
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gb->apu.wave_channel.current_sample_index = 0;
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if (gb->apu.wave_channel.pulse_length == 0) {
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gb->apu.wave_channel.pulse_length = 0x1FF;
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gb->apu.wave_channel.pulse_length = 0x100;
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gb->apu.wave_channel.length_enabled = false;
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}
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/* Note that we don't change the sample just yet! This was verified on hardware. */
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}
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/* APU glitch - if length is enabled while the DIV-divider's LSB is 1, tick the length once. */
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if ((value & 0x40) &&
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!gb->apu.wave_channel.length_enabled &&
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(gb->apu.div_divider & 1) &&
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gb->apu.wave_channel.pulse_length) {
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gb->apu.wave_channel.pulse_length--;
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if (gb->apu.wave_channel.pulse_length == 0) {
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if (value & 0x80) {
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gb->apu.wave_channel.pulse_length = 0xFF;
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}
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else {
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update_sample(gb, GB_WAVE, 0, 0);
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gb->apu.is_active[GB_WAVE] = false;
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}
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}
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}
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gb->apu.wave_channel.length_enabled = value & 0x40;
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gb->apu.is_active[GB_WAVE] &= gb->apu.wave_channel.enable;
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break;
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default:
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13
Core/apu.h
13
Core/apu.h
@ -11,8 +11,7 @@
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#define CH_STEP (MAX_CH_AMP/0xF/7)
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#endif
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/* Lengths are in either DIV ticks (512Hz, triggered by the DIV register) or
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APU ticks (2MHz, triggered by an internal APU clock) */
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/* APU ticks are 2MHz, triggered by an internal APU clock. */
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typedef struct
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{
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@ -38,29 +37,31 @@ typedef struct
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bool right_enabled[GB_N_CHANNELS];
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bool is_active[GB_N_CHANNELS];
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uint8_t div_divider; // The DIV register ticks the APU at 512Hz, but is then divided
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// once more to generate 128Hz and 64Hz clocks
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uint8_t square_carry; // The square channels tick at 1MHz instead of 2,
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// so we need a carry to divide the signal
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uint8_t square_sweep_div; // The DIV-APU ticks are divided by 4 to handle tone sweeping
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uint8_t square_sweep_countdown; // In 128Hz
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uint8_t square_sweep_stop_countdown; // In 2 MHz
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struct {
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uint16_t pulse_length; // Reloaded from NRX1 (xorred), in DIV ticks
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uint16_t pulse_length; // Reloaded from NRX1 (xorred), in 256Hz DIV ticks
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uint8_t current_volume; // Reloaded from NRX2
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uint8_t volume_countdown; // Reloaded from NRX2
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uint8_t current_sample_index;
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bool sample_emitted;
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uint16_t sample_countdown; // in APU ticks
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uint16_t sample_length; // Reloaded from NRX3, NRX4, in APU ticks
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uint16_t sample_length; // From NRX3, NRX4, in APU ticks
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bool length_enabled; // NRX4
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} square_channels[2];
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struct {
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bool enable; // NR30
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uint16_t pulse_length; // Reloaded from NR31 (xorred), in DIV ticks
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uint16_t pulse_length; // Reloaded from NR31 (xorred), in 256Hz DIV ticks
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uint8_t shift; // NR32
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uint16_t sample_length; // NR33, NR34, in APU ticks
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bool length_enabled; // NR34
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