From c11af7ea26839c1cfd24943cbed7d3f3cb7da761 Mon Sep 17 00:00:00 2001
From: Lior Halphon <LIJI32@gmail.com>
Date: Fri, 23 Mar 2018 12:58:51 +0300
Subject: [PATCH] Fix CGB timings

---
 Core/display.c | 20 ++++++++++++++------
 Core/timing.c  | 13 +++++++------
 2 files changed, 21 insertions(+), 12 deletions(-)

diff --git a/Core/display.c b/Core/display.c
index c9b2819..b06329e 100755
--- a/Core/display.c
+++ b/Core/display.c
@@ -434,7 +434,9 @@ void GB_display_run(GB_gameboy_t *gb, uint8_t cycles)
         return;
     }
     
-    GB_SLEEP(gb, display, 23, 1);
+    if (!gb->is_cgb) {
+        GB_SLEEP(gb, display, 23, 1);
+    }
 
     /* Handle the very first line 0 */
     gb->current_line = 0;
@@ -464,8 +466,6 @@ void GB_display_run(GB_gameboy_t *gb, uint8_t cycles)
     gb->cycles_for_line += MODE3_LENGTH + (gb->io_registers[GB_IO_SCX] & 7) - 2;
     GB_SLEEP(gb, display, 3, MODE3_LENGTH + (gb->io_registers[GB_IO_SCX] & 7) - 2);
     
-
-    
     if (!gb->cgb_double_speed) {
         gb->io_registers[GB_IO_STAT] &= ~3;
         gb->oam_read_blocked = false;
@@ -676,14 +676,22 @@ void GB_display_run(GB_gameboy_t *gb, uint8_t cycles)
                 gb->cycles_for_line++;
                 GB_SLEEP(gb, display, 21, 1);
             }
+            if (!gb->cgb_double_speed) {
+                gb->io_registers[GB_IO_STAT] &= ~3;
+                gb->oam_read_blocked = false;
+                gb->vram_read_blocked = false;
+                gb->oam_write_blocked = false;
+                gb->vram_write_blocked = false;
+            }
+            
+            gb->cycles_for_line++;
+            GB_SLEEP(gb, display, 22, 1);
+            
             gb->io_registers[GB_IO_STAT] &= ~3;
             gb->oam_read_blocked = false;
             gb->vram_read_blocked = false;
             gb->oam_write_blocked = false;
             gb->vram_write_blocked = false;
-            
-            gb->cycles_for_line++;
-            GB_SLEEP(gb, display, 22, 1);
             GB_STAT_update(gb);
 
             /* Todo: Measure this value */
diff --git a/Core/timing.c b/Core/timing.c
index a9ff156..5328007 100644
--- a/Core/timing.c
+++ b/Core/timing.c
@@ -153,6 +153,13 @@ static void GB_timers_run(GB_gameboy_t *gb, uint8_t cycles)
 
 void GB_advance_cycles(GB_gameboy_t *gb, uint8_t cycles)
 {
+    /* It appears that on the CGB, write timing is a bit different then on the DMG, effectively
+       making writes 1 T-cycle late when compared to the DMG. */
+    if (gb->is_cgb) {
+        cycles = (cycles + 1) & ~3;
+        if (cycles == 0) return;
+    }
+    
     // Affected by speed boost
     gb->dma_cycles += cycles;
 
@@ -180,12 +187,6 @@ void GB_advance_cycles(GB_gameboy_t *gb, uint8_t cycles)
 
     if (!gb->cgb_double_speed) {
         cycles <<= 1;
-        if ((cycles & 6) == 2) {
-            cycles--;
-        }
-        else if ((cycles & 6) == 6) {
-            cycles++;
-        }
     }
 
     // Not affected by speed boost