diff --git a/Core/display.c b/Core/display.c
index dfb8e3b..e0f9708 100644
--- a/Core/display.c
+++ b/Core/display.c
@@ -238,6 +238,7 @@ static void trigger_oam_interrupt(GB_gameboy_t *gb)
     }
 }
 
+/* Todo: A proper test ROM of cases where both the PPU and the CPU write to IF in the same M-cycle is needed. */
 void GB_STAT_update(GB_gameboy_t *gb)
 {
     if (!(gb->io_registers[GB_IO_LCDC] & 0x80)) return;
diff --git a/Core/memory.c b/Core/memory.c
index 6d9f766..e74e213 100644
--- a/Core/memory.c
+++ b/Core/memory.c
@@ -636,7 +636,7 @@ static void write_high_memory(GB_gameboy_t *gb, uint16_t addr, uint8_t value)
 
             case GB_IO_STAT:
                 /* A DMG bug: http://www.devrs.com/gb/files/faqs.html#GBBugs */
-                if (!gb->is_cgb && !gb->stat_interrupt_line &&
+                if (!gb->is_cgb && !gb->stat_interrupt_line && !gb->is_first_line_mode2 &&
                     (gb->io_registers[GB_IO_STAT] & 0x3) < 2 && (gb->io_registers[GB_IO_LCDC] & 0x80)) {
                     gb->io_registers[GB_IO_IF] |= 2;
                 }