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Fixed another timing regression with the CB opcodes

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This commit is contained in:
Lior Halphon 2018-03-29 21:06:53 +03:00
parent 96063fb0da
commit e380a00b67
2 changed files with 2 additions and 2 deletions
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2
BootROMs/dmg_boot.asm
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@ -125,7 +125,7 @@ DoubleBitsAndWriteRow:
WaitFrame: WaitFrame:
push hl push hl
ld hl, $FF0F ld hl, $FF0F
res 0, [hl] res 0, [hl]
.wait .wait
bit 0, [hl] bit 0, [hl]
jr z, .wait jr z, .wait

2
Core/z80_cpu.c
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@ -1272,7 +1272,7 @@ static void bit_r(GB_gameboy_t *gb, uint8_t opcode)
uint8_t value; uint8_t value;
uint8_t bit; uint8_t bit;
GB_advance_cycles(gb, 4); GB_advance_cycles(gb, 4);
value = get_src_value(gb, opcode, 3); value = get_src_value(gb, opcode, (opcode & 0xC0) == 0x40? 4 : 3);
bit = 1 << ((opcode >> 3) & 7); bit = 1 << ((opcode >> 3) & 7);
if ((opcode & 0xC0) == 0x40) { /* Bit */ if ((opcode & 0xC0) == 0x40) { /* Bit */
gb->registers[GB_REGISTER_AF] &= 0xFF00 | GB_CARRY_FLAG; gb->registers[GB_REGISTER_AF] &= 0xFF00 | GB_CARRY_FLAG;