is_dma_restarting hack no longer needed
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@ -435,8 +435,7 @@ struct GB_gameboy_internal_s {
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uint8_t last_dma_read;
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uint16_t dma_current_src;
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int16_t dma_cycles;
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bool is_dma_restarting;
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uint8_t last_opcode_read; /* Required to emulte HDMA reads from Exxx */
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uint8_t last_opcode_read; /* Required to emulate HDMA reads from Exxx */
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bool hdma_starting;
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);
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@ -1459,13 +1459,6 @@ static void write_high_memory(GB_gameboy_t *gb, uint16_t addr, uint8_t value)
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return;
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case GB_IO_DMA:
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if (GB_is_dma_active(gb)) {
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/* This is not correct emulation, since we're not really delaying the second DMA.
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One write that should have happened in the first DMA will not happen. However,
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since that byte will be overwritten by the second DMA before it can actually be
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read, it doesn't actually matter. */
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gb->is_dma_restarting = true;
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}
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gb->dma_cycles = -3;
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gb->dma_current_dest = 0;
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gb->dma_current_src = value << 8;
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@ -1688,7 +1681,7 @@ void GB_write_memory(GB_gameboy_t *gb, uint16_t addr, uint8_t value)
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bool GB_is_dma_active(GB_gameboy_t *gb)
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{
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return gb->dma_current_dest < 0xa1 || gb->is_dma_restarting;
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return gb->dma_current_dest < 0xa1;
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}
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void GB_dma_run(GB_gameboy_t *gb)
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@ -1696,13 +1689,9 @@ void GB_dma_run(GB_gameboy_t *gb)
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if (gb->dma_current_dest >= 0xa1) return;
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while (unlikely(gb->dma_cycles >= 4)) {
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gb->dma_cycles -= 4;
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if (gb->dma_current_dest >= 0xa1) {
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gb->is_dma_restarting = false;
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break;
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}
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if (gb->dma_current_dest >= 0xa0) {
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gb->dma_current_dest++;
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continue;
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break;
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}
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if (gb->dma_current_src < 0xe000) {
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gb->oam[gb->dma_current_dest++] = GB_read_memory(gb, gb->dma_current_src);
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