From 5018364c0140a0eb8ae8d3368651edd66784a4d9 Mon Sep 17 00:00:00 2001 From: Vicki Pfau Date: Sat, 6 Jul 2019 15:21:04 -0700 Subject: [PATCH] cinema: Update mooneye-gb tests --- .../add_sp_e_timing/baseline_0000.png | Bin 1227 -> 1217 bytes .../acceptance/add_sp_e_timing/test.gb | Bin 32768 -> 32768 bytes .../acceptance/add_sp_e_timing/test.sym | 340 ++++------ .../acceptance/bits/mem_oam/baseline_0000.png | Bin 518 -> 528 bytes .../acceptance/bits/mem_oam/test.gb | Bin 32768 -> 32768 bytes .../acceptance/bits/mem_oam/test.sym | 252 ++------ .../acceptance/bits/reg_f/baseline_0000.png | Bin 1166 -> 1148 bytes .../mooneye-gb/acceptance/bits/reg_f/test.gb | Bin 32768 -> 32768 bytes .../mooneye-gb/acceptance/bits/reg_f/test.sym | 304 ++++----- .../bits/unused_hwio-GS/baseline_0000.png | Bin 518 -> 528 bytes .../acceptance/bits/unused_hwio-GS/test.gb | Bin 32768 -> 32768 bytes .../acceptance/bits/unused_hwio-GS/test.sym | 602 +++++++++++------- .../acceptance/boot_div-S/manifest.yml | 3 + .../mooneye-gb/acceptance/boot_div-S/test.gb | Bin 0 -> 32768 bytes .../mooneye-gb/acceptance/boot_div-S/test.sym | 120 ++++ .../manifest.yml | 0 .../acceptance/boot_div-dmg0/test.gb | Bin 0 -> 32768 bytes .../acceptance/boot_div-dmg0/test.sym | 120 ++++ .../manifest.yml | 0 .../acceptance/boot_div-dmgABCmgb/test.gb | Bin 0 -> 32768 bytes .../acceptance/boot_div-dmgABCmgb/test.sym | 120 ++++ .../acceptance/boot_div2-S/manifest.yml | 3 + .../mooneye-gb/acceptance/boot_div2-S/test.gb | Bin 0 -> 32768 bytes .../acceptance/boot_div2-S/test.sym | 120 ++++ .../acceptance/boot_hwio-S/baseline_0000.png | Bin 518 -> 528 bytes .../acceptance/boot_hwio-S/manifest.yml | 3 +- .../mooneye-gb/acceptance/boot_hwio-S/test.gb | Bin 32768 -> 32768 bytes .../acceptance/boot_hwio-S/test.sym | 261 ++------ .../boot_hwio-dmg0/baseline_0000.png | Bin 518 -> 528 bytes .../acceptance/boot_hwio-dmg0/test.gb | Bin 32768 -> 32768 bytes .../acceptance/boot_hwio-dmg0/test.sym | 261 ++------ .../boot_hwio-dmgABCXmgb/baseline_0000.png | Bin 518 -> 0 bytes .../acceptance/boot_hwio-dmgABCXmgb/test.sav | 0 .../acceptance/boot_hwio-dmgABCXmgb/test.sym | 212 ------ .../boot_hwio-dmgABCmgb/baseline_0000.png | Bin 0 -> 528 bytes .../test.gb | Bin 32768 -> 32768 bytes .../acceptance/boot_hwio-dmgABCmgb/test.sym | 57 ++ .../boot_regs-dmg/baseline_0000.png | Bin 1327 -> 0 bytes .../acceptance/boot_regs-dmg/test.sym | 198 ------ .../acceptance/boot_regs-dmg0/test.gb | Bin 32768 -> 32768 bytes .../acceptance/boot_regs-dmg0/test.sym | 316 ++++----- .../boot_regs-dmgABC/baseline_0000.png | Bin 0 -> 1324 bytes .../{hdma_lcdc => boot_regs-dmgABC}/test.gb | Bin 32768 -> 32768 bytes .../acceptance/boot_regs-dmgABC/test.sym | 125 ++++ .../boot_regs-dmgABCX/baseline_0000.png | Bin 1327 -> 0 bytes .../acceptance/boot_regs-dmgABCX/test.sym | 199 ------ .../boot_regs-mgb/baseline_0000.png | Bin 1324 -> 1327 bytes .../acceptance/boot_regs-mgb/manifest.yml | 3 +- .../acceptance/boot_regs-mgb/test.gb | Bin 32768 -> 32768 bytes .../acceptance/boot_regs-mgb/test.sym | 316 ++++----- .../boot_regs-sgb/baseline_0000.png | Bin 1310 -> 1298 bytes .../acceptance/boot_regs-sgb/manifest.yml | 3 +- .../acceptance/boot_regs-sgb/test.gb | Bin 32768 -> 32768 bytes .../acceptance/boot_regs-sgb/test.sym | 316 ++++----- .../boot_regs-sgb2/baseline_0000.png | Bin 1312 -> 1297 bytes .../acceptance/boot_regs-sgb2/manifest.yml | 3 +- .../acceptance/boot_regs-sgb2/test.gb | Bin 32768 -> 32768 bytes .../acceptance/boot_regs-sgb2/test.sym | 316 ++++----- .../call_cc_timing/baseline_0000.png | Bin 518 -> 528 bytes .../acceptance/call_cc_timing/test.gb | Bin 32768 -> 32768 bytes .../acceptance/call_cc_timing/test.sym | 271 ++------ .../call_cc_timing2/baseline_0000.png | Bin 1278 -> 1261 bytes .../acceptance/call_cc_timing2/test.gb | Bin 32768 -> 32768 bytes .../acceptance/call_cc_timing2/test.sym | 332 ++++------ .../acceptance/call_timing/baseline_0000.png | Bin 518 -> 528 bytes .../mooneye-gb/acceptance/call_timing/test.gb | Bin 32768 -> 32768 bytes .../acceptance/call_timing/test.sym | 271 ++------ .../acceptance/call_timing2/baseline_0000.png | Bin 1275 -> 1256 bytes .../acceptance/call_timing2/test.gb | Bin 32768 -> 32768 bytes .../acceptance/call_timing2/test.sym | 332 ++++------ .../acceptance/di_timing-GS/baseline_0000.png | Bin 518 -> 528 bytes .../acceptance/di_timing-GS/test.gb | Bin 32768 -> 32768 bytes .../acceptance/di_timing-GS/test.sym | 275 ++------ .../acceptance/div_timing/baseline_0000.png | Bin 1203 -> 1188 bytes .../mooneye-gb/acceptance/div_timing/test.gb | Bin 32768 -> 32768 bytes .../mooneye-gb/acceptance/div_timing/test.sym | 304 ++++----- .../acceptance/ei_sequence/baseline_0000.png | Bin 0 -> 1175 bytes .../mooneye-gb/acceptance/ei_sequence/test.gb | Bin 0 -> 32768 bytes .../acceptance/ei_sequence/test.sym | 127 ++++ .../acceptance/ei_timing/baseline_0000.png | Bin 1184 -> 1168 bytes .../mooneye-gb/acceptance/ei_timing/test.gb | Bin 32768 -> 32768 bytes .../mooneye-gb/acceptance/ei_timing/test.sym | 304 ++++----- .../hblank_ly_scx_timing-GS/baseline_0000.png | Bin 518 -> 0 bytes .../gpu/hblank_ly_scx_timing-GS/test.sym | 219 ------- .../gpu/intr_1_2_timing-GS/baseline_0000.png | Bin 1199 -> 0 bytes .../gpu/intr_1_2_timing-GS/test.sym | 203 ------ .../gpu/intr_2_0_timing/baseline_0000.png | Bin 1195 -> 0 bytes .../acceptance/gpu/intr_2_0_timing/test.sym | 203 ------ .../gpu/intr_2_mode0_timing/baseline_0000.png | Bin 1206 -> 0 bytes .../gpu/intr_2_mode0_timing/test.sym | 202 ------ .../baseline_0000.png | Bin 627 -> 0 bytes .../gpu/intr_2_mode0_timing_sprites/test.gb | Bin 32768 -> 0 bytes .../gpu/intr_2_mode0_timing_sprites/test.sym | 437 ------------- .../gpu/intr_2_mode3_timing/baseline_0000.png | Bin 1214 -> 0 bytes .../gpu/intr_2_mode3_timing/test.sym | 202 ------ .../intr_2_oam_ok_timing/baseline_0000.png | Bin 1186 -> 0 bytes .../gpu/intr_2_oam_ok_timing/test.gb | Bin 32768 -> 0 bytes .../gpu/intr_2_oam_ok_timing/test.sym | 202 ------ .../gpu/lcdon_timing-dmgABCXmgbS/test.gb | Bin 32768 -> 0 bytes .../gpu/lcdon_timing-dmgABCXmgbS/test.sym | 236 ------- .../gpu/lcdon_write_timing-GS/test.gb | Bin 32768 -> 0 bytes .../gpu/lcdon_write_timing-GS/test.sym | 230 ------- .../gpu/stat_irq_blocking/baseline_0000.png | Bin 518 -> 0 bytes .../acceptance/gpu/stat_irq_blocking/test.gb | Bin 32768 -> 0 bytes .../acceptance/gpu/stat_irq_blocking/test.sym | 219 ------- .../gpu/vblank_stat_intr-GS/baseline_0000.png | Bin 1237 -> 0 bytes .../gpu/vblank_stat_intr-GS/test.gb | Bin 32768 -> 0 bytes .../gpu/vblank_stat_intr-GS/test.sym | 216 ------- .../acceptance/halt_ime0_ei/baseline_0000.png | Bin 518 -> 528 bytes .../acceptance/halt_ime0_ei/test.gb | Bin 32768 -> 32768 bytes .../acceptance/halt_ime0_ei/test.sym | 244 ++----- .../halt_ime0_nointr_timing/baseline_0000.png | Bin 1210 -> 1191 bytes .../halt_ime0_nointr_timing/test.gb | Bin 32768 -> 32768 bytes .../halt_ime0_nointr_timing/test.sym | 329 ++++------ .../halt_ime1_timing/baseline_0000.png | Bin 1158 -> 1141 bytes .../acceptance/halt_ime1_timing/test.gb | Bin 32768 -> 32768 bytes .../acceptance/halt_ime1_timing/test.sym | 313 ++++----- .../halt_ime1_timing2-GS/baseline_0000.png | Bin 1231 -> 1213 bytes .../acceptance/halt_ime1_timing2-GS/test.gb | Bin 32768 -> 32768 bytes .../acceptance/halt_ime1_timing2-GS/test.sym | 365 +++++------ .../acceptance/hdma_lcdc/baseline_0000.png | Bin 1165 -> 0 bytes .../mooneye-gb/acceptance/hdma_lcdc/test.sym | 195 ------ .../if_ie_registers/baseline_0000.png | Bin 1235 -> 1223 bytes .../acceptance/if_ie_registers/test.gb | Bin 32768 -> 32768 bytes .../acceptance/if_ie_registers/test.sym | 304 ++++----- .../acceptance/instr/daa/baseline_0000.png | Bin 0 -> 528 bytes .../mooneye-gb/acceptance/instr/daa/test.gb | Bin 0 -> 32768 bytes .../mooneye-gb/acceptance/instr/daa/test.sym | 59 ++ .../interrupts/ie_push/baseline_0000.png | Bin 518 -> 528 bytes .../acceptance/interrupts/ie_push/test.gb | Bin 32768 -> 32768 bytes .../acceptance/interrupts/ie_push/test.sym | 347 +++------- .../acceptance/intr_timing/baseline_0000.png | Bin 1207 -> 1179 bytes .../mooneye-gb/acceptance/intr_timing/test.gb | Bin 32768 -> 32768 bytes .../acceptance/intr_timing/test.sym | 330 ++++------ .../acceptance/jp_cc_timing/baseline_0000.png | Bin 518 -> 528 bytes .../acceptance/jp_cc_timing/test.gb | Bin 32768 -> 32768 bytes .../acceptance/jp_cc_timing/test.sym | 271 ++------ .../acceptance/jp_timing/baseline_0000.png | Bin 518 -> 528 bytes .../mooneye-gb/acceptance/jp_timing/test.gb | Bin 32768 -> 32768 bytes .../mooneye-gb/acceptance/jp_timing/test.sym | 271 ++------ .../ld_hl_sp_e_timing/baseline_0000.png | Bin 1231 -> 1210 bytes .../acceptance/ld_hl_sp_e_timing/test.gb | Bin 32768 -> 32768 bytes .../acceptance/ld_hl_sp_e_timing/test.sym | 328 ++++------ .../oam_dma/basic/baseline_0000.png | Bin 0 -> 528 bytes .../{boot_regs-dmg => oam_dma/basic}/test.gb | Bin 32768 -> 32768 bytes .../acceptance/oam_dma/basic/test.sym | 63 ++ .../oam_dma/reg_read/baseline_0000.png | Bin 0 -> 528 bytes .../acceptance/oam_dma/reg_read/test.gb | Bin 0 -> 32768 bytes .../acceptance/oam_dma/reg_read/test.sym | 92 +++ .../sources-dmgABCmgbS}/manifest.yml | 0 .../sources-dmgABCmgbS}/test.gb | Bin 32768 -> 32768 bytes .../oam_dma/sources-dmgABCmgbS/test.sym | 113 ++++ .../oam_dma_restart/baseline_0000.png | Bin 1178 -> 1176 bytes .../acceptance/oam_dma_restart/test.gb | Bin 32768 -> 32768 bytes .../acceptance/oam_dma_restart/test.sym | 319 ++++------ .../acceptance/oam_dma_start/test.gb | Bin 32768 -> 32768 bytes .../acceptance/oam_dma_start/test.sym | 354 +++++----- .../oam_dma_timing/baseline_0000.png | Bin 1178 -> 1176 bytes .../acceptance/oam_dma_timing/test.gb | Bin 32768 -> 32768 bytes .../acceptance/oam_dma_timing/test.sym | 319 ++++------ .../acceptance/pop_timing/baseline_0000.png | Bin 1255 -> 1230 bytes .../mooneye-gb/acceptance/pop_timing/test.gb | Bin 32768 -> 32768 bytes .../mooneye-gb/acceptance/pop_timing/test.sym | 304 ++++----- .../hblank_ly_scx_timing-GS}/manifest.yml | 0 .../hblank_ly_scx_timing-GS}/test.gb | Bin 32768 -> 32768 bytes .../ppu/hblank_ly_scx_timing-GS/test.sym | 100 +++ .../ppu/intr_1_2_timing-GS/baseline_0000.png | Bin 0 -> 1171 bytes .../intr_1_2_timing-GS}/test.gb | Bin 32768 -> 32768 bytes .../ppu/intr_1_2_timing-GS/test.sym | 130 ++++ .../ppu/intr_2_0_timing/baseline_0000.png | Bin 0 -> 1176 bytes .../intr_2_0_timing}/test.gb | Bin 32768 -> 32768 bytes .../acceptance/ppu/intr_2_0_timing/test.sym | 130 ++++ .../ppu/intr_2_mode0_timing/baseline_0000.png | Bin 0 -> 1189 bytes .../ppu/intr_2_mode0_timing/test.gb | Bin 0 -> 32768 bytes .../ppu/intr_2_mode0_timing/test.sym | 128 ++++ .../intr_2_mode0_timing_sprites/manifest.yml | 1 + .../intr_2_mode0_timing_sprites}/test.gb | Bin 32768 -> 32768 bytes .../ppu/intr_2_mode0_timing_sprites/test.sym | 499 +++++++++++++++ .../ppu/intr_2_mode3_timing/baseline_0000.png | Bin 0 -> 1186 bytes .../ppu/intr_2_mode3_timing/test.gb | Bin 0 -> 32768 bytes .../ppu/intr_2_mode3_timing/test.sym | 128 ++++ .../intr_2_oam_ok_timing/baseline_0000.png | Bin 0 -> 1162 bytes .../ppu/intr_2_oam_ok_timing/test.gb | Bin 0 -> 32768 bytes .../ppu/intr_2_oam_ok_timing/test.sym | 130 ++++ .../ppu/lcdon_timing-dmgABCmgbS/manifest.yml | 1 + .../ppu/lcdon_timing-dmgABCmgbS/test.gb | Bin 0 -> 32768 bytes .../ppu/lcdon_timing-dmgABCmgbS/test.sym | 103 +++ .../ppu/lcdon_write_timing-GS/manifest.yml | 1 + .../ppu/lcdon_write_timing-GS/test.gb | Bin 0 -> 32768 bytes .../ppu/lcdon_write_timing-GS/test.sym | 91 +++ .../ppu/stat_irq_blocking/baseline_0000.png | Bin 0 -> 528 bytes .../acceptance/ppu/stat_irq_blocking/test.gb | Bin 0 -> 32768 bytes .../acceptance/ppu/stat_irq_blocking/test.sym | 102 +++ .../ppu/stat_lyc_onoff/baseline_0000.png | Bin 0 -> 528 bytes .../acceptance/ppu/stat_lyc_onoff/test.gb | Bin 0 -> 32768 bytes .../acceptance/ppu/stat_lyc_onoff/test.sym | 80 +++ .../ppu/vblank_stat_intr-GS/baseline_0000.png | Bin 0 -> 1206 bytes .../vblank_stat_intr-GS}/test.gb | Bin 32768 -> 32768 bytes .../ppu/vblank_stat_intr-GS/test.sym | 155 +++++ .../mooneye-gb/acceptance/push_timing/test.gb | Bin 32768 -> 32768 bytes .../acceptance/push_timing/test.sym | 319 ++++------ .../acceptance/rapid_di_ei/baseline_0000.png | Bin 1200 -> 1186 bytes .../mooneye-gb/acceptance/rapid_di_ei/test.gb | Bin 32768 -> 32768 bytes .../acceptance/rapid_di_ei/test.sym | 304 ++++----- .../ret_cc_timing/baseline_0000.png | Bin 518 -> 528 bytes .../acceptance/ret_cc_timing/test.gb | Bin 32768 -> 32768 bytes .../acceptance/ret_cc_timing/test.sym | 275 ++------ .../acceptance/ret_timing/baseline_0000.png | Bin 518 -> 528 bytes .../mooneye-gb/acceptance/ret_timing/test.gb | Bin 32768 -> 32768 bytes .../mooneye-gb/acceptance/ret_timing/test.sym | 275 ++------ .../reti_intr_timing/baseline_0000.png | Bin 1193 -> 1171 bytes .../acceptance/reti_intr_timing/test.gb | Bin 32768 -> 32768 bytes .../acceptance/reti_intr_timing/test.sym | 304 ++++----- .../acceptance/reti_timing/baseline_0000.png | Bin 518 -> 528 bytes .../mooneye-gb/acceptance/reti_timing/test.gb | Bin 32768 -> 32768 bytes .../acceptance/reti_timing/test.sym | 275 ++------ .../acceptance/rst_timing/baseline_0000.png | Bin 1221 -> 1199 bytes .../mooneye-gb/acceptance/rst_timing/test.gb | Bin 32768 -> 32768 bytes .../mooneye-gb/acceptance/rst_timing/test.sym | 325 ++++------ .../boot_sclk_align-dmgABCXmgb/test.sav | 0 .../boot_sclk_align-dmgABCXmgb/test.sym | 198 ------ .../boot_sclk_align-dmgABCmgb/manifest.yml | 1 + .../test.gb | Bin 32768 -> 32768 bytes .../serial/boot_sclk_align-dmgABCmgb/test.sym | 123 ++++ .../timer/div_write/baseline_0000.png | Bin 518 -> 528 bytes .../acceptance/timer/div_write/test.gb | Bin 32768 -> 32768 bytes .../acceptance/timer/div_write/test.sym | 242 ++----- .../acceptance/timer/rapid_toggle/test.gb | Bin 32768 -> 32768 bytes .../acceptance/timer/rapid_toggle/test.sym | 314 ++++----- .../acceptance/timer/tim00/baseline_0000.png | Bin 1203 -> 1185 bytes .../mooneye-gb/acceptance/timer/tim00/test.gb | Bin 32768 -> 32768 bytes .../acceptance/timer/tim00/test.sym | 304 ++++----- .../timer/tim00_div_trigger/baseline_0000.png | Bin 1203 -> 1185 bytes .../timer/tim00_div_trigger/test.gb | Bin 32768 -> 32768 bytes .../timer/tim00_div_trigger/test.sym | 304 ++++----- .../acceptance/timer/tim01/baseline_0000.png | Bin 1209 -> 1197 bytes .../mooneye-gb/acceptance/timer/tim01/test.gb | Bin 32768 -> 32768 bytes .../acceptance/timer/tim01/test.sym | 304 ++++----- .../timer/tim01_div_trigger/baseline_0000.png | Bin 1190 -> 1182 bytes .../timer/tim01_div_trigger/test.gb | Bin 32768 -> 32768 bytes .../timer/tim01_div_trigger/test.sym | 304 ++++----- .../acceptance/timer/tim10/baseline_0000.png | Bin 1203 -> 1185 bytes .../mooneye-gb/acceptance/timer/tim10/test.gb | Bin 32768 -> 32768 bytes .../acceptance/timer/tim10/test.sym | 304 ++++----- .../timer/tim10_div_trigger/baseline_0000.png | Bin 1208 -> 1193 bytes .../timer/tim10_div_trigger/test.gb | Bin 32768 -> 32768 bytes .../timer/tim10_div_trigger/test.sym | 304 ++++----- .../acceptance/timer/tim11/baseline_0000.png | Bin 1203 -> 1185 bytes .../mooneye-gb/acceptance/timer/tim11/test.gb | Bin 32768 -> 32768 bytes .../acceptance/timer/tim11/test.sym | 304 ++++----- .../timer/tim11_div_trigger/baseline_0000.png | Bin 1203 -> 1185 bytes .../timer/tim11_div_trigger/test.gb | Bin 32768 -> 32768 bytes .../timer/tim11_div_trigger/test.sym | 304 ++++----- .../timer/tima_reload/baseline_0000.png | Bin 1244 -> 1229 bytes .../acceptance/timer/tima_reload/test.gb | Bin 32768 -> 32768 bytes .../acceptance/timer/tima_reload/test.sym | 304 ++++----- .../tima_write_reloading/baseline_0000.png | Bin 1209 -> 1176 bytes .../timer/tima_write_reloading/test.gb | Bin 32768 -> 32768 bytes .../timer/tima_write_reloading/test.sym | 304 ++++----- .../tma_write_reloading/baseline_0000.png | Bin 1179 -> 1156 bytes .../timer/tma_write_reloading/test.gb | Bin 32768 -> 32768 bytes .../timer/tma_write_reloading/test.sym | 304 ++++----- .../mbc1/bits_ram_en/manifest.yml | 1 + .../bits_ram_en}/test.gb | Bin 65536 -> 65536 bytes .../emulator-only/mbc1/bits_ram_en/test.sym | 84 +++ .../mbc1/multicart_rom_8Mb/baseline_0000.png | Bin 518 -> 528 bytes .../mbc1/multicart_rom_8Mb/test.gb | Bin 1048576 -> 1048576 bytes .../mbc1/multicart_rom_8Mb/test.sym | 285 ++------- .../mbc1/ram_256Kb/baseline_0000.png | Bin 518 -> 528 bytes .../emulator-only/mbc1/ram_256Kb/test.gb | Bin 65536 -> 65536 bytes .../emulator-only/mbc1/ram_256Kb/test.sym | 312 +++------ .../mbc1/ram_64Kb/baseline_0000.png | Bin 518 -> 528 bytes .../emulator-only/mbc1/ram_64Kb/test.gb | Bin 65536 -> 65536 bytes .../emulator-only/mbc1/ram_64Kb/test.sym | 301 ++------- .../mbc1/rom_16Mb/baseline_0000.png | Bin 518 -> 528 bytes .../emulator-only/mbc1/rom_16Mb/test.gb | Bin 2097152 -> 2097152 bytes .../emulator-only/mbc1/rom_16Mb/test.sym | 285 ++------- .../mbc1/rom_1Mb/baseline_0000.png | Bin 518 -> 528 bytes .../emulator-only/mbc1/rom_1Mb/test.gb | Bin 131072 -> 131072 bytes .../emulator-only/mbc1/rom_1Mb/test.sym | 285 ++------- .../mbc1/rom_2Mb/baseline_0000.png | Bin 518 -> 528 bytes .../emulator-only/mbc1/rom_2Mb/test.gb | Bin 262144 -> 262144 bytes .../emulator-only/mbc1/rom_2Mb/test.sym | 285 ++------- .../mbc1/rom_4Mb/baseline_0000.png | Bin 518 -> 528 bytes .../emulator-only/mbc1/rom_4Mb/test.gb | Bin 524288 -> 524288 bytes .../emulator-only/mbc1/rom_4Mb/test.sym | 285 ++------- .../mbc1/rom_512Kb/baseline_0000.png | Bin 518 -> 528 bytes .../emulator-only/mbc1/rom_512Kb/test.gb | Bin 65536 -> 65536 bytes .../emulator-only/mbc1/rom_512Kb/test.sym | 285 ++------- .../mbc1/rom_8Mb/baseline_0000.png | Bin 518 -> 528 bytes .../emulator-only/mbc1/rom_8Mb/test.gb | Bin 1048576 -> 1048576 bytes .../emulator-only/mbc1/rom_8Mb/test.sym | 285 ++------- .../mbc1_rom_4banks/baseline_0000.png | Bin 518 -> 0 bytes .../emulator-only/mbc1_rom_4banks/test.sym | 205 ------ .../madness/mgb_oam_dma_halt_sprites/test.gb | Bin 32768 -> 32768 bytes .../madness/mgb_oam_dma_halt_sprites/test.sym | 220 +------ .../manual-only/sprite_priority/test.gb | Bin 32768 -> 32768 bytes .../manual-only/sprite_priority/test.sym | 218 +------ .../misc/bits/unused_hwio-C/baseline_0000.png | Bin 518 -> 528 bytes .../misc/bits/unused_hwio-C/test.gb | Bin 32768 -> 32768 bytes .../misc/bits/unused_hwio-C/test.sym | 602 +++++++++++------- .../mooneye-gb/misc/boot_div-A/manifest.yml | 3 + cinema/gb/mooneye-gb/misc/boot_div-A/test.gb | Bin 0 -> 32768 bytes cinema/gb/mooneye-gb/misc/boot_div-A/test.sym | 120 ++++ .../misc/boot_div-cgb0/manifest.yml | 1 + .../gb/mooneye-gb/misc/boot_div-cgb0/test.gb | Bin 0 -> 32768 bytes .../gb/mooneye-gb/misc/boot_div-cgb0/test.sym | 120 ++++ .../misc/boot_div-cgbABCDE/manifest.yml | 1 + .../mooneye-gb/misc/boot_div-cgbABCDE/test.gb | Bin 0 -> 32768 bytes .../misc/boot_div-cgbABCDE/test.sym | 120 ++++ .../misc/boot_hwio-C/baseline_0000.png | Bin 518 -> 528 bytes cinema/gb/mooneye-gb/misc/boot_hwio-C/test.gb | Bin 32768 -> 32768 bytes .../gb/mooneye-gb/misc/boot_hwio-C/test.sym | 261 ++------ .../misc/boot_regs-A/baseline_0000.png | Bin 1354 -> 1344 bytes .../mooneye-gb/misc/boot_regs-A/manifest.yml | 3 +- cinema/gb/mooneye-gb/misc/boot_regs-A/test.gb | Bin 32768 -> 32768 bytes .../gb/mooneye-gb/misc/boot_regs-A/test.sym | 316 ++++----- .../misc/boot_regs-cgb/baseline_0000.png | Bin 1320 -> 1314 bytes .../misc/boot_regs-cgb/manifest.yml | 3 +- .../gb/mooneye-gb/misc/boot_regs-cgb/test.gb | Bin 32768 -> 32768 bytes .../gb/mooneye-gb/misc/boot_regs-cgb/test.sym | 316 ++++----- .../gpu/vblank_stat_intr-C/baseline_0000.png | Bin 1355 -> 0 bytes .../misc/gpu/vblank_stat_intr-C/manifest.yml | 1 - .../misc/gpu/vblank_stat_intr-C/test.gb | Bin 32768 -> 0 bytes .../misc/gpu/vblank_stat_intr-C/test.sym | 216 ------- .../ppu/vblank_stat_intr-C}/manifest.yml | 1 + .../misc/ppu/vblank_stat_intr-C/test.gb | Bin 0 -> 32768 bytes .../misc/ppu/vblank_stat_intr-C/test.sym | 155 +++++ cinema/gb/mooneye-gb/update.py | 4 +- 329 files changed, 10528 insertions(+), 17407 deletions(-) create mode 100644 cinema/gb/mooneye-gb/acceptance/boot_div-S/manifest.yml create mode 100644 cinema/gb/mooneye-gb/acceptance/boot_div-S/test.gb create mode 100644 cinema/gb/mooneye-gb/acceptance/boot_div-S/test.sym rename cinema/gb/mooneye-gb/acceptance/{gpu/hblank_ly_scx_timing-GS => boot_div-dmg0}/manifest.yml (100%) create mode 100644 cinema/gb/mooneye-gb/acceptance/boot_div-dmg0/test.gb create mode 100644 cinema/gb/mooneye-gb/acceptance/boot_div-dmg0/test.sym rename cinema/gb/mooneye-gb/acceptance/{gpu/lcdon_timing-dmgABCXmgbS => boot_div-dmgABCmgb}/manifest.yml (100%) create mode 100644 cinema/gb/mooneye-gb/acceptance/boot_div-dmgABCmgb/test.gb create mode 100644 cinema/gb/mooneye-gb/acceptance/boot_div-dmgABCmgb/test.sym create mode 100644 cinema/gb/mooneye-gb/acceptance/boot_div2-S/manifest.yml create mode 100644 cinema/gb/mooneye-gb/acceptance/boot_div2-S/test.gb create mode 100644 cinema/gb/mooneye-gb/acceptance/boot_div2-S/test.sym delete mode 100644 cinema/gb/mooneye-gb/acceptance/boot_hwio-dmgABCXmgb/baseline_0000.png delete mode 100644 cinema/gb/mooneye-gb/acceptance/boot_hwio-dmgABCXmgb/test.sav delete mode 100644 cinema/gb/mooneye-gb/acceptance/boot_hwio-dmgABCXmgb/test.sym create mode 100644 cinema/gb/mooneye-gb/acceptance/boot_hwio-dmgABCmgb/baseline_0000.png rename cinema/gb/mooneye-gb/acceptance/{boot_regs-dmgABCX => boot_hwio-dmgABCmgb}/test.gb (93%) create mode 100644 cinema/gb/mooneye-gb/acceptance/boot_hwio-dmgABCmgb/test.sym delete mode 100644 cinema/gb/mooneye-gb/acceptance/boot_regs-dmg/baseline_0000.png delete mode 100644 cinema/gb/mooneye-gb/acceptance/boot_regs-dmg/test.sym create mode 100644 cinema/gb/mooneye-gb/acceptance/boot_regs-dmgABC/baseline_0000.png rename cinema/gb/mooneye-gb/acceptance/{hdma_lcdc => boot_regs-dmgABC}/test.gb (95%) create mode 100644 cinema/gb/mooneye-gb/acceptance/boot_regs-dmgABC/test.sym delete mode 100644 cinema/gb/mooneye-gb/acceptance/boot_regs-dmgABCX/baseline_0000.png delete mode 100644 cinema/gb/mooneye-gb/acceptance/boot_regs-dmgABCX/test.sym create mode 100644 cinema/gb/mooneye-gb/acceptance/ei_sequence/baseline_0000.png create mode 100644 cinema/gb/mooneye-gb/acceptance/ei_sequence/test.gb create mode 100644 cinema/gb/mooneye-gb/acceptance/ei_sequence/test.sym delete mode 100644 cinema/gb/mooneye-gb/acceptance/gpu/hblank_ly_scx_timing-GS/baseline_0000.png delete mode 100644 cinema/gb/mooneye-gb/acceptance/gpu/hblank_ly_scx_timing-GS/test.sym delete mode 100644 cinema/gb/mooneye-gb/acceptance/gpu/intr_1_2_timing-GS/baseline_0000.png delete mode 100644 cinema/gb/mooneye-gb/acceptance/gpu/intr_1_2_timing-GS/test.sym delete mode 100644 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cinema/gb/mooneye-gb/acceptance/{boot_hwio-dmgABCXmgb => oam_dma/sources-dmgABCmgbS}/test.gb (91%) create mode 100644 cinema/gb/mooneye-gb/acceptance/oam_dma/sources-dmgABCmgbS/test.sym rename cinema/gb/mooneye-gb/acceptance/{serial/boot_sclk_align-dmgABCXmgb => ppu/hblank_ly_scx_timing-GS}/manifest.yml (100%) rename cinema/gb/mooneye-gb/acceptance/{gpu/intr_2_0_timing => ppu/hblank_ly_scx_timing-GS}/test.gb (95%) create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/hblank_ly_scx_timing-GS/test.sym create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/intr_1_2_timing-GS/baseline_0000.png rename cinema/gb/mooneye-gb/acceptance/{gpu/intr_2_mode3_timing => ppu/intr_1_2_timing-GS}/test.gb (95%) create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/intr_1_2_timing-GS/test.sym create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/intr_2_0_timing/baseline_0000.png rename cinema/gb/mooneye-gb/acceptance/{gpu/intr_1_2_timing-GS => ppu/intr_2_0_timing}/test.gb (95%) create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/intr_2_0_timing/test.sym create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode0_timing/baseline_0000.png create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode0_timing/test.gb create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode0_timing/test.sym create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode0_timing_sprites/manifest.yml rename cinema/gb/mooneye-gb/acceptance/{gpu/hblank_ly_scx_timing-GS => ppu/intr_2_mode0_timing_sprites}/test.gb (88%) create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode0_timing_sprites/test.sym create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode3_timing/baseline_0000.png create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode3_timing/test.gb create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode3_timing/test.sym create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/intr_2_oam_ok_timing/baseline_0000.png create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/intr_2_oam_ok_timing/test.gb create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/intr_2_oam_ok_timing/test.sym create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/lcdon_timing-dmgABCmgbS/manifest.yml create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/lcdon_timing-dmgABCmgbS/test.gb create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/lcdon_timing-dmgABCmgbS/test.sym create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/lcdon_write_timing-GS/manifest.yml create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/lcdon_write_timing-GS/test.gb create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/lcdon_write_timing-GS/test.sym create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/stat_irq_blocking/baseline_0000.png create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/stat_irq_blocking/test.gb create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/stat_irq_blocking/test.sym create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/stat_lyc_onoff/baseline_0000.png create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/stat_lyc_onoff/test.gb create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/stat_lyc_onoff/test.sym create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/vblank_stat_intr-GS/baseline_0000.png rename cinema/gb/mooneye-gb/acceptance/{gpu/intr_2_mode0_timing => ppu/vblank_stat_intr-GS}/test.gb (94%) create mode 100644 cinema/gb/mooneye-gb/acceptance/ppu/vblank_stat_intr-GS/test.sym delete mode 100644 cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCXmgb/test.sav delete mode 100644 cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCXmgb/test.sym create mode 100644 cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCmgb/manifest.yml rename cinema/gb/mooneye-gb/acceptance/serial/{boot_sclk_align-dmgABCXmgb => boot_sclk_align-dmgABCmgb}/test.gb (93%) create mode 100644 cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCmgb/test.sym create mode 100644 cinema/gb/mooneye-gb/emulator-only/mbc1/bits_ram_en/manifest.yml rename cinema/gb/mooneye-gb/emulator-only/{mbc1_rom_4banks => mbc1/bits_ram_en}/test.gb (96%) create mode 100644 cinema/gb/mooneye-gb/emulator-only/mbc1/bits_ram_en/test.sym delete mode 100644 cinema/gb/mooneye-gb/emulator-only/mbc1_rom_4banks/baseline_0000.png delete mode 100644 cinema/gb/mooneye-gb/emulator-only/mbc1_rom_4banks/test.sym create mode 100644 cinema/gb/mooneye-gb/misc/boot_div-A/manifest.yml create mode 100644 cinema/gb/mooneye-gb/misc/boot_div-A/test.gb create mode 100644 cinema/gb/mooneye-gb/misc/boot_div-A/test.sym create mode 100644 cinema/gb/mooneye-gb/misc/boot_div-cgb0/manifest.yml create mode 100644 cinema/gb/mooneye-gb/misc/boot_div-cgb0/test.gb create mode 100644 cinema/gb/mooneye-gb/misc/boot_div-cgb0/test.sym create mode 100644 cinema/gb/mooneye-gb/misc/boot_div-cgbABCDE/manifest.yml create mode 100644 cinema/gb/mooneye-gb/misc/boot_div-cgbABCDE/test.gb create mode 100644 cinema/gb/mooneye-gb/misc/boot_div-cgbABCDE/test.sym delete mode 100644 cinema/gb/mooneye-gb/misc/gpu/vblank_stat_intr-C/baseline_0000.png delete mode 100755 cinema/gb/mooneye-gb/misc/gpu/vblank_stat_intr-C/manifest.yml delete mode 100644 cinema/gb/mooneye-gb/misc/gpu/vblank_stat_intr-C/test.gb delete mode 100644 cinema/gb/mooneye-gb/misc/gpu/vblank_stat_intr-C/test.sym rename cinema/gb/mooneye-gb/{acceptance/hdma_lcdc => misc/ppu/vblank_stat_intr-C}/manifest.yml (68%) create mode 100644 cinema/gb/mooneye-gb/misc/ppu/vblank_stat_intr-C/test.gb create mode 100644 cinema/gb/mooneye-gb/misc/ppu/vblank_stat_intr-C/test.sym diff --git a/cinema/gb/mooneye-gb/acceptance/add_sp_e_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/add_sp_e_timing/baseline_0000.png index ff29c9a761f073707fba7edeb49d832d9d4650f1..274ead1dea6aa400581617d391509b20149f6240 100644 GIT binary patch literal 1217 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QHkr;B4q#hkZu4^CU6z~frz z_xHcPHTUleW^D}Q`YYW-QJ*RK{<*cV`6A;QDQ+U$Jr0hoDC zed(6m=zlpzI`_8q9)7J*(^tQ#|IpbP)rDteRz+yZ@iO0Dd$iv2_P+O9_f}4=wd3oX znq5_;v#iUbcDH4sYUre&xd+cqEBW^+A~;4%DQf5LyRWZ(=D+r6vj4yNJJx^w8@i=# z?&_(}PW@6c3^jY&bpEIF!yVVE`Ax+CvP4D%o|8)cc>m0skLSdM=lEBPa&DWk{J=MM zzV|7OF!#Zo+H7uhY2^Zw`7J^DGdkn%sL$V@uFl38_e4TG$8~dp>E`!qzE$hWueSLs z@n%u~{pDf4uk;N~PoLb*6_)g;`PQY~p7TB%p1ItAQ!i>sJzv}R!23GoyYg(Alyxo4 z<+ChTy#)eFYedc7sf&B?jKitQRu$rfrZ4J ziF&uP!a{7(Ff)6rl=GYy7R8m*p{krD%!+^6k7xgyf`7V;~Fuwn3 zo$ybaPd)wK-0$vluhXrlcx{~R#{5lbwZwwsd(M7g6)V5EZjP+=Q_20W`4XFcFy3~Z z+&uO1gW@eezCL&ow!JL%qs5Kg=dyO(k9~cuZb!+*!dGk5zCH-a-+kh1LaW8`O`f(E zIj`R&K6Sm;{Ax}Aisx6p1$Uzif0|>e0Kj_ zwc%l9;7(P^J>79O`c=86D}@j5`t*IKuGy7odh6NC^Y%){uh%}l|Ds{Fy0+)0kFO4L z8NSa?shD`xVWqb8IsWg-PxrjgUl70k>-qbA@!!`99%U(PiZww^UGUi3-!%1R`|6Hq z=Y=!xckc_mC_O`X{T+dAYrpOJyeud3+?zRTFV0b)v&8CW>8Iv8hnVd_(f?)a|IU^9 z)d2rhkERZvKioYyVy^q%0=)SksTao8-?2<<=|yNv$*d(eDq&C8u@>Y5@nJ-@au<2$}SS3|1% z{_K#)*7aLHO|ePmsG4Z{|B2?)pJ8n-bxzkDr#yFEE-D^b`00ysM%0n61+gX@nJQ&+ zzTSDMbZhgjj3I%}0MA8`(sh???#=JZhiYyV=;iGZoiW0~Jl4u6{1-oD!M< DX^Kos literal 1227 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|Uz>PZ!6KiaBrR-Y#2hz~kZ@ z{_p?v%k6U>??~W`SJ7#^sh_)p<7jhhFU!q)@5_~T{8>}h@WZL`;KBnB0ul-|3@k(> zWVm?FX)oQ98~rcFulw}VORMgh?8=^g_gLlH6qirIV`Yt8dG> zm&U3nUn-m$D>7Z~+_u+-LHzHs_PsJY)#twT*5AyH|5Nta?zrXPHTi4Xks7tFIqSb9 zc%IPveg2{K39Gn2tERlYac{~~Jze+A!UHGmB-VdAysOA6W7XHJP-_2S}> z7wPN&K0okU%wi6EvopF|`B>T7nVLUa-FG?g;oQC{wX?RYS6SY^w(`fzQ#%fXg%mSK zembeLAau9)zlfhNk0*5etC80%y*%%{ijkQa=HJeKY5fOeek@N-t`B^@>gF^i8ZLm40rvcUMJ~! z;d5Wa!Ab)QWyPrV%Oy8Y{^$1Q)u)-x6~86T1o+~b*LF?te?33lKxf*!wU_%2FE~(j zKI8wkyr^rDmPQ$Ihr6!oX3py+h;?oAbPZ|0_(=9FLGvsGSC(aLY$RTcR;Pxf`s z;ScL5)|>sL`S7=MVqtun@}{Kkb-lOiR7dpk<~8f`cNa{!y84tXd!*xe>m=6a2Osd9 zYhE2Zi_!Y2`{$Ys4@(1gs!H0p=&$RJo9&x*#9)1m?dFqgnQuSU6gH z!DDgXcCD|MW=50^xRnyUeE4W`6nE*bCIw7z9+%$<-vQh9#$<+ z{yYEh%!)HM_kCQ{%5AjlxHHcW&SNJ{D->L&-ws*3^~;h?3-*|lN)?qm8M)XO-ub9u z!4FDJaOc4?1e&Xngw;>|UgRCzwsl?GSF3e(zXYGwUJMOhckD4R`Tcm$u3dUg?Q3`2 zB$b~_S04Vhl-V`;<9jvFnBYfM;`ZqrRwrhyPgy5cG+TK8BP*aem%ALpWbFTPyb{}} zl+mFUrf|Ob>vsvh=-uHRZu8jHcR!yfXU>1E(|G@sdEw`>)!#0^@oL$I{j*a{KVGoy ze7s!Vkv;O`^Xc-Be((J8z4`0&^5^%t7xc3Oo#Gy_y+hQ|*<@oANq!?OBygyHE*|3E Vf8BS+>0O{g%G1@)Wt~$(695N9R-^y` diff --git a/cinema/gb/mooneye-gb/acceptance/add_sp_e_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/add_sp_e_timing/test.gb index afb22740c865f23eb9b895d5887aca10cfc53289..be6e3115083a36eda447bf230c063d8a1d734102 100644 GIT binary patch delta 1222 zcmai!OH30%7{_Nz00Ta#71LlMyN$sbqoIk3hR9}VdD$Uuf+odyzz0yOSA7 zGD(tY;VKiTyn$5ZLKr*i|ObJj!(2*pZM9kk9=9V^;C9>%VlGQJf zEeAkh6htFv7>%J(G=av^Bnt5ajd4K|{mLiMsFr-^0h-W~HC{mDTC%ap;RboZ{lmEp z9`whi$UtnG-04^^sK{IjFQNK;HUZ492uBj@@hK9UA@OMvn!v*pF51u0*&3hE+uhUN z`RL!Yv(dk3Kbm5%dwo6Zz1!^%y=_1VdvLIoA}kA{F8dh`2DGbU0Ui|b$OrpDbx147 zvEZ0BP)ajV(^`vZ#-<(+g*sSofRc!Zv%%b4YB^fvYr28cFnA{7v0Mg$|0>_qL6-qO z74c{;a5tB(d{;N9H4KJCJh8VyAmf`mbg<3MhxP+CPVRyhebZ{_=9bZ2J)w{4|Bfscy0nzQnI&+g1pz}*o295rD-1zn zmY^w9pwPp|MBI^8wF;^gP;G-8m{T}`M3b3kC^PrZv!@I44(A7sA2@laqV&8?=vA-4 z$29yj`e^ji7@%P-6?i9o?`i_DCc?;xTnHjJZ$<+D8#Ty%P^gv*t%VmH@|GN?tD^T!-ztUbMu8iKO_RL delta 1511 zcmY+EPiP}m9LL|AY|=DI+ssbd4qdQsqAU?XS_HQ$n@!TDNjBpKnqUte);|Xi6)z%6 zx9be(MfT$2!Jede5d?|4LeWEcSa<0-3=1o}p0?z$F77BxVU^tuCgbnDmw9wUW_aK4 z`~5!O-#jw0ZN;{gZ_i;XFb1^Z#&K(=}n<1F$HYV(88utW7Xj9+7N z*A5@dC+QzIul@@=T_Z`~H%2K=BJZ$P4E+oR$GuhT`)R(~FCu@OukIF0{up1~-+j6M zXXO#v@N@KH#-F5btldkTWK(>$kM);w)SsfkB=x5$B#4b@yrSJ(j*~t@>aU>@_U{E# zv=&U$R*<8s&~jy7xqkX`HvWC-V8r_1ySFQ_*C+Vv6GX}=8@i45yhA4UdGf@E7e+~-Knm$kw;ASU10YhNw*89 zaF^Gl%k6e`rPFAglSPHb`gUO&3h@nIlIc|29kN_*nAIiZ_$s~VAEz6>M%i?h7!Pd* z8l25>dVbxTGB3b21D6)4^mJi@wcMQ@Rz@Xh#nB+WuzQJaV5rW*s!WmrU zQYjCemr3R&E+vyq{e=Lrqka<-zTr|? zLU>zju!J}yj7JIAg+C0q&6N!Jn@LNT3GNy&QIkEsQbjn$S24ys2F$UDnHT<$ImeY` zp5am=+0ZMZo(=sj1ia3rQb%}=tt_1m>{GKW3bog1nxxE^3c*W2+{D{rZuds p$XY9^U3|Ru^T=P4rC&!@_3_f5Bfl<7Z$_4RwA2Z&RFs+L{s*+d@}2+y diff --git a/cinema/gb/mooneye-gb/acceptance/add_sp_e_timing/test.sym b/cinema/gb/mooneye-gb/acceptance/add_sp_e_timing/test.sym index 71a70bfcd..35c7019e8 100644 --- a/cinema/gb/mooneye-gb/acceptance/add_sp_e_timing/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/add_sp_e_timing/test.sym @@ -1,206 +1,144 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/add_sp_e_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/add_sp_e_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0150 _wait_ly_4 -00:0156 _wait_ly_5 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0150 main@wait_ly_5 +00:0156 main@wait_ly_6 00:0180 test_finish -00:01c4 wram_test -00:01d3 hiram_test -00:01d3 test_round1 -00:01d5 _wait_ly_6 -00:01db _wait_ly_7 -00:01f0 finish_round1 -00:01ff test_round2 -00:0201 _wait_ly_8 -00:0207 _wait_ly_9 -00:021d finish_round2 -00:c014 result_tmp -00:c016 result_round1 +00:01c9 wram_test +00:01d8 hiram_test +00:01d8 test_round1 +00:01da test_round1@wait_ly_7 +00:01e0 test_round1@wait_ly_8 +00:01f5 finish_round1 +00:0204 test_round2 +00:0206 test_round2@wait_ly_9 +00:020c test_round2@wait_ly_10 +00:0222 finish_round2 +00:ff91 result_tmp +00:ff93 result_round1 + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000002 _sizeof_result_tmp +00000002 _sizeof_result_round1 +00000030 _sizeof_main +00000049 _sizeof_test_finish +0000000f _sizeof_wram_test +00000000 _sizeof_hiram_test +0000001d _sizeof_test_round1 +0000000f _sizeof_finish_round1 +0000001e _sizeof_test_round2 diff --git a/cinema/gb/mooneye-gb/acceptance/bits/mem_oam/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/bits/mem_oam/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/acceptance/bits/mem_oam/test.gb b/cinema/gb/mooneye-gb/acceptance/bits/mem_oam/test.gb index 9ad3221936b20ec60f48c5d390943282862c0e99..4096ddac7289ea4df1a86b71cd4acbd89ae05f91 100644 GIT binary patch delta 360 zcmZo@U}|V!+Th2SEbH?5Y?X&1!#}nKcK^%k{{27H&S=K~WH20B!l=xu@anT-8ROv( z?q`>HoW0}`l3HA%;P1^K#&GhpVjn`>&C%1xO2N^`N5Qa|LCgs#xf&t4*_!F7?L>jD zO%5N}>kSzmFtU0aeG0VnY?{Z}89=LNoK$r9fBN4Cmw){VzkuWfFbQW@Emu%yW9DNO z4EbD?+0F)c7hKa z?EXA(KfK-pWNY0Ch=r&3oqWJ(*Z6>Gy)6R}DEvIBD9|9t;K2BS{qRnY+Gq0b zFQ}YUWN2VyP*{KXkVnPF6H-dT+!EizfvhSeZiydU%*#(GN&Gx`_O!>*lbZvXG|T~0 Cw4ylx delta 1542 zcma)+PiPxQ6vp4IEZLFd*z%^%;y^u8LQp9b7ennPM6qnklA^@|OT>p9Ovs@J7hghY zvD2)ey_8(qQ+x_0mxMrZ{$i4YSsZG-EK4Ae_LQJQ2tf%!kbq;+N`3Q2JFRFb720LK zZ{PgBH&1^m6|GXyZq71m`}$k&NG=Y|&|0eX^~Gju>mEx1E?^6^!$Drdr{3o|uT_Zi zRqrZ`Pqf@-eY*JrZ{Yn$-dMiIqoKh5;9$>(y+=RzBmu@B><06qrqNT*l*+tVfI)CN zC@=q_Ed3XzPMF@AblyD1)27KkJr9GEovcyqe|2V6#g((Pelplg*dPnYj{p+!XI|ac}h48_6-YPBoEq zsg#*3=ZmwdD4Ad0NFKyO_LxedG=4F>%rrQ)nEh>Sz`jt^ZPA@2KT=q2==OYLz+PDP z2F(?`hVarGG5bWaPi%QH+&sWvA=G$Ar@&8leI7emV4vkhuK~`%ol2f$8IoEWSW!MW z#-YLNVk2zdPsR|+zL0*L!vSO1VqcLA77Iu)`q}p+d$@doTR`S2dD;xHt8%Yk0y6jc z%m>n!OtwQxA%7#OkYX}5SZBiCG;&EU7LA<$`tbwNyQXhUy&d&>T{UzGf8b4*oJ%{5`vhp z-%ofX{dT}pQYzrJkd~nm+(l$UK^$Mp01MM9Aeddq?Dd%m>9?69q!jZcNre#IBuqe87KJhL52c@Q{1E+Ooiw%wb3BI`GVE_OC diff --git a/cinema/gb/mooneye-gb/acceptance/bits/mem_oam/test.sym b/cinema/gb/mooneye-gb/acceptance/bits/mem_oam/test.sym index 9cc9099d8..72dd8a625 100644 --- a/cinema/gb/mooneye-gb/acceptance/bits/mem_oam/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/bits/mem_oam/test.sym @@ -1,212 +1,50 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/bits/mem_oam.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/bits/mem_oam.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48af clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48b9 memcpy +01:48c2 memset +01:48d2 print_inline_string +01:4898 print_load_font +01:48a4 print_newline +01:48cb print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:0150 main 00:016f test_finish -00:0183 _wait_ly_4 -00:0189 _wait_ly_5 -00:019f _print_results_halt_1 -00:01a2 _test_ok_cb_0 -00:01aa _print_sl_data55 -00:01b2 _print_sl_out55 -00:01b5 fail_1 -00:01c9 _wait_ly_6 -00:01cf _wait_ly_7 -00:01e5 _print_results_halt_2 -00:01e8 _test_failure_cb_0 -00:01f0 _print_sl_data56 -00:01fd _print_sl_out56 -00:0200 fail_0 -00:0214 _wait_ly_8 -00:021a _wait_ly_9 -00:0230 _print_results_halt_3 -00:0233 _test_failure_cb_1 -00:023b _print_sl_data57 -00:0248 _print_sl_out57 +00:0176 test_finish@quit_inline_1 +00:0187 fail_1 +00:018e fail_1@quit_inline_2 +00:01a4 fail_0 +00:01ab fail_0@quit_inline_3 + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +0000001f _sizeof_main +00000018 _sizeof_test_finish +0000001d _sizeof_fail_1 diff --git a/cinema/gb/mooneye-gb/acceptance/bits/reg_f/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/bits/reg_f/baseline_0000.png index 34b4c1a3f291f5e623d75df9a074236f13ef3f11..043ac45a04ca603bd188e422142e1d58b26609fc 100644 GIT binary patch literal 1148 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|Se*r;B4q#hkZu?@n8+Ai!4W zfA9a)yWHiH{7%h(d~TgzHM`SoV>0Km#?IUO-ZPf`{QQ<7L6<{}{oo^o2pN{{=7d54 zopb6f8*-y#=1mgIzwK7_w&nas^~YzO;Pqk)3@P)vUVbXYaJS^D}#5P4_%0 znbqq9JEJpJ^2*KHxBSS=)RVS5{$9RiY`gCD^G{PO+zYDi9@II}eDr1JqUYxp$IXiO zn>i!l`Q>x7U!1Eh$n1I@JMG!@>p!>MEu8l4>wNa_Eum`<_RilHn00?=_RZC{=YHJc zIJ5k*s_Bh~&(Bx*T&+52bc`@g}&PF7LQ_>+xB+g4p~7nNOgEgAzTE)Kte}Epz>g*m>cV-(9Egir)O%`q>d_*+ap* z0{@na>#NG<>-)a(E6=Woxl~!GZU0_lU*1fS@LT_4>M9Od{8|4oxY^rSY|~=frC;3^ z&)VDe?NIULH$rcYK2a*LdtGSye_m|HoE?{@%z9Jx*k<0+bDetw>dO9RuP%BjSM!=} zj?eC$rcZYi#(c~BslT6*{aEu;MSj$jj>W+UU%1D7IC6jEF0s(6w_W=G{jLSA`&=e2 z`n1w*ehzQm%y*Wn({^u_ZeiVSpm!|yw9G`&J?rc9E)|Mw-~YAl!LCZlwl8A}>gRzpVA{hb*0|QH_r;B4q#hkZu?@n8+Ai!4W zcklny&EhjnWtK)CI=@7B->#dTfo}qu%qG0~R%18$!Kcq}8IHuLNc6EBo|s@E#N*!d z(8FMkyI1DzZGTJWi9Nr)b~|6@7x#9VvU~Tpa&3I{#W`xu@z?YB2z}<#3JcrkU-bOE<0tNsd%fDoe#tW(Q$`;x`D4oUg?aKv;|$lkyjFaDVa6Qit{;0p zTAuSi9nXGu`vVRBHsyl_XwH@4Z2P?9-qD0BC-#N<)&D&Aq@+00_|Y7%-47JsIG?)q zC-1q+gB4ZtWuMzf?S66n`Nm~=TF;9=d7bRuv~By*pNFcilg%SC4U|5kg|~ZOfLzImC6eZR4_IoSQc?GM&s{0;l6`Z_`7-9) z>WHPzz5f4Fyx~9B9TMH=v{ygNUoG@^?)l_B=TttX@|gZ!e>h)!ujKyfuO|OCb7${1 z_1u#`Kji4OO)1*vN-fGRrmx|g|EO#^>-ju~YnpR7SBw7ejQnhC{%CKO)^_VZ2XFoV ztSR-VrLd4c@5Q3ewOvcEZdp>J=n!`$b$YeHO1-M1&-<1J$U)LPR!5@?vg=hmcpovh zd(%I@qtolvv$dGTU4Of}#ufJF9&Gp8KJ6&KeW1yPrtBBu!rRjC9puu}dor(Z+5_!% z&gJ@le{?Uhe--;ze{bvC70qp`ZjEmj9p$c=HD&*sH>>k*xlU$X&iOw-C`e9*t6n9$ z)u!U5*czLN7y*0!w(SZ3f1l#rpB=07oWE}Wf|&~vI|EmAV+mw*_kwdX<$|C2r=Qo- Ul+k;27*x)9y85}Sb4q9e0B=w&YXATM diff --git a/cinema/gb/mooneye-gb/acceptance/bits/reg_f/test.gb b/cinema/gb/mooneye-gb/acceptance/bits/reg_f/test.gb index 4326468feb14ef113b8d94da0a9ab397a6e15e4c..d0dc344184e63329903aece5536f40f0d1e318ec 100644 GIT binary patch delta 1063 zcmZo@U}|V!+Th3NSuFS2@ZW#A|5rbLm16)B7Y}|m?D+rm>d~);3=h^n=y=fepz}e` zgYE}?4|*R=c+hY6;X$`z$N$s!>=+*Of*9{UD}Hc4yuoYpM8-_JO%5N}>jfMBpDpk{ zyTUstH9fPqB(PC7xHz?_Br`t`F74z|wOvC9qBkV9xI`f> zF*7GMh2iA-@DCmFKrIRi45ytnG(nmffP|F-!-q!y4_!Moc+R$hEL2or5Rs@C1+x4> zY9+XVECmQ)IPDGA=myi+;Qyf$RU>wN5a)nw4h9?G1T&!7|3eQp1L`qsjs|OVhG}f_ z|Im$1Bf36>&BUlU11tq{6F;K)`-xDu(=p)fCtQgcK;6( z2pItMKQOSW!5V#F8r%Fo^b^tu(s#JPTNoT^j=;#30>-K|nCAxN2@33<(w{`D*T z0+JKJB%EEfTtS_UnUA$zj6;rBO;k_Gq2jEkcO?*40dX}D*8p)X5KD+U*f{}dG~~b_ z@pt_Lrw7gtydQYk2|jSJ`}4s4aJ4tc*18iA3s3Jm`GC=`@d49%TLvId_<8af|35AZ zreo~K43thP3N#2ZxH>R?U_adNUHeS_oxDwJ{sonjiVO{m3<~QH&+z_w+Wc&U_s7E# p-W3~9NGS<(OMDLpvZ|E0C4O)*FF&Cq@$=x>h2BR`0<&|F2>>f1r^)~T delta 1373 zcmY+DUr19?9LLYO^UvI-ZeFvCf}X92MG#7m7BrnYx4D}GH}atei5_||dWk61x`TQN z3GykQ!h8vWSY;sfAh#s(a=Ao-^_1+PdRQR~6LZwo@0_!H(6L?4_j|wR^Znh!ZYCpT zGSagV+&^@0tE*IQFR%aFZbxwW@Mf#asefC4w+(jI@6@mR>vZfy)^0RZ$h&oL%#9Gr z*R$2;%GucBBRn3O_4;1)6>7B`&(~T5vRm01gVkift^A?RGO3mixs~7Dh96}xBH5MQ zs2`Q^JYuW9vUzK*Fj%@vig3M8isrJB&GqL7a*5n<$d~I2{mn&JyfN!=%sLgb$_YQ2 zvobM1>?`fvHu+d1o*G9(b&IpT{>Xvj0i^u%Asx@eERU+VMkCR9DjgY3A&aQ=+e5EK zr@j>I##xqehf}G@XgZ!85uspwaw&Kag7_ngc+!znnhb^GYGe=@d7pkW-=t6HWt~o^ z@$t}HQP#(bP5Stx)uK+puN8iB(WjpYHqtHMJ4(&u2SAk#_7pH^b_^yN$0y@-RtF)- z90>N}2$ND6;UvFtnxG=qlSP;QD(C|!zQlb$LCs2shOaSMolF2h@!~s7Itl+EGXcyw z=1D^cFYvvTiGW#WGhcI`Gw~Wz0{NLqfutvs=XpXjWTv2DmuaaVVaG6g9NOT329Mp) z#{EjeQKm#g50j$7JP$~fdC~yF=lE8NlmO|rkypUi;OHvMX%-XA872jjPW_OB=uuyU zhNnzQg9tD28?>Ps8XD||_uQ`(d|^ry{G?J-M1wg2Oq8IHFGUb`v6X`|tAJT=GXvbO zFguwN%w8r1k`6t}^K|H|P;h}sDTeR_U1fNZpppSWK^er1XwHTs|1Vp=d^YQyi%_)s4%)LMn8;VPkERluR_7*Vs+ zI;NVPiW}aD&5jzB^wb%l#`%(~M_R32?F<+)4y*JCYX}L$81yx2!)exuvUTCEEJ diff --git a/cinema/gb/mooneye-gb/acceptance/bits/reg_f/test.sym b/cinema/gb/mooneye-gb/acceptance/bits/reg_f/test.sym index 01b7077fc..586d0db1a 100644 --- a/cinema/gb/mooneye-gb/acceptance/bits/reg_f/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/bits/reg_f/test.sym @@ -1,192 +1,122 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/bits/reg_f.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/bits/reg_f.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:0160 test_finish + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000010 _sizeof_main diff --git a/cinema/gb/mooneye-gb/acceptance/bits/unused_hwio-GS/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/bits/unused_hwio-GS/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/acceptance/bits/unused_hwio-GS/test.gb b/cinema/gb/mooneye-gb/acceptance/bits/unused_hwio-GS/test.gb index 70c39674c07c62c1bcdbbd05a34632ed94e4b2da..048b76d8a3dd3ab4954252e03de227f36730d7ef 100644 GIT binary patch literal 32768 zcmeI4e{9re9mk)$9_{rfUshVa#gpE(XDJBSmQE_(j_YwPSLkd9tsPw_(2l}Hpc8PV z9M|g@nZ)Q^WEo_bj_5*+S#U9CnM5sVm^9_YWm$A_#G5*%=oBQ&N_Cvi=broC_4DKt z|6cU-N$nB9X z+gJ8ozjp1d(-$u68rWCzw=37)K0SWn)z$vJ`}gnLd3fi_UH$HZI}aQby}d$~ZM9fw zmfiO3upPY-OGa*tCF3ooSuQ4$6ZPp5_4V#l3C~kHwQi!WPGNJXmoR0IMx$w{PPi5A z7M?eBN<{0@HHW%`sl1t)nUq12azt5jX2MfxN3+kH5i=QAmTJM&{6r!lJ5wOI(retK zQz9|fm8PD-RC6pAQzn>Kih+5(qEjN4b!Dh)m@;A{m6L>{S%P^PWyk zOr$RmTy2XgcAzAx*NJr*S9)4<_N#SjoupFJl513xm(*5F)eOakGS?9x7*lvgb?W92 zm|)aYUW$4VQ^|x7nR&@K07=)hPLaFt7N&BNBAIciMbyjLFPevv$dSJlGo6_?p8GK6 zq+J6#MY>L4DxY?p*D2EVCZ-B#*S~a%ba`@75{0yDgHDmIy_hPZUEk3u()B8)ifPyH zb&7P&%R_4{p3x4MrfO-| zLpnvyYYbD%XxBNNB3*GzwbQQKIz_rF@=+4^)2?+oMY?uk>I<~%8#+b0UdB`h?fQ*Q zk*<$0)k(Xm3s4fB^qy$L)C06@zfO_!dKOcgY1ajvB35!*Og%`uj_DNX`T?f4(ypsI zMY=w~R4?uNL@`RDm);Z2n0knI?b0c7Uf;x2AMN_FPLZy+F!eC)O6nBp`cw%@;!Ct^ zlTMMY$1t^xc0H$4r0Zvx+D^Ovs8ggXe?D5{4%+n@og!V`nChopM|6sGoyF7u?fRuo zk*@bK^$6`MHBb_d(EI*#nA%CZw&@f(uj7~+q+LJMDbn>irgqV;4|R%keR2UxVmIwt zuT!M!QA|BbyPno5()ANeeVKOsPNzth?H;toJ+y17PLZzrG4&PNbwH;`*J(`crCqWruNaU!cvsPK6>BRV`@L`>d`53UPm!CM7zGHQ>1GOQ;*TEf9MqHDqDz>_$uxC zyiSp>9hf>myPnc1()ALi4$`hSbc%G{!PFtzRau6TI7IJ>7EFDOcJ0wAa$e71>T%lj zicXQPYnU3QT{-1wjl=XBmtpEK?ds4ea$bipHA1_d*D2C<5mQHK*Lylex{4Q}BqFqH zwN8<)t(ZDWyGC`2biIhFDD9foDbjTdQ=_zNk%^KRCHKT_Pop_`b3^<`;rO4!UGk%E zcgH4CE~cU#)zJ;r(Len2g`Vo@3qQR)a^s0){JMGDGmye1+p?w0-P+vN-VzdUc1qxF zZ56Y}lJQGmOMRs0cCY#Dy^X6I>g%#p&*qMGU}wwvu9i^hvq0Oo zvK<>by3)M-kT5PP%7at0vE;Vdv1E_uSaNYysr)G|wcR7)SHn}YPb7P0pGW&G@PC>laO1^>lvSpQdCST$}(WzzJ{yoB$`l32*|O04Kl+Z~~kF zC%_4C0-OLRzzJ{yoB$`l32*|O04Kl+Z~~kFC%_4C0-OLRzzJ{yoWRE?0r?l@nS#G! z&oty4ZvXG)0oQbHInyPC(+S6GWzFq}Baw)Dz;UN@$&%Vym#d(_=Yuo0Z$Ei*_wMrY zWy^ANq2J|#?_O3^)YMc|C|-HtJ(SaF7(f_?Iu5T6S#TWsmoIm@{C<~f`EqDM!36z& zcvfxe**XK-KA&|o`>J@mUAf)vKmhto)9Ve&@_J1Z+D@lwg4^kIxuEUy1%nQUX}aBN z|6A=~P>lh6ZEZLli70TFnHD0Jq`$&-D3Znw*2%JO>EEPx*# z4u#+W&(`_!|3`?0LQPFpKlEDtkw_pgJRFb}i9mn0t@4KPW3e-5tn*>z(I`9zgTSjR z3;Fx~&~~|CH#i&?9}0!Tot;BN;czGf{Vsx;_ix_3abs(% z^1EDB=~CBMtxp+%pWAP@TkG%aw8n#e!ze1Ms#52Vj>243sqxfWtm`>825qk_wZC9q zZEfA%0|VClphxXOIKR2Ms%qiFtS`G?)cTs5;BJ9Z`3C~(-f=i!ws3t@=jP`Zs(!=J z?_Z#xl+U{F)G>JW`RsPTzqNJkT4+Hsuz&me`}&{_rS569e!DEcKNz%lb;rP6VC`Si zG>oPuLzX&Qh{neD_E4y?(cw_5X=;Leyk6*sy`7FTb$>(Kx+9&=p&?kg*IQd#SGQsX z@ZeRY@`YoAgT1|wI=qKkwW^^3F1l)|8Cur|j`j8R_XmTpQv(5LuU!kf1@1w6D$^A! z8X90+=u@jVO_;lC8-~vZGsun)W7X6wUab0I4`zSAz_Bq|y}g5j*?!mqbK7bU7>2rM z;WsOc0=&y*81Ua!7>3H<%F5a?aQ%y9Ii1%0;H-v*_I7xMtDY@r*NcR0Uii|x@sV(R zFdYAW*dtC&c>>AlyEj93pLWm6=WnN;Gw(;vxtHeVl*}u4E-9`lTU8Ypj-Lo0mX8tn zI3gbr`8X;cW?8@=l&{)PK$st$PXrU|6Ppqn{R5;p%> z!hZffn56s8)b;sy3!3b&<-Jx{HRUm43q-(nGjH;0_~`Y@zgPN>@Bg)T$|GVn;XXh4 z+wcd|Yvi}}Z%v*G55Ig_e!IWW{IEy98>uQZX9{x8U9K|kT$Fz|aEZUh|MB^UC(ncv z-~>1UPJk2O1ULasfD_;ZH~~(86W|0m0ZxDu-~>1UPJk2O1ULasfD_;ZH~~(86W|0m t0ZxDu-~>1UPJk2O1ULasfD_;ZH~~(86W|0m0ZxDu-~>1UPT;>L@E^649%=vp literal 32768 zcmeI4Z)_CD8HZ>0jD7ygItH_b3*NIY=1hRvhJ*`s&gbLKKI2R5*d`9fiNOwrlmJeF z#xckF5Uo;#suq&K*sy&E>FFV~C`-xW zPjB9EuUB?oCCS)TC7If;>!l<)m8?w{Qd?`7g}9#=sfJ`t4a25UCwNMY$Kz?Jh8T=C zi2E&(BJrAZnMU2_shnH4ZkYy3(h+H)Gb8SDm79IeEpp3tWvDPu&77E+pq(ZNuJjr= zixiod?n+Y!c&agxNH7!3%Vc0)r$mY*GA^6C!c$rTr5p}!jT$~;HBZeQC8PF;>FjHX zyG^7Y< zL<)7y$l=ylguCt)Db)1{PtC?%&x#c4`aVyUOZuB89sC$WxuTD<_{@V<*1G#XQx8 zyE;V*o!4_bwHkLF6)Dtpfu|nDT_1@Q>MAbalIX@=%S8%xJ4*0xNBY^mqZV~CmMNbE$-SVQs}(C#Z$ew>t`Z`y58Zb$8pz`NTIHKint`6 zz+J5(g}R>MsXpBGf=HpR*LZ3j?)tMxp|0GS+#1*8t}lrc>RQcH{kUtFNTIIdJT-v3 zel1d{>l2=O5_gqoToO;>`~Cr*+JL+IL<*hPH+X6gcl}hPP}iG0wGnsS6e-kocQKd5 zCfv1Bq)^vWJoOar`nE`+u3zxfS8&(wMGAE(cX4anjJp9py${Lt}8q>jJq7A+!}}RHCFS~bGWNbq|kZocP$ku)U}4EcH^#5kwRTB@l+gljf)iOy3SLhxNDBiB{7QbiIgXjdLWXTYIPfj zQtNbgU~2r%wa}e?#w7jxjxjm%vQd!jD4J2~oL^Wqdr1Y+KT|g8se-8P>WV9Ek6k4qRdFrMzAerz2V2& z!z;VOA@kRdN|Dvu%6gmIy3%LTUrwfm%SwY|lO)+UsU*AIj^x~m68f*CM7fKkt~HNM zs>$xjtYlwNV%KqR$;fddE1T$QwsPTe>fY#^=X9lVJh$fkF?tzfkqO8IWCAh)nSe|{ zCLj}#3CILw0x|)afJ{IpAQO-Y$OL2pG69)@Oh6_e6OakW1Y`m-0hxeIKqep)kO{~H zWCAh)nZV~0pl_7h1>Rz}EA&9t|M&8MYdXC+(}fVH6WYDBOz(%5Sd4u^yVE&;zSrw= z<>l4a!x`(=9Xz;cQ)y{+b#^xNyIk-LWLa5NRaqJ1nHP?sIGvjL2&Sg7cKDt}3$#Q3 z!i6rE-|uoQTnIHNFhRc`K3U!Rw9bHfeZAG1`ObJ%Wp2X=1fWmXJ)R&f9*?d=-RabI za66qY7u4(PgTbsUT{jH2|E+p3$i@KP>y1QWG3JlQ1A$mfRjvN|dZ@z)jE~3p@xcdQ zRzExT`&Biw24>Ez*Q&FGva@x4-8x-odBdDxrfjxQV|~Ct&F2e+U_FGevtfmy(2*kt z5BByNhRdbX;_^I_%jID7_!z_Tk0`TPA)ce!9UWMx@=C=`jbw+{_PBB2oU!$_>K6*o2x46I(= z($Yu^^aq3e{T&^vRy8#-zspsTF6{cU^)UnR)B9D`T7P@HH6HY9T0ucY1v`Iq6z0kb z8;`BUx}JOXK;1(N+g~uRmX_742L`P9K@Z!7aDHQBMa8UH8DD0GMD13*j zo+(fte&r&43_V}J*-ei|D)RMP&~nz8QBs+&|8x16n!$B21EpYxAj zoc^Hy_}Q_O6Tyj<6Ri`g{KXRi|Gy`i&ubCx5&lHvi@YCDJSVB_kHE9{c^%>Amd>tl zM`!w({FD!#y`L;kp7JhNPMS=9V`pc$qpPLuVH@(cjGXe$frs>eYa-ms0Ap9Z$=z40 z>0jenn9NL$9GYB6pT4h7_KnaN19s7`x%8`K(wltHI}^_Mp#07(<0IY#gLe5JQR37b{5ktl7fV}(H`^<>+mJ9*k$3~wE5WbJN)%+kx1on~!D zTPqdln(}qC>V&;U3mI>v%0p(G+C-EevQt4hhbj$A`6_EqD=(TgTluzGwUv;|RmQ^r zopgZPW>pOm#j(m<3=A-r4p3Z3Vew{+Y+_ z9U%d(oH2LbdVC|X{$YGqoY>SN*;Z|Y7g1y zPpqaekN(PPkJ#vCt0_7im2c5}{{MZlMJ6B. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/bits/unused_hwio-GS.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/bits/unused_hwio-GS.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48bb clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48cf memcpy +01:48d8 memset +01:4898 print_hex4 +01:48c5 print_hex8 +01:48e8 print_inline_string +01:48a4 print_load_font +01:48b0 print_newline +01:48e1 print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c017 regs_save -00:c017 regs_save.f -00:c018 regs_save.a -00:c019 regs_save.c -00:c01a regs_save.b -00:c01b regs_save.e -00:c01c regs_save.d -00:c01d regs_save.l -00:c01e regs_save.h -00:c01f regs_flags -00:c020 regs_assert -00:c020 regs_assert.f -00:c021 regs_assert.a -00:c022 regs_assert.c -00:c023 regs_assert.b -00:c024 regs_assert.e -00:c025 regs_assert.d -00:c026 regs_assert.l -00:c027 regs_assert.h -00:c028 memdump_len -00:c029 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:0150 main 00:0161 _test_data_0 00:0177 _finish_0 00:0187 _test_data_1 @@ -497,39 +335,357 @@ 00:1807 _finish_152 00:1817 _test_data_153 00:182d _finish_153 -00:1841 _wait_ly_4 -00:1847 _wait_ly_5 -00:185d _print_results_halt_1 -00:1860 _test_ok_cb_0 -00:1868 _print_sl_data55 -00:1870 _print_sl_out55 -00:1873 run_testcase -00:189e _wait_ly_6 -00:18a4 _wait_ly_7 -00:18ba _print_results_halt_2 -00:18bd test_failure_cb -00:18c5 _print_sl_data56 -00:18d1 _print_sl_out56 -00:18df _print_sl_data57 -00:18e3 _print_sl_out57 -00:18f1 _print_sl_data58 -00:1901 _print_sl_out58 -00:190f _print_sl_data59 -00:191c _print_sl_out59 -00:192d _print_sl_data60 -00:193a _print_sl_out60 -00:194b _print_sl_data61 -00:1958 _print_sl_out61 -00:195e fetch_test_data -00:1978 print_got -00:198a _print_zero -00:198e _print_one -00:1990 _print_bit -00:1999 _skip -00:199a _next -00:c000 test_addr -00:c002 test_got -00:c003 test_reg -00:c004 test_mask -00:c005 test_str_write -00:c00e test_str_expect +00:1834 _finish_153@quit_inline_1 +00:1845 run_testcase +00:1863 run_testcase@quit_inline_2 +00:18e6 fetch_test_data +00:1900 print_got +00:1912 _print_zero +00:1916 _print_one +00:1918 _print_bit +00:1921 _skip +00:1922 _next +00:ff80 test_addr +00:ff82 test_got +00:ff83 test_reg +00:ff84 test_mask +00:ff85 test_str_write +00:ff8e test_str_expect + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000002 _sizeof_test_addr +00000001 _sizeof_test_got +00000001 _sizeof_test_reg +00000001 _sizeof_test_mask +00000009 _sizeof_test_str_write +00000009 _sizeof_test_str_expect +00000011 _sizeof_main +00000016 _sizeof__test_data_0 +00000010 _sizeof__finish_0 +00000016 _sizeof__test_data_1 +00000010 _sizeof__finish_1 +00000016 _sizeof__test_data_2 +00000010 _sizeof__finish_2 +00000016 _sizeof__test_data_3 +00000010 _sizeof__finish_3 +00000016 _sizeof__test_data_4 +00000010 _sizeof__finish_4 +00000016 _sizeof__test_data_5 +00000010 _sizeof__finish_5 +00000016 _sizeof__test_data_6 +00000010 _sizeof__finish_6 +00000016 _sizeof__test_data_7 +00000010 _sizeof__finish_7 +00000016 _sizeof__test_data_8 +00000010 _sizeof__finish_8 +00000016 _sizeof__test_data_9 +00000010 _sizeof__finish_9 +00000016 _sizeof__test_data_10 +00000010 _sizeof__finish_10 +00000016 _sizeof__test_data_11 +00000010 _sizeof__finish_11 +00000016 _sizeof__test_data_12 +00000010 _sizeof__finish_12 +00000016 _sizeof__test_data_13 +00000010 _sizeof__finish_13 +00000016 _sizeof__test_data_14 +00000010 _sizeof__finish_14 +00000016 _sizeof__test_data_15 +00000010 _sizeof__finish_15 +00000016 _sizeof__test_data_16 +00000010 _sizeof__finish_16 +00000016 _sizeof__test_data_17 +00000010 _sizeof__finish_17 +00000016 _sizeof__test_data_18 +00000010 _sizeof__finish_18 +00000016 _sizeof__test_data_19 +00000010 _sizeof__finish_19 +00000016 _sizeof__test_data_20 +00000010 _sizeof__finish_20 +00000016 _sizeof__test_data_21 +00000010 _sizeof__finish_21 +00000016 _sizeof__test_data_22 +00000010 _sizeof__finish_22 +00000016 _sizeof__test_data_23 +00000010 _sizeof__finish_23 +00000016 _sizeof__test_data_24 +00000010 _sizeof__finish_24 +00000016 _sizeof__test_data_25 +00000010 _sizeof__finish_25 +00000016 _sizeof__test_data_26 +00000010 _sizeof__finish_26 +00000016 _sizeof__test_data_27 +00000010 _sizeof__finish_27 +00000016 _sizeof__test_data_28 +00000010 _sizeof__finish_28 +00000016 _sizeof__test_data_29 +00000010 _sizeof__finish_29 +00000016 _sizeof__test_data_30 +00000010 _sizeof__finish_30 +00000016 _sizeof__test_data_31 +00000010 _sizeof__finish_31 +00000016 _sizeof__test_data_32 +00000010 _sizeof__finish_32 +00000016 _sizeof__test_data_33 +00000010 _sizeof__finish_33 +00000016 _sizeof__test_data_34 +00000010 _sizeof__finish_34 +00000016 _sizeof__test_data_35 +00000010 _sizeof__finish_35 +00000016 _sizeof__test_data_36 +00000010 _sizeof__finish_36 +00000016 _sizeof__test_data_37 +00000010 _sizeof__finish_37 +00000016 _sizeof__test_data_38 +00000010 _sizeof__finish_38 +00000016 _sizeof__test_data_39 +00000010 _sizeof__finish_39 +00000016 _sizeof__test_data_40 +00000010 _sizeof__finish_40 +00000016 _sizeof__test_data_41 +00000010 _sizeof__finish_41 +00000016 _sizeof__test_data_42 +00000010 _sizeof__finish_42 +00000016 _sizeof__test_data_43 +00000010 _sizeof__finish_43 +00000016 _sizeof__test_data_44 +00000010 _sizeof__finish_44 +00000016 _sizeof__test_data_45 +00000010 _sizeof__finish_45 +00000016 _sizeof__test_data_46 +00000010 _sizeof__finish_46 +00000016 _sizeof__test_data_47 +00000010 _sizeof__finish_47 +00000016 _sizeof__test_data_48 +00000010 _sizeof__finish_48 +00000016 _sizeof__test_data_49 +00000010 _sizeof__finish_49 +00000016 _sizeof__test_data_50 +00000010 _sizeof__finish_50 +00000016 _sizeof__test_data_51 +00000010 _sizeof__finish_51 +00000016 _sizeof__test_data_52 +00000010 _sizeof__finish_52 +00000016 _sizeof__test_data_53 +00000010 _sizeof__finish_53 +00000016 _sizeof__test_data_54 +00000010 _sizeof__finish_54 +00000016 _sizeof__test_data_55 +00000010 _sizeof__finish_55 +00000016 _sizeof__test_data_56 +00000010 _sizeof__finish_56 +00000016 _sizeof__test_data_57 +00000010 _sizeof__finish_57 +00000016 _sizeof__test_data_58 +00000010 _sizeof__finish_58 +00000016 _sizeof__test_data_59 +00000010 _sizeof__finish_59 +00000016 _sizeof__test_data_60 +00000010 _sizeof__finish_60 +00000016 _sizeof__test_data_61 +00000010 _sizeof__finish_61 +00000016 _sizeof__test_data_62 +00000010 _sizeof__finish_62 +00000016 _sizeof__test_data_63 +00000010 _sizeof__finish_63 +00000016 _sizeof__test_data_64 +00000010 _sizeof__finish_64 +00000016 _sizeof__test_data_65 +00000010 _sizeof__finish_65 +00000016 _sizeof__test_data_66 +00000010 _sizeof__finish_66 +00000016 _sizeof__test_data_67 +00000010 _sizeof__finish_67 +00000016 _sizeof__test_data_68 +00000010 _sizeof__finish_68 +00000016 _sizeof__test_data_69 +00000010 _sizeof__finish_69 +00000016 _sizeof__test_data_70 +00000010 _sizeof__finish_70 +00000016 _sizeof__test_data_71 +00000010 _sizeof__finish_71 +00000016 _sizeof__test_data_72 +00000010 _sizeof__finish_72 +00000016 _sizeof__test_data_73 +00000010 _sizeof__finish_73 +00000016 _sizeof__test_data_74 +00000010 _sizeof__finish_74 +00000016 _sizeof__test_data_75 +00000010 _sizeof__finish_75 +00000016 _sizeof__test_data_76 +00000010 _sizeof__finish_76 +00000016 _sizeof__test_data_77 +00000010 _sizeof__finish_77 +00000016 _sizeof__test_data_78 +00000010 _sizeof__finish_78 +00000016 _sizeof__test_data_79 +00000010 _sizeof__finish_79 +00000016 _sizeof__test_data_80 +00000010 _sizeof__finish_80 +00000016 _sizeof__test_data_81 +00000010 _sizeof__finish_81 +00000016 _sizeof__test_data_82 +00000010 _sizeof__finish_82 +00000016 _sizeof__test_data_83 +00000010 _sizeof__finish_83 +00000016 _sizeof__test_data_84 +00000010 _sizeof__finish_84 +00000016 _sizeof__test_data_85 +00000010 _sizeof__finish_85 +00000016 _sizeof__test_data_86 +00000010 _sizeof__finish_86 +00000016 _sizeof__test_data_87 +00000010 _sizeof__finish_87 +00000016 _sizeof__test_data_88 +00000010 _sizeof__finish_88 +00000016 _sizeof__test_data_89 +00000010 _sizeof__finish_89 +00000016 _sizeof__test_data_90 +00000010 _sizeof__finish_90 +00000016 _sizeof__test_data_91 +00000010 _sizeof__finish_91 +00000016 _sizeof__test_data_92 +00000010 _sizeof__finish_92 +00000016 _sizeof__test_data_93 +00000010 _sizeof__finish_93 +00000016 _sizeof__test_data_94 +00000010 _sizeof__finish_94 +00000016 _sizeof__test_data_95 +00000010 _sizeof__finish_95 +00000016 _sizeof__test_data_96 +00000010 _sizeof__finish_96 +00000016 _sizeof__test_data_97 +00000010 _sizeof__finish_97 +00000016 _sizeof__test_data_98 +00000010 _sizeof__finish_98 +00000016 _sizeof__test_data_99 +00000010 _sizeof__finish_99 +00000016 _sizeof__test_data_100 +00000010 _sizeof__finish_100 +00000016 _sizeof__test_data_101 +00000010 _sizeof__finish_101 +00000016 _sizeof__test_data_102 +00000010 _sizeof__finish_102 +00000016 _sizeof__test_data_103 +00000010 _sizeof__finish_103 +00000016 _sizeof__test_data_104 +00000010 _sizeof__finish_104 +00000016 _sizeof__test_data_105 +00000010 _sizeof__finish_105 +00000016 _sizeof__test_data_106 +00000010 _sizeof__finish_106 +00000016 _sizeof__test_data_107 +00000010 _sizeof__finish_107 +00000016 _sizeof__test_data_108 +00000010 _sizeof__finish_108 +00000016 _sizeof__test_data_109 +00000010 _sizeof__finish_109 +00000016 _sizeof__test_data_110 +00000010 _sizeof__finish_110 +00000016 _sizeof__test_data_111 +00000010 _sizeof__finish_111 +00000016 _sizeof__test_data_112 +00000010 _sizeof__finish_112 +00000016 _sizeof__test_data_113 +00000010 _sizeof__finish_113 +00000016 _sizeof__test_data_114 +00000010 _sizeof__finish_114 +00000016 _sizeof__test_data_115 +00000010 _sizeof__finish_115 +00000016 _sizeof__test_data_116 +00000010 _sizeof__finish_116 +00000016 _sizeof__test_data_117 +00000010 _sizeof__finish_117 +00000016 _sizeof__test_data_118 +00000010 _sizeof__finish_118 +00000016 _sizeof__test_data_119 +00000010 _sizeof__finish_119 +00000016 _sizeof__test_data_120 +00000010 _sizeof__finish_120 +00000016 _sizeof__test_data_121 +00000010 _sizeof__finish_121 +00000016 _sizeof__test_data_122 +00000010 _sizeof__finish_122 +00000016 _sizeof__test_data_123 +00000010 _sizeof__finish_123 +00000016 _sizeof__test_data_124 +00000010 _sizeof__finish_124 +00000016 _sizeof__test_data_125 +00000010 _sizeof__finish_125 +00000016 _sizeof__test_data_126 +00000010 _sizeof__finish_126 +00000016 _sizeof__test_data_127 +00000010 _sizeof__finish_127 +00000016 _sizeof__test_data_128 +00000010 _sizeof__finish_128 +00000016 _sizeof__test_data_129 +00000010 _sizeof__finish_129 +00000016 _sizeof__test_data_130 +00000010 _sizeof__finish_130 +00000016 _sizeof__test_data_131 +00000010 _sizeof__finish_131 +00000016 _sizeof__test_data_132 +00000010 _sizeof__finish_132 +00000016 _sizeof__test_data_133 +00000010 _sizeof__finish_133 +00000016 _sizeof__test_data_134 +00000010 _sizeof__finish_134 +00000016 _sizeof__test_data_135 +00000010 _sizeof__finish_135 +00000016 _sizeof__test_data_136 +00000010 _sizeof__finish_136 +00000016 _sizeof__test_data_137 +00000010 _sizeof__finish_137 +00000016 _sizeof__test_data_138 +00000010 _sizeof__finish_138 +00000016 _sizeof__test_data_139 +00000010 _sizeof__finish_139 +00000016 _sizeof__test_data_140 +00000010 _sizeof__finish_140 +00000016 _sizeof__test_data_141 +00000010 _sizeof__finish_141 +00000016 _sizeof__test_data_142 +00000010 _sizeof__finish_142 +00000016 _sizeof__test_data_143 +00000010 _sizeof__finish_143 +00000016 _sizeof__test_data_144 +00000010 _sizeof__finish_144 +00000016 _sizeof__test_data_145 +00000010 _sizeof__finish_145 +00000016 _sizeof__test_data_146 +00000010 _sizeof__finish_146 +00000016 _sizeof__test_data_147 +00000010 _sizeof__finish_147 +00000016 _sizeof__test_data_148 +00000010 _sizeof__finish_148 +00000016 _sizeof__test_data_149 +00000010 _sizeof__finish_149 +00000016 _sizeof__test_data_150 +00000010 _sizeof__finish_150 +00000016 _sizeof__test_data_151 +00000010 _sizeof__finish_151 +00000016 _sizeof__test_data_152 +00000010 _sizeof__finish_152 +00000016 _sizeof__test_data_153 +00000018 _sizeof__finish_153 +000000a1 _sizeof_run_testcase +0000001a _sizeof_fetch_test_data +00000012 _sizeof_print_got +00000004 _sizeof__print_zero +00000002 _sizeof__print_one +00000009 _sizeof__print_bit +00000001 _sizeof__skip diff --git a/cinema/gb/mooneye-gb/acceptance/boot_div-S/manifest.yml b/cinema/gb/mooneye-gb/acceptance/boot_div-S/manifest.yml new file mode 100644 index 000000000..631ac4568 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/boot_div-S/manifest.yml @@ -0,0 +1,3 @@ +config: + gb.model: SGB +fail: true diff --git a/cinema/gb/mooneye-gb/acceptance/boot_div-S/test.gb b/cinema/gb/mooneye-gb/acceptance/boot_div-S/test.gb new file mode 100644 index 0000000000000000000000000000000000000000..ded038715df04147a05bf5298c3ab1a8f1194120 GIT binary patch literal 32768 zcmeI4UrZE79LJaQiYuU9M9o4sx?C>wq-YRHdLh@%vaEQpBu8wChLT7@K+_h8@PK%p zP-}~S;eiKDNKBvX8|{-ZCQTZG@p4|%mo~9gvoG@0nkB}zHm!8NH;f0G7!s4#)ZZ_+ zbMu?uznRa>T*3ppu<&Y&G}D~(-LKu=gzH* z*RJ(+_OAQo=AGLYFI~I3)A+cruea++*S4MxeXwg_P-<>Y z5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3;AObH1fy5HQzn(8q z6QuwDcs%`j0eMj*NtR&?FPT3%ixf{6C^$;pEUH*MOwH8&S_ zP1Bha7nhY47ju7}7k!8CRe^YPreZkn*EYA|Rq2?kXax-6?Ia?7%&L61Z%%kNiJT~B1rztAm<*MNU06phB? zJbxl#n(?^LC+v|3bX4H}iNx~y$cIPRdEYR6zU&%!=InZf&I#q_s%m??s&d|#GiJ(X z3ys_011%i3ZLCLvmI>^Z)zPtMPh(?!J|KaRO_;q~}h#D0#BLJu{XlQBa>=g5Zg`Yyi*VYCC8#ZL~WzP#=UpS20 z0^$5kliwY`AG5{&W@6W@$>(-OdHVjs3&Qh>d&kGnMj}3+Vbs^x)Ib9noZpU)wl?Sx zey92ReM}6)vV=dsF}MZd{Hm&=gu@CG9xX}L)lE&dU0v<>^VNjI;1dkOjHq! zzjXF=^&A=)>^eLkL1&-08d>X&T?uVt*4lxAuET?e`g)(3t?2NT(0U&G9((JJ-u=O$ zkGc*>$?3h`*nSqmc%|w>TM;a=rbd^%(U^DoYN#N65(P_jX@k0vbz*Q;^H~p&nMf%o z6IUFc^Ukj% zLF&Uy+%6IKY0NvflDKT)flPv^Nbq^gn^;ML)X_{_lZg8)=8dl;Zl>QU%IsJz+t?De zqiUSj!yho^`O7IqZ7YA-c?=X{ke!z56F;wsH1ey2eSDIq3sVsdOP( zYO*)^c=qFQ{ZH0TWZEbF;mi7)xvSQ_wn^T+wru0}fH{GC;Pq+CQGG}97&&^x!^oZy`A3Y%+Ks|hQ7X0 z5-7@7f8Wb`!-0JDkGxfvZv@mw-=@ECW|J?)pA0k!B0vO)01+SpM1Tko0U|&IhyW2F z0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F R0z`la5CI}U1pXxg{{RKiE9n3L literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/acceptance/boot_div-S/test.sym b/cinema/gb/mooneye-gb/acceptance/boot_div-S/test.sym new file mode 100644 index 000000000..c08ad29c9 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/boot_div-S/test.sym @@ -0,0 +1,120 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_div-S.gb". + +[labels] +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/hblank_ly_scx_timing-GS/manifest.yml b/cinema/gb/mooneye-gb/acceptance/boot_div-dmg0/manifest.yml similarity index 100% rename from cinema/gb/mooneye-gb/acceptance/gpu/hblank_ly_scx_timing-GS/manifest.yml rename to cinema/gb/mooneye-gb/acceptance/boot_div-dmg0/manifest.yml diff --git a/cinema/gb/mooneye-gb/acceptance/boot_div-dmg0/test.gb b/cinema/gb/mooneye-gb/acceptance/boot_div-dmg0/test.gb new file mode 100644 index 0000000000000000000000000000000000000000..3d988100d05ca7836eafca55c7d5aac19f41758d GIT binary patch literal 32768 zcmeI4PfQe77{DLv7Dqrk6f^@)aM*0GZ#6vW;VvQHm&r1`|(`B%O)O3>i1>m z?fc&M@4er9Zxas8^788~EYVr;!|wwF_qVd*O{45QD`8uiRJv>WBHQ-h{?O9Hhriso zb7!z`Xxnf1A3nJ8<(=F6^-qR}hx$+V?-`70WBsFJth<|WDcH~Ulpls(-r{G`IUFBL1#(d>0E`*V_kJ-q4S4c<;+0m`IBn*VB(wh*ZV@y>WKgm zAOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3; zAOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW4TFaq&a0{>#ZN{y5L z|KqX#H3HI#FeXW03vgNM69~j&_`tX%RaFH7s#;VO3PD6~@7&yp6FYY7-d$J-c2(85 zR8-W|R8*ip=7m0pB*`*($TE(@x0efygT1y^RdroeYimIRfeGq5w5W?#M1UR&iP79Q z`g=T>Thj~!Y>MLdn_T>UMFCxs6a{iilB$9p3Yn(Yt0Ry4 zJZ>1Vn8zdRp%Ca$0sZ6gwe=w%Ji?BBUH5o$YrxF8^$Hyc6&5N=Z?B>tZ z+Q0|2V9>H)J&a*AtkAON=jY~ndNfT{6)t{1&I0_$$1MvUXhr-a7t0C;g&nNI9*Y^q z__)C(76W@uN8V6>a&mrN#KX$tacE5w{BdW2zpjI>s&E>-Ug2+9;c#c?$VfPBSzw1s zD7fP0=DxnJuC}&jE?_s!X!Ovb_V(6R%&)4x6~X<*^~a!HBL zhwvU|wx)U0r>BVt!!3QwZ_R%|2gwc`je>yx{tRLAWg- z$loyV?s&a0TiD-h?3OLXXqV;n_ZPfCFrT=0I0kJf{ld@W&eiw?Ld;+bcM;_ZxI^ zBPD5M1Xk|%2Lko=b#>qmc~Ourj13HQcLR0kgY4bg&;Xl`8qQGc4~+HnM5Cq&C)F@O zZ)$?m0(a1pWm;F)&;WJ8hO1W;m^96fW{eve*$NEo=GSK3)3*Y9xV3q7wExuD$>E_FW-~l-EASS^zR%x!qYZp` z^5g#FEV*#Roj%4xIImPoU^fIa-ZW{$oLyb}RerI_~sG8dMz zvvI8=ZZhIt%qI?K0|^di6PO~w`G|WZp9HB7vT-dU?$d~SIiI*(;l6AFOC-1uaj)f* zAoWo;?tqB)|SG2M+J~MPM*EqDi>|m{NIPkJVc#T8HYKJ6$-%r6}`{JW?lbx=y)5q;KOVz&cVbP8;Zv7VZGFMNvA-cay$#~!6nn4C70fOUKI4) z-F&y+m#mg2OPNvNZcfbDXP0(8-W9qq{G&fv%_a+&wvf1PKTW-xK5AzYNA2-%?^XKB zij_Z)@ZN;4Soy1H)6IK6<=OY?uk6L-hW(j9g^2(WAOb{y2oM1xKm>>Y5g-CYfCvx) zB0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx) OB0vO)01?;#0{;QYksFo( literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/acceptance/boot_div-dmg0/test.sym b/cinema/gb/mooneye-gb/acceptance/boot_div-dmg0/test.sym new file mode 100644 index 000000000..e3f64eefc --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/boot_div-dmg0/test.sym @@ -0,0 +1,120 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_div-dmg0.gb". + +[labels] +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/lcdon_timing-dmgABCXmgbS/manifest.yml b/cinema/gb/mooneye-gb/acceptance/boot_div-dmgABCmgb/manifest.yml similarity index 100% rename from cinema/gb/mooneye-gb/acceptance/gpu/lcdon_timing-dmgABCXmgbS/manifest.yml rename to cinema/gb/mooneye-gb/acceptance/boot_div-dmgABCmgb/manifest.yml diff --git a/cinema/gb/mooneye-gb/acceptance/boot_div-dmgABCmgb/test.gb b/cinema/gb/mooneye-gb/acceptance/boot_div-dmgABCmgb/test.gb new file mode 100644 index 0000000000000000000000000000000000000000..63227f429d19dc500f4564e7837aca129efdef5c GIT binary patch literal 32768 zcmeI4UrZE77{G_~iYuU9ikgLPbh%vUNzovZ^g^ziWm)lHNsiDG4JDC+9GbR3JRT6w z6KZYoFFf#|32DLyiR=6g?POu`jo=L@9$4{{hw{G^&-@g6h z#cS94dipo~eDn6Li=SM(x=Vj=V4%PENbmN(Zf&SHF~mAL7?-?VY`gw3^cZvf_p$R2 z+NX$piqQY6WRKOtz(U``{)N2@v4uVNc8)LJ`F`&HPUg%wt8zOpmSHBaVDYjtA5#;fX>5v>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F z0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpMBrH`kXk12&+5z6 z6zTsz9*@6}Kw1*UBnfOGE-QUPp=1&t7?-3iTS6gKEhvaYAfl^lYU<#@&6~Gv%g+b9 zs%l(HODif$OVJY^19phqHN zH201EJ|E`RG{XR!q6C8`mtas)K$j#%f!va$s-Q@X7wuDHIwr>DKWsi~d|*iEy$yREIcxv>%Rt7>3LaDQ=qm;wBk+kHN<{?=A8AJ}EN zs3;J?_~XZ+Rur5M*CO_FYz*`u7d&53S5s4adryz34=i{JA-=vo5ZJgemoIl-aDCx0 z+!hezZy0!Y{C=nw_ScJDx2_QFvi$h{1uqcHC+;1NK^uwqe7fG)SXT!ckb(2t-QC#< zItborT)&TtuA8Rt#~TB;K%8Gik>zk$=7Q0T)z-GOSXOPV-;b*ahk;Kp2zEHzOE|sz z4Z66Ik~BC7D-Q-kq3Y_YD)5KAD99Ja;_;3SpbmYI9Xo1jVAD~<3dR1wSZ8Nfp4%9rSrjtEy^hU|z7{>Jmg{&1WEt-){IbF<;IFE(T+Kz6k-uOiP7LgS5f@1k^+8lkO-l=W!>;E9^y1OQ z?4X_f%x>%LJCqpeJ)B^m^UtfzymiN~gtl{QeIn6&c<9hT|0A;*9k~*E31i>nZ@tmt zZy$QM_W(=J>~+WY^AOG}(-7JQ!HhR`8gs{D?&+(cqU=eSuv}vsl})@816QSx_W&{% zma)CKMiDm}b5E@%4y%C#Z+Hnzk>EtkJ-eC&nYX;S1`+pu%ssQ3xZK1&UII%bI2m)# zuO>m}9WQRTi2ESso?A^^ZsLTOASx1k6mut6lOS`{i)#^aAI98?)x^yX+9lqO)$@%l z<2(AYr!_8VB_+HvbTC&qG(72Gt#H`=q(gLtL(6i9G=D8n-dywCoot<*t+2BP>~eM? zU2gD~{J7S`3GENwPI~R5{>UZmmHaguUf3*cSzobfN5B})HrYq`Gs2&v{7LfX7=M&a zhHmoj$36yA{+e-2r@^tEX1&-k^go?Fvqx>1G<5^#%Y2=7^7JvsH}g7NGVMWn{>6s{ zVc+$&*Q*2Ra(T3v8F}v7*$MmD{MNf$BPR#G3#QB2XdcsMW-r+HGp}X$*$cD#?BUBd z$^s>Y%5QslZzNEt{9dr;(v5)f;G68H_FVc||7(KkBLYN#2oM1xKm>>Y5g-CYfCvx) zB0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx) RB0vO)01+SpMBv{f@Hg79Mpgg- literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/acceptance/boot_div-dmgABCmgb/test.sym b/cinema/gb/mooneye-gb/acceptance/boot_div-dmgABCmgb/test.sym new file mode 100644 index 000000000..79e783897 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/boot_div-dmgABCmgb/test.sym @@ -0,0 +1,120 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_div-dmgABCmgb.gb". + +[labels] +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h diff --git a/cinema/gb/mooneye-gb/acceptance/boot_div2-S/manifest.yml b/cinema/gb/mooneye-gb/acceptance/boot_div2-S/manifest.yml new file mode 100644 index 000000000..631ac4568 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/boot_div2-S/manifest.yml @@ -0,0 +1,3 @@ +config: + gb.model: SGB +fail: true diff --git a/cinema/gb/mooneye-gb/acceptance/boot_div2-S/test.gb b/cinema/gb/mooneye-gb/acceptance/boot_div2-S/test.gb new file mode 100644 index 0000000000000000000000000000000000000000..837e0e6164aa6d16a8773ad7929a3b983cdf990c GIT binary patch literal 32768 zcmeI4UrZE79LJaQiYuU9ikgLPbh%vUNzovZ^g^ziWm)lHNsibO4JDC+fTk@F;Q{eH zq1G1v!UJhEAu)ZjZ?sRwm^5h!#>;t4U)sc0&A!M}YnB+>+O*R7-Y_0$8c9rQQh&eP z&dqOr|7Jcja|sXZ!otff(oA#CcfWRb-&iZqhU~?b|mm zT)o=U*}LwS8@F#=xOnx-4&$S~zTU3GU0ZuP^uexyL8-M>Vv@5%+WPq=^qwi6|G_hT z{>|YzVxJ>adQq_`Jl{9pGrw>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c<;3Cy-bo_?Pn~ zYJ&9tACD(rDQ8s_Ti&`4_rn@fz?Cg`&}T zoaav@Ofw$$`Gh?ZfsP8?Kap5oANlYIJMSBY&zD^T&zxPa&^e*pTvcsvS5?j%bH+^h zY@u-*e4vHHwvF{j5|73TZF_2Jak&CQ}7?21xQ z5D4)2W5+O8F1#LJi`dW6QRqP?{Cr_v4Gk?VotkEf* zTOgdjY4W?{_hYu$-%RY9HTm4GC{NyBctLnRaqsvT+DOFbGmQHBni^;zgY(!wyUfCe!iM;7<__3*m1TOac1r} zba5kPxxXJP4+cY_%F2og_#-bD&KG0d-L0*ljy`1DwyG*@I@kCN#r|Ndt*xWOvT#yO z6M9VzP7Cg!FT=E=qN)mYVdJY;Rm`31iV}%n2HED|t|Ts7cp#G?DiVAa^Cni3Aax`Y*CgUTjd|lMiJR$niZVM^%Qm)z z?daXjKA!z(T>q1`6PfmLfB2IAM((P0uWXbztu5QIEnp6%8=S-J8D`HB_Qct9ls)PO z)3Dh06CYDj|DJX&x6XCkMx)R*jlbMoGe;a0OoQr{%q9Anh=O}~vxraw&1z4|CG z?7O!5T4f+vs*Ds$W{$UdX52YCxB1@Y$ceu1gUM29BuCPxXU;nhQg5aAI`cDoouRL< zmjsIP)!+B9-f$pa{UdMHrRxFp;kW58oY~|H|8s#RKm>>Y5g-CYfCvx)B0vO)01+Sp zM1Tko0U|&IhyW2F0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+Sp RM1Tko0U|&Ih`@hH;2#C4DC7VD literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/acceptance/boot_div2-S/test.sym b/cinema/gb/mooneye-gb/acceptance/boot_div2-S/test.sym new file mode 100644 index 000000000..943a95ead --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/boot_div2-S/test.sym @@ -0,0 +1,120 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_div2-S.gb". + +[labels] +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h diff --git a/cinema/gb/mooneye-gb/acceptance/boot_hwio-S/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/boot_hwio-S/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/acceptance/boot_hwio-S/manifest.yml b/cinema/gb/mooneye-gb/acceptance/boot_hwio-S/manifest.yml index 1e96f6ccf..898a81837 100644 --- a/cinema/gb/mooneye-gb/acceptance/boot_hwio-S/manifest.yml +++ b/cinema/gb/mooneye-gb/acceptance/boot_hwio-S/manifest.yml @@ -1 +1,2 @@ -config: {gb.model: SGB} +config: + gb.model: SGB diff --git a/cinema/gb/mooneye-gb/acceptance/boot_hwio-S/test.gb b/cinema/gb/mooneye-gb/acceptance/boot_hwio-S/test.gb index f046094b904fe9358f7513c83ae855843c995f9c..2821ae22553f0531d80625194b1ec3c3c8e92459 100644 GIT binary patch delta 557 zcmZo@U}|V!+Th1nzp+7);lH3ila#-3o%`uZ4OXcghh8xXD+4)&$ec`MP9icV5}6Z- z%<)9#IKnx#{~8X3F)IH5U*~RD&j7OSv*Jz0!ynwwZtyt!!XqTLxJ1F1_U-PQ*|7S%8CXlih9=@KzzK$Wz9tw^j3Mvf08vma?>hY@qM1sr!8{--g z;OZRW>Y~8#s|hCY!o%G^L;(yKel>$cCvRo)<}>~OpMl{&!~Z|_AjW1v=Jz%e1#&hy zd|T&ex*(#5-X&z^ncqlT=IH~CH|Mb5PF8}%!egVk|U=q%*TCSkZ#>~em z#v#Y6CaS08P;s`?qY{X#fVdinYk;^Gh$TcF?3{o!8ggKe_`Cjr(*x%R-VeO$?F1h< z*!_9net5SB$kw_O5DQQ5JNbaouJHlWdRqn{Q22TB8UH^n3#Mc2#|)HCDhf0RGB_}P zU_X4`qxPBnJ9(Sd{0k~46&V^B85GtZzTxrpwE5W?9v=_S@Tk~$LP|-PTjF~-kX5C` ZE%AekdHD$?iJu40KJ++x5*QXj<^XV0`Z@pr delta 1680 zcmZ{jUuYaf9LHzodP#bB`E%X$vRuK;U5i{1Bp{e5n&xu1xx3!B*XEAK>O-kMlu{8y zgqpP31AWoHC_b1ciGm1%L|Y-%hp?njvMh@rRG*Z4kUm^R0*bXuz4bT0*&QzaIc}Hz ze&;uz@62y@+ilivvoB6k>%vNo1nHYB+t5}k?i+=8_U5+Ew8J1??H3pO#rb}5wqKm? z7qxy-RN`u{y?ut}f?%~WYY`FW9jSUxRlT5|<7-}=<>msnw_EPL&3(AP%l+j~d1@dw z63+}hGW_Vl$MZ!0iw-j{W$HsMquJt(I>`{Ho3SrMj4JN4M%hUj!45JvgE;&HD9xr`~&v6WoXt4Tv@m@KW#r-7!_0QPWHz6J%H*z z;V$4E*jR#Q!N-s!1$H}-pY0=kF z#v64Y=wtLPltc3HfLRCT8hUJj(2wO@!6d-kA2Gj?zGTuJR0{b6N`(}i>B@S}E#fvI z;Q?wkPiX8oZbu}vo{>`pk^wRqAzuOCg4Tu1 zD_EwO*H9{^SoMbzBwGCvBz%sNl?mOH10o>~2_sR$x6%&-enh1Lei72rRf2m7n4~VY z&kRBn_!JY&eZU-!n0e`k%qdigc?_jOibXHVda>x&AmBVoRweY3c(Qa%7=(neDB(>x zBTRS?l}cDgsS?~3V19)jGYQ?2Q^leO067{Vzn6Z9{23J@E%DC%hFURU)lP1#ohEa1 zchK9dIEfx9?90dW`%cB3@*XqYDLn~a#IKVBq>. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_hwio-S.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_hwio-S.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48bb clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48cf memcpy +01:48d8 memset +01:4898 print_hex4 +01:48c5 print_hex8 +01:48e8 print_inline_string +01:48a4 print_load_font +01:48b0 print_newline +01:48e1 print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:01e6 _wait_ly_4 -00:01ec _wait_ly_5 -00:0202 _print_results_halt_1 -00:0205 _test_ok_cb_0 -00:020d _print_sl_data55 -00:0215 _print_sl_out55 -00:0218 mismatch -00:023b _wait_ly_6 -00:0241 _wait_ly_7 -00:0257 _print_results_halt_2 -00:025a mismatch_cb -00:0262 _print_sl_data56 -00:0270 _print_sl_out56 -00:028a _print_sl_data57 -00:0294 _print_sl_out57 -00:02a5 _print_sl_data58 -00:02af _print_sl_out58 -00:02b8 hwio_data -00:c014 mismatch_addr -00:c016 mismatch_data -00:c017 mismatch_mem +00:0150 main +00:01d9 main@quit_inline_1 +00:01ea mismatch +00:0200 mismatch@quit_inline_2 +00:024f hwio_data +00:ff80 mismatch_addr +00:ff82 mismatch_data +00:ff83 mismatch_mem + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000002 _sizeof_mismatch_addr +00000001 _sizeof_mismatch_data +00000001 _sizeof_mismatch_mem +0000009a _sizeof_main +00000065 _sizeof_mismatch diff --git a/cinema/gb/mooneye-gb/acceptance/boot_hwio-dmg0/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/boot_hwio-dmg0/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/acceptance/boot_hwio-dmg0/test.gb b/cinema/gb/mooneye-gb/acceptance/boot_hwio-dmg0/test.gb index e9d4b47a765b109ae663c85e3acd01757b3af849..410e21a30cff6e61004745469c07fe298472d03a 100644 GIT binary patch delta 557 zcmZo@U}|V!+Th1nzdl%z;lH3ila#-3o%`uZ4OXcghh8xXD+4)&$ec`MP9icV5}6Z- z%<)9#IKnx#{~8X3F)IH5U*~RD&j7OSv*Jz0!ynwwZtyt!!XqTLxJ1F1_U-PQ*|7S%8CXlih9=@KzzK$Wz9tw^j3Mvf08vma?>hY@qM1sr!8{--g z;OZRW>Y~8#s|hCY!o%G^L;(yKel>$cCvRo)=KDLbnSp_k;r}1||Nj{nHVZPpx0xuA zv&rEDd%YpU14dSlqfgIPd7Mr2IJ?9{kzvM3MTh^V|9x=z*RSvkNKOEgaCX&l1$8!N zK2|XfIbJnUJtc>Vvz;E5KwJgH)j(VW#I-;yA?je~1fSB3kFTfA&(84pczA|K#l{m-O2XU{-@}2d cDkW}-A6(4KPbf+JJb3n@$I+9(un;l_0MBvw>i_@% delta 1680 zcmZ{jUx*t;9LHxS&D}N0{Ym$lTT<{QX_1H^2ZB9Cua`^qk~G^(y(~Sg52cDosR$xM zy|%Z3`l5ZY_~1RsDTpA*X)9dy;aILvZdn#VP@h`zAbm(h4lLF#HS2GFlO1yY3E5@8 z-}%kwJM){}R*SV-?5hQ8zq*hkVfs4DHnf$B_f8?6y}qS0?I4IZ`^A}lak^i;*e{;% z7qxy-RN`W{wRM8#!f>TBV-peQAFBFKSN*V_#yHoDI#{;;3z=P$_d1@dw z63+}hGW_WNC-Ox9iw-kCW$Htg(X@D@PBO&pWSn!I3Fl&G+_})%@9ct}{2%Cd3KL^H|X;Re90khe!ahj2VoJyU)d+zK?YYnY!bO|e_HH57;-iWhv_=jB#X_av1rvA3#zD4Tiz&4h&KIzB`G|l z`C`p9%5Y3+IHG-UL>eBEEf1co2AZ=J>~l^nL$l7qm4!ipZ0qOS=9z&%PrctT{?;jx z1uRp{%P197tomaK60Lp(623&q%7kvn0g(`ggpnxWd+GNAZlO{EzY1yVD#1GoOi~xy zX9l4Oe2NL?9$*ef%)In_%qdigc?6|GibXHVda>xYAmB7gRweYTc(Qd&7=(neDB+Tv z(M!03N+qnJR0-aBV19!hGYQ?4Q^leO067{Vf0BL=`3ovU+Txx29kpV@s@>dJD@|tU z&Y-_jaT8rq*prXx_uYy&. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_hwio-dmg0.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_hwio-dmg0.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48bb clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48cf memcpy +01:48d8 memset +01:4898 print_hex4 +01:48c5 print_hex8 +01:48e8 print_inline_string +01:48a4 print_load_font +01:48b0 print_newline +01:48e1 print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:01e6 _wait_ly_4 -00:01ec _wait_ly_5 -00:0202 _print_results_halt_1 -00:0205 _test_ok_cb_0 -00:020d _print_sl_data55 -00:0215 _print_sl_out55 -00:0218 mismatch -00:023b _wait_ly_6 -00:0241 _wait_ly_7 -00:0257 _print_results_halt_2 -00:025a mismatch_cb -00:0262 _print_sl_data56 -00:0270 _print_sl_out56 -00:028a _print_sl_data57 -00:0294 _print_sl_out57 -00:02a5 _print_sl_data58 -00:02af _print_sl_out58 -00:02b8 hwio_data -00:c014 mismatch_addr -00:c016 mismatch_data -00:c017 mismatch_mem +00:0150 main +00:01d9 main@quit_inline_1 +00:01ea mismatch +00:0200 mismatch@quit_inline_2 +00:024f hwio_data +00:ff80 mismatch_addr +00:ff82 mismatch_data +00:ff83 mismatch_mem + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000002 _sizeof_mismatch_addr +00000001 _sizeof_mismatch_data +00000001 _sizeof_mismatch_mem +0000009a _sizeof_main +00000065 _sizeof_mismatch diff --git a/cinema/gb/mooneye-gb/acceptance/boot_hwio-dmgABCXmgb/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/boot_hwio-dmgABCXmgb/baseline_0000.png deleted file mode 100644 index 30590ffab18e5deb12be845930a52ab18642fc14..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 518 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|Vn(PZ!6KiaBquU+ii&U|?{x z{qsNmo1B;Hnym>_oA=IKKFMK%PG{+y=amayKVL83P|Yc$UNGlCA=7aXVT-=? z!k=yOkD14xIsL}yU*6ou>NjH3zniQ39G*S5wqpCv-MoGwmU%1ReYcCb`1o>KP3^w? ztOf5>mpy*jtQ#kFe`4bIZO>aK*KeA(W&QeB-gmZts{j0uW&QSw+MxBj7WH4RJhN-X q{>0ypYS_V6!tEYqAjbqaH2yLz>&fNk@rld;#jmHUpUXO@geCx}Th!

. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_hwio-dmgABCXmgb.gb". - -[labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 -01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:01e6 _wait_ly_4 -00:01ec _wait_ly_5 -00:0202 _print_results_halt_1 -00:0205 _test_ok_cb_0 -00:020d _print_sl_data55 -00:0215 _print_sl_out55 -00:0218 mismatch -00:023b _wait_ly_6 -00:0241 _wait_ly_7 -00:0257 _print_results_halt_2 -00:025a mismatch_cb -00:0262 _print_sl_data56 -00:0270 _print_sl_out56 -00:028a _print_sl_data57 -00:0294 _print_sl_out57 -00:02a5 _print_sl_data58 -00:02af _print_sl_out58 -00:02b8 hwio_data -00:c014 mismatch_addr -00:c016 mismatch_data -00:c017 mismatch_mem diff --git a/cinema/gb/mooneye-gb/acceptance/boot_hwio-dmgABCmgb/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/boot_hwio-dmgABCmgb/baseline_0000.png new file mode 100644 index 0000000000000000000000000000000000000000..f9e5e47b50a4d548ddbc988a8e76364d30f505cf GIT binary patch literal 528 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|VoAPZ!6KiaBquU(7mWz~FE( z<;Va1cWgxt&B%VfEU&=!xnok3TT$lH;@jICuivi!&oIyXfkoqEmOfz%KM+GNxySPP z*F*Dd<=5Z6-dB81|M;InsWNlk%!+)xc#7K&NVrW=$u)AwfPok&xV7Hs3VP7pZii@^*>OsMihy~NwWM5i5 zcv5ew3n>WnBqm-wVU%SZ} zl^qE%n&lJOSW#;%UJfNbue)6A0)r<(coc;BAj}2fb`Yk5knBUDL)Y(e5@JzP4Di>r zrJtPH((E;2H;Mk>>4KP@hB#R6GUnVBEVvYx+!D4W;Qh8HnVGsXlho5hOzPqYcqO!J z#G`)pXLQG8W^ZNEdS+4tZ@Kr-BwAJ%y8+&cU!9AmEZl@5z6aRDqu4@PZDSQD0I_P| zTV@dfs?XZHy%xqj+c$@AC_n`8V8ZYIB=PshKdP;;aSa?UL~6h6Jh2}V`yG*>Y)L9M zI<3jhE74>5bvO5YepS45V&HTre)9aOi$hmrHD|vhi%fZ@=S)jX1twugRZ{Fec2p1! zD^AKuJJZe$Ly0=7a^Ps@7vgU%*8eYTe6<`-DLH&)99W3^*7liBWQ^YkZ(Nlv=`4+c z%C*AgCMj$W{~o^n;_>$pO9IM)STTQ)KaEklOm@vO$$h9N`96jL6Gbpq3EGJES3(#C!+spv1o8FoZ?Z$-UyHIXuw|m{qC_8|M|w(_uy8ykm7F@ z#yCw8f4^$dAkD$?cFiln7*^kyB*L!0NX7Loklj9XOlA>QD1@Fe$3G z7ww#``H$B8XKMbSQD7T>QY$PByr^G^K42kSFR^g_6P6uGOeCjM505`~&1-mmvFXO zQhy|4{BhhZkPaoRyR%;{kce&)tYCn5_a2&_sfAK26WWwFo@FGYycwqX7o|Kv z>C4hDFfwJ#I`mDH$z}rxMvlIZGR5SFcnx4~pr3@=LKCO(aYRA_60&i^QRxp89!I4T=25By?*%~G=xIxYo{>id zQUhcrM!p8V1FIV{FJPNuUPP&wV(O11NUZuLNcaq;Rv~mt-Vg~%NSKHdzLowk;73#{ z;8!6XLnV0UfJqwS@imLkG*$`0JOs?~m|2wmkU57+F;AjYNHO%P>=#474goKs)M|vD z6P06N!YCx<;)M6)iDANJR4QQ;rAqM51M_qAG@H4^W_ zUDS#RQ@e#+Cr=h=f7I_+-E>4shl&Z~zFYO?{3mR0&d9(Uac6dfG_zx_Ik_37=e6C@ z-MONx)3PmAIKo&N#t^U3QQD5J<)NkP5TespY-iZJsCu2acj;j7hp}H#t)Ir0b+GlT V*srP98?j|S*y;|hU(;ru`WI0i=?VY< diff --git a/cinema/gb/mooneye-gb/acceptance/boot_hwio-dmgABCmgb/test.sym b/cinema/gb/mooneye-gb/acceptance/boot_hwio-dmgABCmgb/test.sym new file mode 100644 index 000000000..3f71b5a1d --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/boot_hwio-dmgABCmgb/test.sym @@ -0,0 +1,57 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_hwio-dmgABCmgb.gb". + +[labels] +01:48bb clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48cf memcpy +01:48d8 memset +01:4898 print_hex4 +01:48c5 print_hex8 +01:48e8 print_inline_string +01:48a4 print_load_font +01:48b0 print_newline +01:48e1 print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte +01:4000 font +00:0150 main +00:01d9 main@quit_inline_1 +00:01ea mismatch +00:0200 mismatch@quit_inline_2 +00:024f hwio_data +00:ff80 mismatch_addr +00:ff82 mismatch_data +00:ff83 mismatch_mem + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000002 _sizeof_mismatch_addr +00000001 _sizeof_mismatch_data +00000001 _sizeof_mismatch_mem +0000009a _sizeof_main +00000065 _sizeof_mismatch diff --git a/cinema/gb/mooneye-gb/acceptance/boot_regs-dmg/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/boot_regs-dmg/baseline_0000.png deleted file mode 100644 index ca834e18a5af5f709acf3553d285ccfe45e04f10..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1327 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|U!9PZ!6KiaBrR-k!BYfv4r= z&tHGzE59u&mksl9@i?|=&HuDzwh2pEI6Hs+`u9(-Y5MxryaGEt5{gs|EQMysaQgJI zsJSyu{;aojPu%*qw;PO@LclT~iUVUwct@2a*ne)Z&tW{Wk>Regp?Wrc4 z_Fit%RrH_wU#5;N^6lC6-m(3ULnGfC6-^Ojo^(q6aqRz$+wR-L*JxjqN_i_ad9%0p ze)GJyHqrlzFVuF+{5<#s!?ntdCnp|wvZvqNuw&NE@>7vK0+t6~zARc}Ve+Qs!JY$( zIYMR5Ctg2wzxq2-M#?P0@}_J3x#L`Sd9s4TyC$F5c<8nKwOgB?Mntl02wZbjZx{Eu zt#6`@@}AdTc1?@=aIHrC@%pd(wy)k%B>X%0-NDD{ua_j&Oj{myr{ZDQ21)x~mM^=6 z15fa)r7!FL_V>`vOOyVbzF{MGfBNA!-0JTS1}^qG-Ouw;KY8-f-81W^U2i$ONB+*Q z)~~k?I_;`U>8Q7yanL?)!TjK!m3f|72WKq5C3H34U3BWfsm*I9hFRY=D)Y5Zo|QRW zzRz;9X>e`3a(D2m7>g6LHf%Pr{rt^7O_^W_mk=Wmz_O01FW@-8P z={NbmIeuu~zR2m(!C1R(KZBX3PZsh$WO;Q(MZxsv+a5Ru{Z07Tc$42wCWZG_cciu)OySq>Q zxXw+R_Nzk>5pNi&8KC><_FHOKGHHbMdnVk`mPsMv-2{S2Td&ReZS%K zUCxzyzd9fHxhvWu@&mF%wEy?nUZ^Ci z6pCAiAK3fFg##D^j+OBxCqL>le=eQ(l%1Vx!t?lJaT@)fo9Ei3v-~gGZoOviO`w@C z%h{HeZ!BiL;CQV{t=N2`walNM>?z+}r)#rCT9iFw%$nB0w53}t(BSvME_U%e`yCo` zHI*9<>brb=Q0lOM_L7PMkp;~`@0&YW*W%RvFZ1uq*3bKK;auKNWc>?j%umiT zkJGgIc5Oy_y4I7*i-C8Jo||^naoSe1Bg`k)ZQXriC)11a$s+uHOeGUq-^bS-*e?8Z zx2NiT{yhFhpr03{b!s^5&Jb(`7c6K22`g_X6h0^aK;JQwPs(@>s37!o^>bP0l+XkK Dn^c0^ diff --git a/cinema/gb/mooneye-gb/acceptance/boot_regs-dmg/test.sym b/cinema/gb/mooneye-gb/acceptance/boot_regs-dmg/test.sym deleted file mode 100644 index 8bb6e4482..000000000 --- a/cinema/gb/mooneye-gb/acceptance/boot_regs-dmg/test.sym +++ /dev/null @@ -1,198 +0,0 @@ -; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/jeffrey/Scratch/mooneye-gb/tests/build/acceptance/boot_regs-dmg.gb". - -[labels] -0001:4bf2 print_load_font -0001:4bff print_string -0001:4c09 print_a -0001:4c13 print_newline -0001:4c1e print_digit -0001:4c2b print_regs -0001:4c34 _print_sl_data0 -0001:4c3a _print_sl_out0 -0001:4c47 _print_sl_data1 -0001:4c4d _print_sl_out1 -0001:4c5f _print_sl_data2 -0001:4c65 _print_sl_out2 -0001:4c72 _print_sl_data3 -0001:4c78 _print_sl_out3 -0001:4c8a _print_sl_data4 -0001:4c90 _print_sl_out4 -0001:4c9d _print_sl_data5 -0001:4ca3 _print_sl_out5 -0001:4cb5 _print_sl_data6 -0001:4cbb _print_sl_out6 -0001:4cc8 _print_sl_data7 -0001:4cce _print_sl_out7 -0001:4000 font -0000:c000 regs_save -0000:c000 regs_save.f -0000:c001 regs_save.a -0000:c002 regs_save.c -0000:c003 regs_save.b -0000:c004 regs_save.e -0000:c005 regs_save.d -0000:c006 regs_save.l -0000:c007 regs_save.h -0000:c008 regs_flags -0000:c009 regs_assert -0000:c009 regs_assert.f -0000:c00a regs_assert.a -0000:c00b regs_assert.c -0000:c00c regs_assert.b -0000:c00d regs_assert.e -0000:c00e regs_assert.d -0000:c00f regs_assert.l -0000:c010 regs_assert.h -0000:c011 memdump_len -0000:c012 memdump_addr -0001:47f0 memcpy -0001:47f9 memset -0001:4802 clear_vram -0001:480d reset_screen -0001:481a process_results -0001:481f _wait_ly_0 -0001:4825 _wait_ly_1 -0001:4841 _wait_ly_2 -0001:4847 _wait_ly_3 -0001:4860 _process_results_cb -0001:486b _print_sl_data8 -0001:4875 _print_sl_out8 -0001:488f _print_sl_data9 -0001:489a _print_sl_out9 -0001:48b2 _print_sl_data10 -0001:48be _print_sl_out10 -0001:48bf dump_mem -0001:48cf _wait_ly_4 -0001:48d5 _wait_ly_5 -0001:48f1 _dump_mem_line -0001:491b _check_asserts -0001:4929 _print_sl_data11 -0001:492c _print_sl_out11 -0001:4938 _print_sl_data12 -0001:493a _print_sl_out12 -0001:4942 _print_sl_data13 -0001:4945 _print_sl_out13 -0001:494f __check_assert_fail0 -0001:495a _print_sl_data14 -0001:495d _print_sl_out14 -0001:4960 __check_assert_ok0 -0001:4968 _print_sl_data15 -0001:496d _print_sl_out15 -0001:496f __check_assert_skip0 -0001:4977 _print_sl_data16 -0001:497f _print_sl_out16 -0001:497f __check_assert_out0 -0001:498b _print_sl_data17 -0001:498d _print_sl_out17 -0001:4995 _print_sl_data18 -0001:4998 _print_sl_out18 -0001:49a2 __check_assert_fail1 -0001:49ad _print_sl_data19 -0001:49b0 _print_sl_out19 -0001:49b3 __check_assert_ok1 -0001:49bb _print_sl_data20 -0001:49c0 _print_sl_out20 -0001:49c2 __check_assert_skip1 -0001:49ca _print_sl_data21 -0001:49d2 _print_sl_out21 -0001:49d2 __check_assert_out1 -0001:49dd _print_sl_data22 -0001:49e0 _print_sl_out22 -0001:49ec _print_sl_data23 -0001:49ee _print_sl_out23 -0001:49f6 _print_sl_data24 -0001:49f9 _print_sl_out24 -0001:4a03 __check_assert_fail2 -0001:4a0e _print_sl_data25 -0001:4a11 _print_sl_out25 -0001:4a14 __check_assert_ok2 -0001:4a1c _print_sl_data26 -0001:4a21 _print_sl_out26 -0001:4a23 __check_assert_skip2 -0001:4a2b _print_sl_data27 -0001:4a33 _print_sl_out27 -0001:4a33 __check_assert_out2 -0001:4a3f _print_sl_data28 -0001:4a41 _print_sl_out28 -0001:4a49 _print_sl_data29 -0001:4a4c _print_sl_out29 -0001:4a56 __check_assert_fail3 -0001:4a61 _print_sl_data30 -0001:4a64 _print_sl_out30 -0001:4a67 __check_assert_ok3 -0001:4a6f _print_sl_data31 -0001:4a74 _print_sl_out31 -0001:4a76 __check_assert_skip3 -0001:4a7e _print_sl_data32 -0001:4a86 _print_sl_out32 -0001:4a86 __check_assert_out3 -0001:4a91 _print_sl_data33 -0001:4a94 _print_sl_out33 -0001:4aa0 _print_sl_data34 -0001:4aa2 _print_sl_out34 -0001:4aaa _print_sl_data35 -0001:4aad _print_sl_out35 -0001:4ab7 __check_assert_fail4 -0001:4ac2 _print_sl_data36 -0001:4ac5 _print_sl_out36 -0001:4ac8 __check_assert_ok4 -0001:4ad0 _print_sl_data37 -0001:4ad5 _print_sl_out37 -0001:4ad7 __check_assert_skip4 -0001:4adf _print_sl_data38 -0001:4ae7 _print_sl_out38 -0001:4ae7 __check_assert_out4 -0001:4af3 _print_sl_data39 -0001:4af5 _print_sl_out39 -0001:4afd _print_sl_data40 -0001:4b00 _print_sl_out40 -0001:4b0a __check_assert_fail5 -0001:4b15 _print_sl_data41 -0001:4b18 _print_sl_out41 -0001:4b1b __check_assert_ok5 -0001:4b23 _print_sl_data42 -0001:4b28 _print_sl_out42 -0001:4b2a __check_assert_skip5 -0001:4b32 _print_sl_data43 -0001:4b3a _print_sl_out43 -0001:4b3a __check_assert_out5 -0001:4b45 _print_sl_data44 -0001:4b48 _print_sl_out44 -0001:4b54 _print_sl_data45 -0001:4b56 _print_sl_out45 -0001:4b5e _print_sl_data46 -0001:4b61 _print_sl_out46 -0001:4b6b __check_assert_fail6 -0001:4b76 _print_sl_data47 -0001:4b79 _print_sl_out47 -0001:4b7c __check_assert_ok6 -0001:4b84 _print_sl_data48 -0001:4b89 _print_sl_out48 -0001:4b8b __check_assert_skip6 -0001:4b93 _print_sl_data49 -0001:4b9b _print_sl_out49 -0001:4b9b __check_assert_out6 -0001:4ba7 _print_sl_data50 -0001:4ba9 _print_sl_out50 -0001:4bb1 _print_sl_data51 -0001:4bb4 _print_sl_out51 -0001:4bbe __check_assert_fail7 -0001:4bc9 _print_sl_data52 -0001:4bcc _print_sl_out52 -0001:4bcf __check_assert_ok7 -0001:4bd7 _print_sl_data53 -0001:4bdc _print_sl_out53 -0001:4bde __check_assert_skip7 -0001:4be6 _print_sl_data54 -0001:4bee _print_sl_out54 -0001:4bee __check_assert_out7 -0000:01d2 invalid_sp -0000:01d7 _wait_ly_6 -0000:01dd _wait_ly_7 -0000:01f9 _wait_ly_8 -0000:01ff _wait_ly_9 -0000:0218 _test_failure_cb_0 -0000:0220 _print_sl_data55 -0000:0231 _print_sl_out55 -0000:c014 sp_save diff --git a/cinema/gb/mooneye-gb/acceptance/boot_regs-dmg0/test.gb b/cinema/gb/mooneye-gb/acceptance/boot_regs-dmg0/test.gb index 533f1368184b1b1725ab4d7598dbea96b9273969..56c676a0bc9caa993f5ba0aeedbb28f7ed877b11 100644 GIT binary patch delta 1139 zcmaizPe>F|9LL|Rl%iSMW()@TW(nH}qlKW59LC-CPd;fN1BDI|xrG!eu7R!DjHR{e zy1RDr+R1Kfd5|uFEGrJnL>=nTA>PG3%9F)PshQrJZCuwBhxxtvzM1dm`+GBwQB{Yk zI_9r)O7rKE8Pj8!8(TA`VZcXQuS~;)z3W*|*j)XR+VB9Jz+pUzCvXH$;V7QQaU2sl zJSl|D^s)%>1QQ=c6Gxc%Dmw8L6W{5hC=(fR2~RVzCXV4a6Fr zfZznLR8b`}FJDF#%pD+&EU?)IRhdi_f_rnh<*?2jR)E(IcrKI3UIEH~oo`v7&jz2# zWNI&PH<#~x*9!340pl`>?jNA+c;^Qe*kpraGMU~V%yaq9K`Wru4tOb(_(1{m{prUV zw!n59d?AzAK_KIj{m5x;S|i=uYPzeZtXcEFnbS#^mNR$@48FWUu^s*bM^oNm8(Iqt z?K=$`{fW3#TWVFWM|v&NyO989H9?|30P!0!xJAdfHE!$B96Wot=;$HkWXb9B+NujK zX-L0@9@7fZ8m9Gx)(9=WN)o;Fy6cnx|0jXH*oP5r6DzSK{>ClIVZ^#VUCA{}f6y=| zj$%im0nh_(YMEn3=@rLv@$yBNCRC`Ez%Oy6I2l7DnVPkltK)s2&S(NqIRF#MS+tS9 qtaqXHWEUEGyHf3PmhnG3sS3Hu_+O<(b1N=>b4h=VQVY=0ap^B6J<|dJ delta 1496 zcmZvbL1-IC6ozM3ku6KIEoGf_aiAV4p{Nv!Lm_bs*+{l!Nzpa}OVo!RLg=A~B)udh z#Ywt?=2CKLPxYyoUJ8YxwkeqQV5T)SUY2bj5ciazLz2U$1Qj<;y`-zYd7~X-TA^Lu z|IeH6e>?29+giJ=eRG=Hy|al4el+Yq2_|?LvP;1M9`@OVKX#5L_=7vYJb|T7F2OJ7 zMmS9nZ?|GnKgq#yH%;P?VD+on_tRKyo4TLE>K?3)VfE1b$sfh)v3cFkVD*<7^T$P1 zbi<7|tKN~S_j=Xq*K=&ei)*=J-wk{7;m0h1`zI_|{*tAKVq@`xi5Ev-I`C?q82`{w z%}ZNG_GXvvocONT8@50Ac55=Pr;MjdP%Y-%J}oRlOt_PSZ8Cmk|QBq zC0Ieyhg;7_x$91+JKLS>*1M<7Y`17W>sB^0dnasH|7Sw`KO<%dr#Gr%%H(3XQfs!# zi%sG&OZ;cVJxK7i!g1Qco>ZyXEHAcdjnk^BP+MLrya0{#HnyZ&>~`PuRS$x5K}rC>ilv+NzTuD~@3mmXyKiNd(p@^C7gV2=Q5+{34Uv+OLv zBxmTcnwT}l7;)zcCutd_RwA?^7v5kbpu7n9t6-)xmk%;-D^d*ySp;E}-P%5N28DI7@W)rsw3A?DZSwdr{ z@Nq;!3=+~&!XfDo5?)575@t}U1ov$~TIgwWguW%W3Zw?eRD^sFd>f8#z`TlWig^R2 zVv4ChmmqP}??A%WD7AS)*W`joh(p3ylyFP>gMhoJRKV{-+J;JS&jFLv#p7#bLX%j< z1aluSMkYr>IoI zDoT~$UIFI!=xG+A>vF3YdI*r?5prAl1LS>Fh_uB!w}VNH+P{f= B;z9rb diff --git a/cinema/gb/mooneye-gb/acceptance/boot_regs-dmg0/test.sym b/cinema/gb/mooneye-gb/acceptance/boot_regs-dmg0/test.sym index 062765d0b..4afeccdca 100644 --- a/cinema/gb/mooneye-gb/acceptance/boot_regs-dmg0/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/boot_regs-dmg0/test.sym @@ -1,199 +1,125 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_regs-dmg0.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_regs-dmg0.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:01d2 invalid_sp -00:01e6 _wait_ly_4 -00:01ec _wait_ly_5 -00:0202 _print_results_halt_1 -00:0205 _test_failure_cb_0 -00:020d _print_sl_data55 -00:021e _print_sl_out55 -00:c014 sp_save +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:01d3 invalid_sp +00:01da invalid_sp@quit_inline_1 +00:ff91 sp_save + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000002 _sizeof_sp_save +00000083 _sizeof_main diff --git a/cinema/gb/mooneye-gb/acceptance/boot_regs-dmgABC/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/boot_regs-dmgABC/baseline_0000.png new file mode 100644 index 0000000000000000000000000000000000000000..819de3365c0327a266cbdf200ee64cd27c41d11d GIT binary patch literal 1324 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|U!vPZ!6KiaBrR-rlxEfybpV z?Eim#YyNYKWLrBXY;leJ{d7*4wVRio;ugKvyVMSzp1)jHV53Juk&1z(&nR z>U#Mc_UlhF0}Vr4ww#|WYZfCqGoN?g8qeRow)N&Ij_v!OZ+>>0{(dz1zxK4P zv2pFU@{7ZseoCkgzZe?&lzIN&_U2<-ukBvE>xS$TN72RCUu^!L=Jvk)szia^_4X+N zy)#*_+83Ejc7-@kx$)%015Y5Xo+~VyIXyt?%YhBX7QSUO)Zd$>o}b;MZuyI~Y~c*4 zQ@fA7t)BWjRZF<+)V9r?_tq_+=9_ipm`9Gv{;jIgTlbc~y)x;-cA@P3DO)=Anu_(~ zms!8R)wp)0X;oIix_xe{d5Qn;zU0#LeN^uuf2VG%TUO<5xu}A-$Fgr4|Cy??;QQPU zPK5@Rw!T~5TV?I;l#4Ie^jCPxz1y{(JFVx|Zn(Z;lbHLiBh#OM-FCNbSJXLda}=@{m{_U$^!_EqwR zXQwRP``fr7{!(zwbmi{oRW=qUUVSj08};mueVQuUTgw*luI7`8ea-a~_>bi;n)&#_ zlkgWuU#Ipp=L$S}kaJ2^J|^Y!*?B@0b0*{nom*PqQ8&6UBC8}cR6c{v}#F%+p`I^_3I>_r)y~J=l7fXQ~y6|1? zZ(4vAP+J4vrk>1AW!%5lvuhf@OE=Lt-|gqmv#H=u5Azk>hpZXGx_c7(ny2#n-6<>x zvitEdr8(E-=Yv9r`?HtSY!F}2tn=qb5%c}?=cL|<#;;rYTujOGM<^=leH4PM2Ab$EoiyJL6$1xL84san#_&5$Z$O}32UCLsRvq$Jf6bV5gwXFBYe`9WFrO-n~ULl2wXJBWxYh|5( z@9fFfp6ub*QRi zx{*_=Z{<#y6^6OCF<}}8e7Nz-G)&mBvRV-_7e6Q0Dgch-2p+~mcodJ|aXf}&I4W{@ zScsUZd2t#KG4W9Zc$A4Rq6?2O@tyuM&cu@V6^}8oOsN<$4or}rtw zlgO;+G!3Z=g@WBZ?VTN)e|u}gvz{Yq_G&QH1Ml8$e-LZ~TD*lsZc+q7kn(v>G8oXI z5&|+Hli~NC0)3FJOMu`guM|-wGcTV{6--|sg)Fez23461WrI6&>E*D_%~pWd4tOS$ z(VYU6|2p5WK%WghmC49X;C3$4`HmIfw*v-cGQN9&vgMucTVTKjpUY%ycQC_cI)|)) zT07vSOk#Tl(D$bwtIq-(Z19ClqI-diOLQTZwP{s!b4%#191U0T}U%`*5h z2E}&xvmAkp!#31r85*`4GsD)`Y`qAqYquaVDauf2nl2^x|OW zrxTh0R1Uy+ViK*T&g-pcCDDp{XBJA_u6+Jy3sqrvKL0B(XKKOCuYb^Aqa-`dP3Qgs D8u-`* delta 1391 zcmZXTQAkr!9LCSNQ#ZG%o7e23kY_7m5rh(?MNX&AZSLm4&3x!VqK6)gULp#$?x0@6 zmwd{nkY0))RvAb=$R$aB-*>oXU=YJTSwwg!j=4ZO>x}RLc6K$E|>mg`{Jp8v&HXh~!oQkIHxvu@w~EUfqd~DShhtaLm zajTLHkOeCn|8KzQ#~Sh0IT~wQU56Tu9yk$1%3nXy@m$>Us)~Co8cU=z(XlkLh)Tab z^jdQ1%b{+ZV;N5*osN!W5~)!U3MHnOLkA&$eKc`fNeg z>2w+&4=t2reWKK?PflB{>J0qa;3t>-dT*$SZu#0#ZXw?Qs%){RfI)K;Fv%o7m7uda z2tnpxs1HY(lp+YH_>D6Jm9U;Fx%Jl}KS1$i?gt2JQ93kyoypo%5(tV9-(}K8_y?Iu zU@kCE8b2~HkRBU(6?_ejuF9NcF~OW;QZVV%4>^b) z^(AO{#-uca@G`$a8)~7U(QbIp{c6D{rbNMaDm6tkm{Y(+N&5Iw6k#`8IViIRm<={F z$o(p_lPSUMV^SdL&|^GLhrR{{7nzje2v5JA6mAVV)_`u*jrnFlT`I zig}WX@Cx5bhpq!;la1WueiiwdDTdVOe{P#;!Gx)efG_Ju{kZ6~iZR1oMxmOZL)kH6 zW~X&rH9Hj#yb(V->QKsCZ-ko`%kCa&&AHYYG-Mo6=@Hfu5`i)3Yt)W2wl!R}WEo0i sd_~o&*#VK&?CjwF>;u~$649r&72O|wYx{8#-LNfnZ`7zPNmAR%e{!$2LI3~& diff --git a/cinema/gb/mooneye-gb/acceptance/boot_regs-dmgABC/test.sym b/cinema/gb/mooneye-gb/acceptance/boot_regs-dmgABC/test.sym new file mode 100644 index 000000000..702e844b8 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/boot_regs-dmgABC/test.sym @@ -0,0 +1,125 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_regs-dmgABC.gb". + +[labels] +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:01d3 invalid_sp +00:01da invalid_sp@quit_inline_1 +00:ff91 sp_save + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000002 _sizeof_sp_save +00000083 _sizeof_main diff --git a/cinema/gb/mooneye-gb/acceptance/boot_regs-dmgABCX/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/boot_regs-dmgABCX/baseline_0000.png deleted file mode 100644 index ca834e18a5af5f709acf3553d285ccfe45e04f10..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1327 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|U!9PZ!6KiaBrR-k!BYfv4r= z&tHGzE59u&mksl9@i?|=&HuDzwh2pEI6Hs+`u9(-Y5MxryaGEt5{gs|EQMysaQgJI zsJSyu{;aojPu%*qw;PO@LclT~iUVUwct@2a*ne)Z&tW{Wk>Regp?Wrc4 z_Fit%RrH_wU#5;N^6lC6-m(3ULnGfC6-^Ojo^(q6aqRz$+wR-L*JxjqN_i_ad9%0p ze)GJyHqrlzFVuF+{5<#s!?ntdCnp|wvZvqNuw&NE@>7vK0+t6~zARc}Ve+Qs!JY$( zIYMR5Ctg2wzxq2-M#?P0@}_J3x#L`Sd9s4TyC$F5c<8nKwOgB?Mntl02wZbjZx{Eu zt#6`@@}AdTc1?@=aIHrC@%pd(wy)k%B>X%0-NDD{ua_j&Oj{myr{ZDQ21)x~mM^=6 z15fa)r7!FL_V>`vOOyVbzF{MGfBNA!-0JTS1}^qG-Ouw;KY8-f-81W^U2i$ONB+*Q z)~~k?I_;`U>8Q7yanL?)!TjK!m3f|72WKq5C3H34U3BWfsm*I9hFRY=D)Y5Zo|QRW zzRz;9X>e`3a(D2m7>g6LHf%Pr{rt^7O_^W_mk=Wmz_O01FW@-8P z={NbmIeuu~zR2m(!C1R(KZBX3PZsh$WO;Q(MZxsv+a5Ru{Z07Tc$42wCWZG_cciu)OySq>Q zxXw+R_Nzk>5pNi&8KC><_FHOKGHHbMdnVk`mPsMv-2{S2Td&ReZS%K zUCxzyzd9fHxhvWu@&mF%wEy?nUZ^Ci z6pCAiAK3fFg##D^j+OBxCqL>le=eQ(l%1Vx!t?lJaT@)fo9Ei3v-~gGZoOviO`w@C z%h{HeZ!BiL;CQV{t=N2`walNM>?z+}r)#rCT9iFw%$nB0w53}t(BSvME_U%e`yCo` zHI*9<>brb=Q0lOM_L7PMkp;~`@0&YW*W%RvFZ1uq*3bKK;auKNWc>?j%umiT zkJGgIc5Oy_y4I7*i-C8Jo||^naoSe1Bg`k)ZQXriC)11a$s+uHOeGUq-^bS-*e?8Z zx2NiT{yhFhpr03{b!s^5&Jb(`7c6K22`g_X6h0^aK;JQwPs(@>s37!o^>bP0l+XkK Dn^c0^ diff --git a/cinema/gb/mooneye-gb/acceptance/boot_regs-dmgABCX/test.sym b/cinema/gb/mooneye-gb/acceptance/boot_regs-dmgABCX/test.sym deleted file mode 100644 index c6f3e5ac5..000000000 --- a/cinema/gb/mooneye-gb/acceptance/boot_regs-dmgABCX/test.sym +++ /dev/null @@ -1,199 +0,0 @@ -; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_regs-dmgABCX.gb". - -[labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 -01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:01d2 invalid_sp -00:01e6 _wait_ly_4 -00:01ec _wait_ly_5 -00:0202 _print_results_halt_1 -00:0205 _test_failure_cb_0 -00:020d _print_sl_data55 -00:021e _print_sl_out55 -00:c014 sp_save diff --git a/cinema/gb/mooneye-gb/acceptance/boot_regs-mgb/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/boot_regs-mgb/baseline_0000.png index 6d33be3230c3871ae6494643f5851a09d02cce30..4ab2ab32334552e25ed72913824c7b8ea865c082 100644 GIT binary patch delta 1184 zcmV;R1Yi5C3a<)~B!BivL_t(|ob8?4nxr5MgmJ%q|5tV|oMl`k5h1iiS^v%SXm^a1 z970f+bzPI-<}`q7JGjkY+ttIsZlW*LVx-Rip*~fzN|_6 zjoUYidy5oRxqIC6(en>2`{I*770cQ$uS4zkIjeH{Wq()ERaNB!pZz}vjjh(Zp}P1T z7uaW4VGChM9}Ii82kQN_vS;`!N#;;O zG^03}oW?#lf9`JptR^m`>5E;MP+TpVKV!CqjeT&`sDIKLq=XD!&g*TP{Y<5(VT!?K zV-vmn<8rmLZ=|@u&sq3)%frJ$zGgoy3;61$K{XijRL?}U+fk-Q@Z=z?rq(vsj6>CL zYX*F>w0Ca<_$DpI7c~XAxAw>&tHIB7YMJwA%t{Q}bBHJu2b04b2Y(?SjNe2v$H6JC z(2M8G9DfJ-UWJiIR2Sy!A3bX+K0Y24{( z{d_Y5(Dg?2qd1ek1Q>suUx5MhnrQya$n{*bHQgF@uZ}Yz9C-I%l(p$N=G!Zmf)=+s zzg_J29p%q8i{h;B@9n1<^6+2dw+34)7K+&(YrE5^7O$bzcyE$#!TKK^Bgm;{bI_L;>1Fizt}mVC91ocO0CQ4}Lt^;2Tjs zxF68>CMh2r1?V6PKfc_+_p`AEN5z+G>A4Gsy&-XM(LRo!;{bI_L;>1Fizraun@42L z8}}HG?Hb4VITZ4B(NWCe=b7F?mbEt|0vTOuv-sHq=zEit4~_zKkcA&#Zs7Zg^4_F0 yJ`O$~0>{sBfVw530Bxd06qCIKSs5fSIe!7zjO|f4Rx4Qm0000P{2@ delta 1159 zcmV;21bF+e3ako{B!BZsL_t(|ob8?4dgCArgh{`=|0{Pdvg@)2$rz-1Jf8oisSj8% z0V5>GukY{gB6#__+5nM@1SUrUlOuu2k-+3gU~(idIqy=+>-F0HuifH$yR~cQMxQ!m zcks5?D#WtWH|gQLKY!{*tQ)A?SoJa8<98daQ>;R)>pG`6CSyIE*RID{J@{1fb&qjQ zY}FdKXQccm^V5U74dgW0*&%WJCXF2L^k7TKQ{_L0pGj7G^XpQ#<9Jinr;J=>#DJvo z$#~cQwEd$yD%Oo?O|o{K$vLHqKN`1oo-O}5=)Ogc{FBcF8Gqi#hZwA{?2p8KS1yrJ zjunT7T@aiXIE2HvZ&LZwzaXp*(Ot&td2J7# zuoF{7hZ%uy@y-1O>Zm1bBc$AeVQaf%+)gXljGsnw4<*Dj@`K5lya#We*9QP=hzl9| zV)J;q>A>4(%zv?P@*W&DtF$I5A(NNbWa)0EAO2)>a)^HY!}2c&3+ZO%S=-NAIFi9X zUZ9^-jHzx(>cN;*ZHXGUql(Jl%1PEpubu80yRM&+EWOJQ$IQo`X}+i>z`C?cCRr19 zmS$w$K4W%b&^w2SLVhqg%zp4M#DnpNXl6gS#5H=izJJVqun&SCycP9f#ZHTlZT^zL z<)lQDaH<*=5AO2Z9y~~@A1ppF`@x5kti_Zae-{YqALPgnCTB+A-O#r<7tNdHhA$4c z758W92wa>O?fAQBt=6>%KihIO9^9?=q943%nX_%2@$V32tfB6v5x$c&jcBNewHfzCBt@C zyWLtBwDMY<0GzYL*uAck{D!}pn99Lgw3P;IeYP6WKe%1vb%MkrDawb(KZn0V^r!OO zplr7XSlg{2adz^sl|F6R`5g8`bc+@6>27y=aCQf>F5v{Mp1@bBx^LTwx274~?y&fb z!rUb$>?Gsh9y~Eb*T-}eOFNZ{yz6|2L+(yU4be}WcRULDlV1ZFe_Z+Aq`I8CsHhlU z?Bj}gcBX>zd~i96{>~BA=-GDWG5>t96QT);+k~{5^AK}EvNMm1-hjw<$$FVaHP_sl7phL8X0_D9)*1GXZ;jy>IJUde%I?s!a;x2Z!tWL75y&)b* zcB|dR&J{r4o1}Pf6rhtVeE;$TzMUxVO)B|*aC-?HJM#cFOGE)WM2jes(F917>jV@Q Z{s88eK1ttd!Jz;E002ovPDHLkV1hXWV5k59 diff --git a/cinema/gb/mooneye-gb/acceptance/boot_regs-mgb/manifest.yml b/cinema/gb/mooneye-gb/acceptance/boot_regs-mgb/manifest.yml index ac2b1940f..57c11b941 100644 --- a/cinema/gb/mooneye-gb/acceptance/boot_regs-mgb/manifest.yml +++ b/cinema/gb/mooneye-gb/acceptance/boot_regs-mgb/manifest.yml @@ -1 +1,2 @@ -config: {gb.model: MGB} +config: + gb.model: MGB diff --git a/cinema/gb/mooneye-gb/acceptance/boot_regs-mgb/test.gb b/cinema/gb/mooneye-gb/acceptance/boot_regs-mgb/test.gb index 749b13ce6e70ed13a053b008f3fa79cb2d2abd42..ec5167a1fe123e8db289a67f6907a2fc38397b2a 100644 GIT binary patch delta 1139 zcmaizUq}=|9LHx*O7XI^>tZp;*(2;CjD(<&T-LkuPmZ;afkIG3ULl2wXJBWxYh|5! zdS_3*_GE8o`5?Unaopi@Z1hq@4>2$LC?kiJQoGIUwVr2+%l>A+v-|ygf3rKRsybBF zF?WSins1a$o3)0ywlQrQ27Ivb(lkuivzo1qm`k5iYqbC;a0HLzF&xDccnVMAIF5-X z9v32JCN0k4F(y8W07selBD(Md6W{5bDJGW1uXvJ)6_LYnCVq&Qaf}Hg>k>$Fa;`Ni zeB3?QlXl;yH|sEyF&xP{t#eudY)!>5?S!pP^KXi3ic0l z_x5Z)_O*l;yoYn_wP0uf-nrF%KiCDdLIJ8A;h{qUd%Pjyw@-% zj$lWk9?%1>Ys-g>(hH7sar&%B6Ux;J5Rf=hoQ$F2<*Jpci=(}tPG|y9IRF#M8MKx; quXm!=WG5PYvsmeIIr*O*RE0fG{#R+y?4pNX|DeA@sd?yVKlc}qm(v{p delta 1496 zcmZvbL5Lew7{}k6G`ra(yPI^jb=ZRY5~V~6WlON3iU;I(5woU41u=?9P>yL}7 z=!P3-tKQ31?_|~M*K=&ei)*=J-wk{7;YTch>n#>6f5y^7v9b8U#EYYc4;;-C;~5>* zytHLx?{?|VsjrH?Vf*TrTa$S`WjtAeYB`@W{t?bPi|a3?jK5AeInt(tbvAY@ITF%U zf)ylvu=RYDyY6(lv)#FFy?e&Yc8liIZe=60cfxk{en!^6-)xmk%;-N^d*ySp;E}7Q7WX^j4%5cvx(b;gk99yETOS8 z_&6dV1_|jX;gIwP39q112{R~Ff_njw7JAwoq37jMfz$w*ijbGVw_$Yy=5=gS%$q0` zQ%wDd1c_C@0SRBA)aD6YlQ%>{91_N&gde3p2>2D13iwk<+fWJaC18@eczmr)XcDWK zVD1CvXvEA*f54nZrI@EtDx?^CQTB_W-+_SFQEF8}FNw-FFku)HGEu^Z^28wFHY$~{ zic%%G*MRvodYVP(x;!d|9s=ZeguE~P0rEFgh_uCjZU?nu!qiSK)6SA2?G1aqijxdU zVP8IGJaH=Sw0FdEr;QZ65!+Kkq>&zR%<okeKaTu))%tm4mG`!O7x`7ydM~o9=UbirT}_)j{x9XQ B<6Hm$ diff --git a/cinema/gb/mooneye-gb/acceptance/boot_regs-mgb/test.sym b/cinema/gb/mooneye-gb/acceptance/boot_regs-mgb/test.sym index bc2c5e877..6cf9ad808 100644 --- a/cinema/gb/mooneye-gb/acceptance/boot_regs-mgb/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/boot_regs-mgb/test.sym @@ -1,199 +1,125 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_regs-mgb.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_regs-mgb.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:01d2 invalid_sp -00:01e6 _wait_ly_4 -00:01ec _wait_ly_5 -00:0202 _print_results_halt_1 -00:0205 _test_failure_cb_0 -00:020d _print_sl_data55 -00:021e _print_sl_out55 -00:c014 sp_save +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:01d3 invalid_sp +00:01da invalid_sp@quit_inline_1 +00:ff91 sp_save + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000002 _sizeof_sp_save +00000083 _sizeof_main diff --git a/cinema/gb/mooneye-gb/acceptance/boot_regs-sgb/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/boot_regs-sgb/baseline_0000.png index b9a0bbda2fddd9a95609b7060cc3c25d2fa5687f..75219be011d1621bf4f211f7c66879c40649cf5a 100644 GIT binary patch delta 1155 zcmV-}1bq9R3X%$tB!AgSL_t(|ob8>_wxcQ#MDect|1al0IE&-brbXzEWm)@WCNaSZ z1xnK#S-#(I5xo3&w*Zlg3?@eglOu!4k-_B1U~*(IIiFI>vMlv=NLaiqi^6LVKI=c# zkDWJT-kYDSMeUB7tzqE2t@2;a^8J2WwRtpq+YZ(bx9sV0v41p-^v_!bJ5ojEuLqy@ zr0tvQC(WZKrYl#^dpvvnVyk@dssA(U+OMx&@Ao;na{6KakSSGNdBOIh1 z{2S!X73Z!oR{oorZSU$a;C#+MVxb=M6x9F7(M%ROGMF40OpXjDM+TE4gUOM>_uNKuB1cq`X)^l=ht|>4U+d&+k0aHjy6Z3599RBK=M1wmS;aCN@OPT@>uj|@ zd~O?LIr-X0#FynEI#ce!oxgTlLFRhnf99)r85uEb|<1x9FxBU7=O;6 z!GL*9G(At`d@i~*U2MKTuqNJ_5Du9}_5VDHo_)T$m3ZHOtz)~SV?O^lFYh;q<5^mt z-IMu zrzCOlb)xK>WY$sZ77)c#bk2a=^h5}XgULa8UUbQcF9VnCyeke4G$1d&jBO~di-TJu zj)DnGMSGqRSnFEF7JAfXWh4 zfL@|S6wGn3^1+2W4lc?E-=1vn3sF9J9?*T0ln;&qbdZG~U#{TmoPDJKWPJH;KQg)= z4T*!z@^N(L0V+#G0eXoRQQW+5Qn3cQQFF+#x5hl3JE@Sbi;m(cI*;78Z&J@GvTN-r zI%fdgH%a;6C_o2U`0?cmzRo-MO)9^QgO8`c(U}LRED;6hC0axwlduF>8Ak?_^FPu= V8hT=-B8UJ0002ovPDHLkV1mwVM-~78 delta 1145 zcmV-<1cv*P3Z4p(B!A^eL_t(|ob8>_mYXmPM4g`e|1YNxX;~j^31dskFwA{vmw=df zuwx-7ygr{#5xo4lT7bw!29qO$$&tb2$Y640FgY@qoOdbZ^?Gf8*J*LR-Fj)4MxQ!l zxAXR@6~xl%OL{o(?>}`T)(zBcta_jB{=1FVAyyFUyv`wxq+*Bj+VvQ#2cK%b?mo_e zty|-IM&du2pB~(8Ag9UB4vE{9G_t?bgDoRZ#eWVzldSf`uS?yI<4su~GIEv?0ZH-6 zc-Mcl{i8c7){SUQvUZ)xIi!m}8n-&n#(xg_+#*MLlfeWTfA8a645IGrJ8>2ZL{4#f zI+|67hP@#;Z*T~kh20YJdiW7Fl`kpsHCRt9s_7?eNxrxq{&)~s# z`>}uA6>57ab|KX++Jw$skSLvbfL?bZ3gwf#1Q~z)+^Y1Kq_i)!+pYV8)_uNiNouRU zbwgR_b&3K0w^!&nxEF1eY_0!Wjp*;(-V?TptRosm_J0olhUk~^yH{2{z}oIFd&p~I zYgw{W&v*#?A-csXm~^*0Jvh4qS*O4+_@wfuRNc4j#9Px0Zg&{pbDH)P6FSK__za#H zqU#xby3s~@Qe8-|LmdveZSD5qL-Z5p9gjkJlfeWTe<;sQszXK9`26p!Oh*gXnF`8t zlgd%`caEq=&(@j8mCsEYImLPq=NtGqI`aU1ZclhV8BTmf{FwZ4+MyO28^{1w+IzZYGum}KGT%mY-Ghyrwo7Ev(g!Kw!r z?mW1t9(;MR!4IN(@H(K+O;SBL3eZUwet!7{U+3yi`Y+~}{`YsszfXLqvl|~rXC9!k zL=>Pyw20#3=O&fjL^tXla_mQAp3YRr*F{HhI2WBQmpwOWF|9LL|Rl%iSMY77QBvxIGgkq{J;!??Tt$tMkDpwOWrw~#``HLx|Cv9i{` zyLR&0$)Lkp9;8bY%ZkG?(WMR@;$8G8PZlesX8OI^#&u0;nBSZ4oB4jezc=$3O>=3Q zYwi-KHoPjBwrWgkeRJ9}P2t|=bIY`Z?zMDH#9IEGT(3bSP9kKCjFJg5PNv8tiIJ$p zkufo1r4}VbMw$2sVuFb;QW+U%;v3wVVqyivBonLBdlF;fyL6pInK09Ckv1jfTGHZI z4lYJ7HeTZSVpqCux}^GzO!L)J&C1-p9K78X>JRpX5Szn!irHyo!CMVXeJB*{>+kC6 z-g@k74lj5QXV@#jP`_~NM%Ue7C(`5XG;$3PK|m?L_auW647CEH!wMaH>pftMuw{q> zD&y61Pzv+%MWBStfl}B88y!$n=x8puJC|7w>)d7s_?&>p3Z2+3K>erlRU7m>;3I{O z?*{JVvYl_*0RbmqM4?lA2dLZL`Hl@XIN%e7PVNn6xoqc<9nkCqJX2`we*y6R@UaGM zu+;&dDm3~(ka3A#?6xaxDKUsy*N01)hN*Wt;iO^W ziq|1HgbjV=kXd-%wV1zn#-ocRS}6+19L-Ne@z6@;YUPEIo=?Yh5osI};)xl&o;qiA o;I%{t9(cV};c*x7KiWZsJw^P_!o1lf55Mujc!87if~)Q9AGp)ewEzGB delta 1496 zcmZvbL5LGq7{}k6nB8oW-A$ZmhZVXnv6P5VR)o5(7?a)2CNWb3o6tRYu;RgkZ7;1@ zR@(`*7xB`bx~H=AQYe(PwXo=6dAPXjFpNTB?WvN3^)M}V%WCZoI_dYmmwC8oNQUqK zpYQ$t-+W}+ZLQtbemqI7zmLW;{7}$)>}Plou#f#cJm|3x{@FSd<9}@2dJMNZ*%-f= z9pW@b-0ez%dT|bpvsNJ95LUOLN@8`lkns{&-2-m~s|QdGWA(7Wy%bje7T)tlMOAcy z)px4yYgPBHs@tn)*`gcOvc;YgY|aE%m=D)4nZNKIOAbUvqI+Yn4!^$VjT|wa(P7O^ znnwCsmu?;VxwtuKee%=#SWZtEPv)Uo$R&*bgtNk;`u>FR=!l&qZAw^Yb-R)!0bL?k zLDFaI&qp~ccBeblo$l7VCkp9qvGBB8SxxPnuw8x0gw_iqrU|E4t76LdT)9$fw#su& z;xbcwC&kr|@#Xvx+QFVgso5;gwQ7x%swrPvSkAu!jr3P+Nw&((7Mm^A%<>Gey)^&S z+s!X~Iv4x1H5k)(B(7na&@lWt3Wp(1yJ6HX}ae4L{DW=hFbC=cJ!yBx8(Q^a9FgqYeZkMZZ89 zWAa0sIxrW}(`E_%R-P410?eV1c|-b=N!L*+2vo z{fz{PRiA}~A5dyDgf7b)A|VP1BVocF>GuPEN2LP(64EkMf^#02q%Iy`D-#;WDk7M> zfH@p8bJFiKCr~Noag+)vhMtrCV(5<`;0#KwO6Yk}Sq3HyLP9D`_*|aoCwzrUB`l#- z3C<;8{(_!n61pOfilGMpIT|AGO23c1j|!2N_|I*jR!o@M&ZgRFQly)M?q5clLfA`ZKEa`_L-yY`q!!Rn@u?TITbucJG>|jUE0UN3h`a diff --git a/cinema/gb/mooneye-gb/acceptance/boot_regs-sgb/test.sym b/cinema/gb/mooneye-gb/acceptance/boot_regs-sgb/test.sym index 2c87dce6d..c593fdb5c 100644 --- a/cinema/gb/mooneye-gb/acceptance/boot_regs-sgb/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/boot_regs-sgb/test.sym @@ -1,199 +1,125 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_regs-sgb.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_regs-sgb.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:01d2 invalid_sp -00:01e6 _wait_ly_4 -00:01ec _wait_ly_5 -00:0202 _print_results_halt_1 -00:0205 _test_failure_cb_0 -00:020d _print_sl_data55 -00:021e _print_sl_out55 -00:c014 sp_save +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:01d3 invalid_sp +00:01da invalid_sp@quit_inline_1 +00:ff91 sp_save + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000002 _sizeof_sp_save +00000083 _sizeof_main diff --git a/cinema/gb/mooneye-gb/acceptance/boot_regs-sgb2/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/boot_regs-sgb2/baseline_0000.png index 94b57dbcffd6610493796ab021792f6670c29e49..add17ff8bce9606f7a5f620895a0fcd83d04abc7 100644 GIT binary patch literal 1297 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|UzqPZ!6KiaBrRUYxc>fybrL z|Nnpe-TZrBSE#tOrf8hrrN2A(wqa01i@~NfucKJ>>(i_iiY6X-;*n6KVqhsWLx$6* zk45cyuvg@?)Za2fV)~~SeUNH7|9!r1f3sQbt=Z{$%lPik+Pd)ZF5Tby>5!j<5ZlczWNDod3qB zZ|Sdhe*JxAsHN@A|EEeqeSaQE|Nn47;p*@2GW7m2e_GJ>`O1sU|I^%F?~dZJnEyFg z=StGNrd#rsvra0xGfh@*Jc;DsIp;e2HhF9CM%}Pjvg+02z;EtrwtiCDaGCQjQ~L$2 z=_@{UZAxCYVa{WVlCq2Ue`lsnUblS4wErc{hI9_<*t53@Uiy3p~IflKldUfT8 zQCVWsW;2m(%5P*`w@=$~Pt|nan(MdAen;No&-uXUUN7^8M^E6<=_cyJBoG8U)gZY zTCnv|LXp+=6ifN{v$A@N=3abX`dHb1{anLXsqe;9XTDxEw?;Rl=H(BDr^`>i(3Xk1 zKkwe!$?Mm;ukuVSzq`qD-5*nXcZs-#Dt9hQK%APKttN3{7*I%|8d}_#!LUL>Rvwfb`)=MWcNzHV&t8I0jzqP z{k8-u`}%*MbDHEmGAIXZo#=+n}| zg6t!K29Hi_pSBhJbB3+t{*wEWQ|y4+9M~hzncOVp{ykq^)9_uo8A!V^TckzZGsaib zI+(U}iv=1SKX{5={GG)P4S5^en-8P|?J8t0)J_Jb52lg{t@8182fr78nfkB!xSiDJKR&HBu_Yq@A2+An+UFUr zH!(KL|6?%=x`DuudRqSY!7m|Xm!Os*I0BhW;XkZi{M=Q~-(F1w6?LAjelF{r5}E)n Ce12m9 literal 1312 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|U!*PZ!6KiaBrRUYxa9fv2@_ z-@gCa<@&plf3_UqI4RKoeE&_^)gPxQPmze){{43>ho1dv)(H_A1{Nj~GEzKzylm}k z&CbmSE2jo+%f0=7-Q`DByT4pg?A=##BJug(P|c1d!PCDK#LcgN<+et8#qEf%c6a~s zOD}a^qHw8lsMrbn@5iq;ml{1eSgmob`R~bM-OX}5v)QeS#OKCN`266qXPD63g(`dBb%+CX zNybcG`lr%#iplBFwEf>67`Jav+BNA}Y1^iv*eyZpeW%82Nd>)pW0bL>?rhY(wL$B1 z(^om>ruW~O8~$(RImxv5DO2a&$4`<7gn{n&&%mhMMS{WWRIx20vfOX34|oxiT@`S$AeJdKxo zybK-wf8(-I|GsGHq_tn_R|(tLE4D zu(riJU-P7XES~(uY*xPMdbj>-lE)uCSDQO8$*$uQ?;jhh#}R+-ENOf&{le5I7bTBB z$Pd-ZUJx^3+M5*R{pXIJ_pSPGSMCwtBX}gX1WZZXPYWwIY&vJ@Tvusfv-VuZBs=q$`D#ncFIqZZ^1SxP>)AV}yz)=$cbxlF zeKGZ@igy1wi%F-H;#6c8b&8*;G`5S`zP0Te%k5zH2?F1Zz7c?$0mk|eN=iW;Jar5 mENh|`El9zOT;h->{F6OGDkizf{LukW$>-_n=d#Wzp$P!9ABHIa diff --git a/cinema/gb/mooneye-gb/acceptance/boot_regs-sgb2/manifest.yml b/cinema/gb/mooneye-gb/acceptance/boot_regs-sgb2/manifest.yml index 0a0ffd6cb..0e5d5c091 100644 --- a/cinema/gb/mooneye-gb/acceptance/boot_regs-sgb2/manifest.yml +++ b/cinema/gb/mooneye-gb/acceptance/boot_regs-sgb2/manifest.yml @@ -1 +1,2 @@ -config: {gb.model: SGB2} +config: + gb.model: SGB2 diff --git a/cinema/gb/mooneye-gb/acceptance/boot_regs-sgb2/test.gb b/cinema/gb/mooneye-gb/acceptance/boot_regs-sgb2/test.gb index f6133cd5bcb7ea3387197523e050a575db23d691..db5051022ad6fb0d0e93dfe0f59a2601c66ca805 100644 GIT binary patch delta 1139 zcmaizPe>F|9LL|Tl%iQ~t1%el%o4T{MnX_X4&(0nC!aKsf!g% z?%K&~C+oD92k8>Uvf{8zbg4s!co#j&lf_D@nSO7!aa~g!=J)3NX1<^A@69|$Rh_Ep zoV(&s8eSJno7IN7zBz3g27iC^g=v_4_gcC-VlID4u2&-xClNA6M#%&jCsSmS#7I;$ z$(Rr^Q;Q-ZqfC4PF~P)Fv6PH6@g43=F|h(-l8IIE1Bo&5L%czvOc-gmKpPWt&1vDA z11@?m)?eZIVrRN`x}@r@MDrDwYG&?U4c_Sr^#}Vxh|S?V!|XJ&;H?6tE))v(^>_7j zZ$0)kg%`X>Gi+Nh)X(3(*>x}2iL`h-ja&zW=TXYw;4_*kan zyMa5oZ0B26K)?hJQ1+8w#vmR+c zzlxr!MFn ocrDR^2i`1|d)!6b&vsB@PZ9U4FmHCr!)<)jU*hCE?`%E)7v4nDvH$=8 delta 1496 zcmZvbPiPxQ6vk&(ku6KIEoGH-aUdS4A*ck3L!ogBQ6$^4q-Ya?CE`O5N$4Smw7s;Y z#Yww@_EK_bPxUF7TndGvwkeqAV1}9+FUvL%h;vHNp~+!ef{OFcOS{UOH`*bl71Hv) zZ{PgBw-0T*t+m_Q4`-;=J08pMqe1_PpW#8kKJ@qTpwHg>d;4gNKe+ST6S&pM#`wqC z5l&;o-KiA%UYvvDY!rw$g4OR(C9&EnWV{4c_rV*(>LFC4SUoCmFNM|9!g+68R7EFP zKV5YXRo&xNw_ne)WjCs2i+v~P%>`dFAFf|9f9YG69EyxZ_s0&79^UtQju`*aQO!-7 zM*2pVZlCz6*c-M!`Ehe1rzebOi%>1)62^1ktg)#6YQlJY%+8WFC9Jc)Q^}Hmt`Mvs z>9ft3qntIn)1B$gcI(|!g><)A_@`T0Pwk$tUHzX4t^bUeCY)ZaiYem@P3cP}-9)93cTp;&*o-Ip8MBDfgoGW`+6FyVmo2MMpCQVG*2Rf6+2AWihNSwhdsqXMY`G7%!*2j7C#4VYK3O);;cR7^4T zH3<@{eg_i1N2$#bx+-sogeWA8g$cK$KM1&oN(KBSq-CfC=MpeUT|B;4CNz#!L@@UN zb2Mb;q(5Lzp;F9~C>2r+y&(I=&>uj+1(aHq&`YAS3``h?gjAUDxjZpQ_!^Z;SV5^0 zoXf!c89mJ;bWI)=Lk|IRJVb6ue}Mc06(TM1pW8;Qm@u`SO|{dcNPEL>uVTjolHZey z7|-mAGvyvJohc&$Z^Wa?A<{^W*oE^a3~x;3Y@L=&vBDw7N-&0ajSkROXw45S yU55~zzH3^8-Wk. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_regs-sgb2.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_regs-sgb2.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:01d2 invalid_sp -00:01e6 _wait_ly_4 -00:01ec _wait_ly_5 -00:0202 _print_results_halt_1 -00:0205 _test_failure_cb_0 -00:020d _print_sl_data55 -00:021e _print_sl_out55 -00:c014 sp_save +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:01d3 invalid_sp +00:01da invalid_sp@quit_inline_1 +00:ff91 sp_save + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000002 _sizeof_sp_save +00000083 _sizeof_main diff --git a/cinema/gb/mooneye-gb/acceptance/call_cc_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/call_cc_timing/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/acceptance/call_cc_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/call_cc_timing/test.gb index 28f580b8aecc09173dc6ff129a2e85a392c8a1ad..2bfe7c0dde535309e53c5bf4585a7472249760e7 100644 GIT binary patch delta 431 zcmZo@U}|V!+Th1n|Mc1C4=(@u6@CH92@1ay85#uVF)|7;oZac6`0uaa92mRdzhHwr zV**J0aKr!4irtKdKe(S=;&JwpM@VXMiGsg3gBZifI}B2v6_+8T+#Ef9tQ3O$L;YM7 z3>n0nPJUKAf+D*)oT*r1qCgkZ;rW}-NbO@`?4R5%uK*<1$m=uhW!zlI6e+Q}f$0?c zCWjB~^@a=&7+F1zK0RCIaW>84>R{&tq|uNAgT&wU51bx2Kk$Cwm1!sVz`^d%1NX!0 zJwUeBoqz<|>3t_3FxoXfU|Mg>00as@PbvyD2r@V@eqcYm)1&s8{5yG@*8B@9CxM~M y$e^(P@F929V|*KrHxC5l7}?e@~H3*ByZlTFeL8%R>O;Gv2K4=rA# zBHKSRpqH{B6%X#IEWHS#tQuj_!*=LG+39pB6xu>*B^437iUeAy4L0%j-pf21^w5wD z@B5wK`+R@%o5|QVwQc(CJXoLJdf3W!&apNg&$D)l*xEIK1o2yiROhL7HCWqS%}&DG z+~2Uf{;Ng*jiTQzr`WQ;2C3<;*LfDR_$7-Eg@y-5BQI}%?S(yQVmyUQ;KxlPQqR}w ztWqYU#Jx+#tUeN<&qaz*P8y!emdr_3tsI%pv3+E8#_eO7&&7&BUBVhy;X{LN_>F60 z>jQA^^Q9!iN8fFZrS+KccmY?7>6r01ch=dU{z}Yv zbil>%skEccj~NZ2@SgNj zjO;X$7Mv7vuu?{Xk$_Kxj4=5jUKyFo!lQEpF3P=}NszfMVE!b1$%IXz6!Nx^3dtw4 zCF>cph*!geCqmO10-?j=a(F@r6XHR_F6s9YUKdIwObDqGytfc(3XjebcvEiWNQ%f< zfP5c)3rE*uo)%?_xg?}w@~$sP5FhosnDC8|G)G`fp5O_Cm@ph9T$g??;GR$_;7=|s zLnU~}kx9z@@@bwxRIEarIe^UV0W&TA9&=nM#XKaWLh`1ovYt2n0S3GyBrOs+&R3Qp z62h2}2ogS)J9-J938fNNgj5OMDP;a2JZchHms@$$Lx>y+khi4YL;fn1KwA8ndnmMG zV%KgeVQXX>T48)ey3r2F45UNGW4GXq`@2nV+=$^n;;-Zosl>OrQzI*#=mfnIzA~P6 zb;z20ghPyFu?_w=+6DE%n(JA*jv+dnFs)wgjH. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/call_cc_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/call_cc_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48af clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48b9 memcpy +01:48c2 memset +01:48d2 print_inline_string +01:4898 print_load_font +01:48a4 print_newline +01:48cb print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 -00:0157 _wait_ly_5 +00:0150 main +00:0151 main@wait_ly_5 +00:0157 main@wait_ly_6 00:0184 test_finish -00:0198 _wait_ly_6 -00:019e _wait_ly_7 -00:01b4 _print_results_halt_1 -00:01b7 _test_ok_cb_0 -00:01bf _print_sl_data55 -00:01c7 _print_sl_out55 -00:01ca wram_test -00:01cd fail_round1 -00:01e1 _wait_ly_8 -00:01e7 _wait_ly_9 -00:01fd _print_results_halt_2 -00:0200 _test_failure_cb_0 -00:0208 _print_sl_data56 -00:0216 _print_sl_out56 -00:0219 fail_round2 -00:022d _wait_ly_10 -00:0233 _wait_ly_11 -00:0249 _print_results_halt_3 -00:024c _test_failure_cb_1 -00:0254 _print_sl_data57 -00:0262 _print_sl_out57 +00:018b test_finish@quit_inline_1 +00:019c wram_test +00:019f fail_round1 +00:01a6 fail_round1@quit_inline_2 +00:01bd fail_round2 +00:01c4 fail_round2@quit_inline_3 00:1f80 hiram_test -00:1f87 _wait_ly_12 -00:1f8d _wait_ly_13 +00:1f87 hiram_test@wait_ly_7 +00:1f8d hiram_test@wait_ly_8 00:1fa1 test_round2 -00:1fa8 _wait_ly_14 -00:1fae _wait_ly_15 +00:1fa8 test_round2@wait_ly_9 +00:1fae test_round2@wait_ly_10 00:1fca finish_round1 00:1ada finish_round2 + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000034 _sizeof_main +00000018 _sizeof_test_finish +00000003 _sizeof_wram_test +0000001e _sizeof_fail_round1 +0000191d _sizeof_fail_round2 +000004a6 _sizeof_finish_round2 +00000021 _sizeof_hiram_test +00000029 _sizeof_test_round2 diff --git a/cinema/gb/mooneye-gb/acceptance/call_cc_timing2/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/call_cc_timing2/baseline_0000.png index 6793b1881ebe507bdc629071217e79444ca09627..1782b41bde7e6618a7f999a4cc64e7a9fdc9b7a1 100644 GIT binary patch delta 1116 zcmV-i1f%=@3GE4xB!9F?L_t(|ob8>_lB^&MMDf=A|1WzV+;S`=5lJ${w$ID%s2j7k z1Of~!>$(<#%fHzUkXR@%I20Hh3JeYf28RNJLxI8hlv0*u*+09a#mllVy-vbs`?2d$ zX)~sM^UB>+b+-974BS_;|8kafU8Sda7W?=fY!^%N^r%<_A%FGz?hY%ilAUh}zAQ<{ zgWHwOvrU?++`aGl?)x7~_Q_}et@*6==T(({owF*J7we~*uCgdse2yO~jiu;4P+as1 zvQkBVx9uaA2{sE0*3;FLxI7ez~E3|a40Z16d0Vrj*fB| zP%?TT*|FQN`hUs2Oq~bHjK)J57ubd7(2#QcE)nw=&cm1IYw|D{qPPD?8cpgPVv+_n zlmU+cKR2Ya!Dz*&D9S z){xOo^P|PdXa-x+`|mxI=!Q*2H=#558BItD?tf}?C$B%nPYbY(tg3e+c_57=Z-{nj zAKjXd-DBr$D)|J{Cq)}F0BndR8_0RE*LZMGe74vR1vw8cehtJQ$q8 zJlLgiB!y7N{MBpPtmI7o5Iwn(B|VgE5345+&WUvi2kERazx++!={RGg0)s<= z!J)w5P+)KpMNLc65Nc3O;wcRN>FXSL#wcFl5Ro&SiJ^ zbS7MRjz>{_d>8CDkH5AkU(~_3D&XPqQJ1f}NS5z91IA0=>-WGsldS|Vf1JtdMVHpB z8poxI9H;Dr`WeT}^`gtwGYU1H$Inp4_YdBXW=-3?`ZMAsNs$*#9kwssC>t~PO;Y&H zmsXzQr-h`AtaV+D%Wbbe**D4VXEc-7i!M_eS$X`7BdJ@&i=-i%c!8V;d#yWNS$kH9 zM$Uta-&c}emj~9GmfN6dx%`4)Nn3ydSFTf~c`A)0tW ilc5Ahlez>H7V{rbo|X7?F&10^0000_cB~)_MX_uC|ChZF-ddKBh>#57c=k)%8I37t zhzT&b?faexEtR>ZWl%CvTM8l=OO^p9j*r-IkN7 zpMH#n=qhnO%ep5|XR=qMC$K0XtJ{=Eh;|B_YlUc+dvN=ID=owL&hm_QKcyrq{xXuF zpF3g&>tKIydP20mp2pDB_>IkK9nZQ8Iy>*dCX0~uWNkcgwOTCg?WZf9S@ijP_4M)N z<*A)MA0qhajY|)1Z#AoOtB+Ou904}Tx{OW)52Sv?4bdj~k!~c8pMIe+M0P!MvSF9Mnp}Ur+wDo!`1$VBBrBkVIxYgosV`0D zgOkvMmzXD>ykuu};*VJ(*TJ_*R->OwCs`5m0%8d3U~oF?V3XuX3ZaJetJShu$(i^e zdUBE_HA=L`YN>-`(kZZ>F^<=l->EwdSB#{1AIgK#k*rh`yQ9ABwlKo@RpO6iG06gF z^12deZ}fa^@K&M^wFV)I62u9HXp^x77=QkTDy6Lm+9!Nk=67!wG3~!wUQ|s<*KJvT z`_3`Do3UtV`cwM-c6O+Ga5*M?%B+kYw@l40H+^f){}8K`Z06A=ycac zuEyi|=}Q0egOzp8ChHdsB}ww8sonOa3q@n*bCVRlv&3~3KSv0fWR0(6t}f&@C;p1- z$@@j8sYzBGKm7>m7O^5|h$dDb*TMQehTYcI3em`QaI*V8((CGAojCQS^nK;?-9h^) zwz_|5?sJnAtO^g^lQ@3*5j4q)Utb=?_j7bh|H1lF|Nidyz5seY7{^aPg1SYl2pXb^ z6+Hr1_rd6a3lHh!>6+x4% z`1R#Md_N~YH|d*oaCwP1e)=Am=A36vO$z{FsUpLZ%1`0h?#Qyn!CTNr@s@}*0V8S9m?WZ>wtp6c+sKHJxRze`gwxAk5*r>wV>C=h z=rA3lqjZ9f(V|?20 z!KvIuNE&UBDr)dHs`~mSJ_|dON!w{hRhSg=XC+GVF~&uovIE)A=yaf%I4#3*Q0+W0dr{ z&vF<+SB()HRM^Oz`>-*@3yK(>bgCtw6z+8vgTk4HlEefXEKpO}a6Y&@mst+4+-fH9 zS_z&jY;3m#>VK7QnxM}DpDAo~H*hDHt$f!^P-i6=QrN`a3DlfDKQO_13w)ul@x8$; zm#rK$6Es-~UMVcPUjo=ae5`&GY_`Cc3XALqaxUIY9Oj|b!r_*}sg{|ehQA|+1D2LC zc=HUttUmIf8`Z?9AVvof(WEZQa5-{sM6M1^;mU&r zM-Ql{4xK(yQF75G_Zip7V~7w$Kg1J=0SIS_EP3I*EdzCj_PHB6~-fEV5NMu{OVBG zr!zYLdmtQ(Pm+yfmC;Vt;_amG{bH%hQSAKL1}fw#cK#|Vm|Ao>H|LGFB%#lEY%Q1n E04FrvN&o-= delta 1497 zcmZvcL1+|L7{}k6HOXdolk7THhX~EvRb-_gNefLBGRY>{?5;a?A-gmO4=NsdPgQt9LF{x~hE^d!)b(vrPwAP9#ud2w;ZpsSJ(}&~TV4;e_OUkr)n4H# zV9@$3Omc>PTH>=t7$fdvc8umxDmg+cV&McMKD8@;%wEo>07}0QewvYe+JH$fq3o!X zfuJSn_b8)Ge27~H<~(}JG@<*c~2wyPi8Y+o=j#47|lWB^6#!TW?A>lo0 zWrEPiNjwfuh(JOjOgJd~cEV9qGGPRzOmI&F(m+p{B=mE!l_M2E#zW+n;G6L1+RUri zCYd)-N+zHBt^n~zeI62iK&ea-x+E5OLI))Dh6zuE-wt?*N(TJNrK!mT_X03UnIB)t z6B@%R!kK%3*%LA|!f!JNQAy?)N{Qq{&xn3L^j8pY4y95g^a8I;4HLQ`AsHroCw81G%F zk2$dx$?nNSw0BOy9rQjj+(9i4Z^XtxC#fX59ldX%6&q0=cRe1=I4aE<{1J9CmV+_) zYjlv-LTkEhsVao1^rB(5dnaVC8TL-@?!6uQQ?m6zXytdeJ_`M!Y<(75#?DqJSo~P& G|KvXuVeO~@ diff --git a/cinema/gb/mooneye-gb/acceptance/call_cc_timing2/test.sym b/cinema/gb/mooneye-gb/acceptance/call_cc_timing2/test.sym index bef813fa7..1df29700d 100644 --- a/cinema/gb/mooneye-gb/acceptance/call_cc_timing2/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/call_cc_timing2/test.sym @@ -1,204 +1,138 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/call_cc_timing2.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/call_cc_timing2.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 -00:0157 _wait_ly_5 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0151 main@wait_ly_5 +00:0157 main@wait_ly_6 00:0177 test_finish -00:01cf hiram_test -00:01d2 _wait_ly_6 -00:01d8 _wait_ly_7 -00:01ec finish_round1 -00:01ed _wait_ly_8 -00:01f3 _wait_ly_9 -00:0208 finish_round2 -00:0209 _wait_ly_10 -00:020f _wait_ly_11 -00:0225 finish_round3 +00:01d2 hiram_test +00:01d5 hiram_test@wait_ly_7 +00:01db hiram_test@wait_ly_8 +00:01ef finish_round1 +00:01f0 finish_round1@wait_ly_9 +00:01f6 finish_round1@wait_ly_10 +00:020b finish_round2 +00:020c finish_round2@wait_ly_11 +00:0212 finish_round2@wait_ly_12 +00:0228 finish_round3 + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000027 _sizeof_main +0000005b _sizeof_test_finish +0000001d _sizeof_hiram_test +0000001c _sizeof_finish_round1 +0000001d _sizeof_finish_round2 diff --git a/cinema/gb/mooneye-gb/acceptance/call_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/call_timing/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/acceptance/call_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/call_timing/test.gb index da3eec14929927f82a10015b0652c55b33313042..d98a4139e123921a403a43ea9ccd8b16b0ba85e0 100644 GIT binary patch delta 431 zcmZo@U}|V!+Th1n|1|US2bX{S3crBl1chIU3=M+w7#Rf^&hGS3{P$OI4vgLKU$8-* zF##lgxZ(e2#csyKAKcF_@i=?QBP6xBM8V&iL5$(#Sq7=kipvmEZjPQlRtiD>p?)q3 zh74j(CqFA5L6O}Y&QvThQJ{&gz;udz zlfwu0dP9Z>jI16L(=~4Sk{++x{YyJh5lfckr yWKdXt_>f1%#uHLX!rT(y!-1?SC2olyT+GW)C`tT0c=oi%(UUNLdx1RP$_4fKi6YW&MFI-eP?LV|z0AYV9t_Fw z{{Q*j@Bhs=ld)}T+w|%@Sf9N8u$AjvU~N2p%GxPnYc~NB#BUW+ou}H3U~P9bI|;|R zzhQU%-9`V+qTem2*s{L{sp+oQc^0#HnZ<`f!-J!dm$&bE;k7g|p2GLw$4w(r&)4d# zQYNFs^~spkMsr^PovR-$?(_Ht+4gswau}#9y1;<;A$})GydkzIvdnqi5ZXf zyEsE2Y<1&FAw@c{Lc|IubZ+z65qazGYICMJ+blN^PHD~QsehVv1z{f&HnEVj0jLc=>(K!NN$i19Nkhv{jekXm&giWCo@>d}hl22w! z)-z@iuZ9Uvgr+kDLI=g=@PrU1#Dj!g((fg_DwIl?5K<+0M-gcXkIoV}EVptbMPw{M zzK6brqw6uxiZaDq5>hdF*PlxeAN2`L_)18cBd{h<@Pt837!DGClzuPZccE0keJ(9S zC3vThNy_~4X`Vn-tU{bQfXwXyGcEldb6hCJJRqb(@}{e@o;Q6O1Ktsm773iFjZ8x;jIT&H+98>NbjWz@7QAtPuj!2&G5kk7NDh%oe49HpveJo8(Cgvr<7roi ztjR|>#8?*F;D4iCP!FuRo~7#;qQkqU)vKLRwN_9&+h6-x;OA87mB7mPm;Mm=MOFH9 YVBt$vG$lH4yNx^W2Y(y>#t%o}UojH@u>b%7 diff --git a/cinema/gb/mooneye-gb/acceptance/call_timing/test.sym b/cinema/gb/mooneye-gb/acceptance/call_timing/test.sym index d8d67a7cb..75728a3d8 100644 --- a/cinema/gb/mooneye-gb/acceptance/call_timing/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/call_timing/test.sym @@ -1,223 +1,66 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/call_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/call_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48af clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48b9 memcpy +01:48c2 memset +01:48d2 print_inline_string +01:4898 print_load_font +01:48a4 print_newline +01:48cb print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 -00:0157 _wait_ly_5 +00:0150 main +00:0151 main@wait_ly_5 +00:0157 main@wait_ly_6 00:0184 test_finish -00:0198 _wait_ly_6 -00:019e _wait_ly_7 -00:01b4 _print_results_halt_1 -00:01b7 _test_ok_cb_0 -00:01bf _print_sl_data55 -00:01c7 _print_sl_out55 -00:01ca wram_test -00:01cd fail_round1 -00:01e1 _wait_ly_8 -00:01e7 _wait_ly_9 -00:01fd _print_results_halt_2 -00:0200 _test_failure_cb_0 -00:0208 _print_sl_data56 -00:0216 _print_sl_out56 -00:0219 fail_round2 -00:022d _wait_ly_10 -00:0233 _wait_ly_11 -00:0249 _print_results_halt_3 -00:024c _test_failure_cb_1 -00:0254 _print_sl_data57 -00:0262 _print_sl_out57 +00:018b test_finish@quit_inline_1 +00:019c wram_test +00:019f fail_round1 +00:01a6 fail_round1@quit_inline_2 +00:01bd fail_round2 +00:01c4 fail_round2@quit_inline_3 00:1f80 hiram_test -00:1f87 _wait_ly_12 -00:1f8d _wait_ly_13 +00:1f87 hiram_test@wait_ly_7 +00:1f8d hiram_test@wait_ly_8 00:1fa1 test_round2 -00:1fa8 _wait_ly_14 -00:1fae _wait_ly_15 +00:1fa8 test_round2@wait_ly_9 +00:1fae test_round2@wait_ly_10 00:1fca finish_round1 00:1ada finish_round2 + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000034 _sizeof_main +00000018 _sizeof_test_finish +00000003 _sizeof_wram_test +0000001e _sizeof_fail_round1 +0000191d _sizeof_fail_round2 +000004a6 _sizeof_finish_round2 +00000021 _sizeof_hiram_test +00000029 _sizeof_test_round2 diff --git a/cinema/gb/mooneye-gb/acceptance/call_timing2/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/call_timing2/baseline_0000.png index dc8b90726eb5b0f17ffbdfcfea9b3a1d3dad99bb..df4d87220eaff5253501d17c79ed393eecdede5b 100644 GIT binary patch delta 1090 zcmV-I1ikzF3FrxsB!90-L_t(|ob8?6lB^&Mgz=Q`|H_^Vw;T&eL`WpG{oU-2Ix*7n z6JTK3wk;7{{*88k_(Flfp}^o!U~nifI20Hh3JlJgQd*Yf_-qmuFU!L4Itc6j=g=e5 zrcL|em4~V9Z1HVqxUXdY<1E{@NvU}i`}`j47fbTgsF(yH^?&;w4lAybgI^B5%}M8j z`<2DBMT)9Cz3=tz#}_60WIg^XrnR14S?<@ls&ad=eyZpyvvS6I{*Y-bmEH~6MXw+; zRg_wz&Hk6^eczd5g0tRVQi3^V7MTCQVNVt~6c`)|3=RbbhXR8`fx)4`;52r0q|<;> zrw5Xqe*0NJxqpc%4?kUL7uba2(2#QcDdzJRoc#2ov54NEM;cA49Ac6NHk1L620wSC zvyYri@*s4lpMLZf(M96C%eTXwuX!?xmK=O!UnLXQP?Kwi7k$|SX5*M~{FHF1gX^DG zpXqTuZcF{_1F4Y}eI2fFkBHC~swQj1vVt=!mnBeWFAB}ae6c;{1nI4;- zOxdilAK6b=S|0m02iK>jU(TrcZUjHQamm5;sWx`<`Ye9-0Ncn?;@3|Rw}>`rA3d6n zU1R5JD)tMTBP^0~*pE68zhvP<;h^G?ya9y!>c|H#Z_gw?!} z6;MJQ7k`1{#Ftj%!Npt~c98$f;3+$^6TikPiGyR(yM%*uwlltbC+;+yF_PlFlsmmWS*av;Lwwn6 zp@;sv#P7*sBMY3t^P;`c+iRUwiQd&3geXc7CjwYRlaT}%fAbSqS&e2C(fpZ_`@ZN$ zBYF*evr31s?Qs1!J7x2AyeemF6pt(4UF7|aj{j>W#Yxwn?I&S;{+s-AaIrirs-hfM z3f1B}v<4QW7MYZu=uwOj>*{pn12S2KSo5x2@ ze(EAwe(DSu1|NN|zXRiwummuF2Co;LO0#MVmnt%xvg7KfA0yX`PIqbKYCMjguC(tT zyd%w;?(^!;h?OKsUNp7YzI3B#jNCU#;hi6?%;IMcK^s}ywskJIy}hz;QooZV@Yj7SY5CA3@zBRs=1gi4`pZ zXH`yT4RmejTJ<5@R*imsx-xj*q*>z2S^T^*c;6&%BQM+{vbt&bzDW`s54Iv`BP)J< zxf9>d!TTn?83$i)5ywvoKZ3eNtO!~}6DyOO1WJ>j1QHhh12k%z^JDPx0RR9107*qo IM6N<$f=YrVHUIzs delta 1091 zcmV-J1ibs`3Hu3aE`+g5)l%KMeUcF_JWaW zB7rn+-|sgOTz+O7KzyOV;80+2C@?q_7#s==4h071lTzBY?f9IB#rbw=*C~v?b;{}B zW3N<*WT$S@;(Yc$c_ro*RIRN1nCkJTjnXMnA<}h~QxuaHXJ9+E7^wx{s=n$m%88{~ z?e?^kzcPO$_L|< ze<<5W)hp(eD0Q+su&-Eb!RwMgTIpgIklhfTr zdD!VnzrZFOL(0pR`xX&y6k<^BHWCgskK?r{-9zvHZw(y3%vo zmo2!xHvL*gcmB3?nge!R)skPcv7 zG}%FpgRSO+Tm17#`K}sC;4+Gr|i6)_+ysHaqwj)tI^I^cd{b(3y2|%gTd*HgH1X|k_$DAUrqee zt6lWuPL@^P;`c`)h-b5`CyO2vL+EPS8b@p#m9yH&iJtMbJLs(=xw%nZ&dopbRlquiKJ- zyXKhP#aOg7{VDx_IXhH6xEvEcWL8FxTc&1TH+^f)uZ!M9NV3$ zSju3P>|BSli!S-zSqMjI!QKr>x`br^BK#zE-K(Q&8n-JvkS1PUqQg!wE}p?1E;>IK zrdryqROD0RyL7qb9PQ#Rdc}UnQZNpafCMjpXYzW{=_=3JYRTx}cKR`Mz36mRN3Mm( zvD20Q_XjI^&L;VbhLR+C(bVqpr3*!4=6jPAo=I_ii=86`?PQH-GFKD1&556JJ$b$8 zG_{iz$4)Y|Ai$Z@c~j$wCc?{d+|ad5KxJ<@VF|9LL|Rl%n=$Ta85_XO^%HDOv~$$zj~}U;Cs13lut3x*76`;0vT2umVpTJ6!I>5lqX`P)K0%Q>$JP3ILzo3tSv<9A?;^E(1kIUb2a#uOG*)A^O-?jj?GHPzhoMa|W3$t@ou2@)lv zWQ2^9F)~ReNSwsPAu=vR&D1i8F(y_(Ofs=1&XWly)tJdaWV?|B9z7;1S$ zhh#cB?=3ZkSwVqEWp1S$l+3*D5>R~RKq+j2O*W{?bR-|#pUW(VRlaE@@Y@Mq%5;3c z1j>JvZ(Cr%24Bc@Y(H=>m#uu?O3+{@7?$be!3mU{cYb7njW+m7rV|H)SuR^SY$a&1 z6TFdW{ICS@{_wE|EU?uEU&}Oh7|1xS2fM6ItB1|4fL*P$W=*>@mkXAbG5GTgfviEX z9SwPo#;n6OwB#9Da}7E)5SI)lSB+Y1RAZwP3usCgBxr}+M$FZbY5v^Ng5yV&(?w^F zRhM7%Nd3lj{1hSrF#z!lVi3YzE{T4)?l~po{*xen5+IlaMJJKO-=tX^z^v-?B`5`* zpZcs54w}}Hs6%k@+xpsxbn#WkV&UQ?k1m{4ov2abXrUIvgKJgmRo8~QznsOV delta 1482 zcmY+EPiPcZ9LL|AHOXdolk7UF9io`GTagt(5``KInPih}cGn$U$S&sKLB)dyrI#W~ zw4IUmQoLAtXf7?GmqMXzO9~+#!e~%341=^_JXQA4dRRpQ@$b;=_QY=gP{WLZGeVZFot#6qR_dCo_6N@sU-}2rU(pHdqMCp0rZ4_3mU~@QX z|M&R8>)}>VPe<)*>28}w3H0f=nh6^mcO9xYR!^bo#p;>9-0Z>Xr5-esSiRBLn|)Zd zRu7yi4zt$w33RJ5tsfj^TZDK&2KV@*?~_V@)LRbz;$ktWY>X~$jcs$f$Ac z?JQJtnYi|jJ1eY1{UolvI_~hz5LRD>y^t1NAXtqD?pJHu1Kky;-k4}iHp-2Yda5z5 z|KBLACX3#IqIaU`1?4oG_pD+X*6o;c?iZ6KIwQRud!qY$4t{hbL$s|FvFYuimoT*0 zOukU6*77q|;xU7NNBG^3+DqBvw2nRTT(z2?sg)|HWmC2^x0L-D8tLEIlBngYH8!0q z8Tl#VG*kAM&E59RrfT!)Ofepr_f>n=-)*0p^Y$1w;2MBS^;7m}wvR7)HrVQC&jG4E z#a+Ol^;wwY9R0M!XN@pM+{x@1&7)LugjU3Z&lvHkUGZb~ayA7}dP(?cM*6iulU_yH zQ7HpKOVV#pMw$2!w+zgA^pt5re->*wlK`_jWZo6NVA3^I68QwBMDmkqihjmS;#MKy zJ!)lw(8x*L4o`?cLLyAqEBtoCAyhJ91f@)H&jQjwPnjh2j9AK%3LxVl@^kP_IJ!3T zCbmiDZIqJ9r~XNR_)%Ykgx^pqQ-m&w2Rxwz5_-dgN5XFh{DVpcyx`K*WP*Dcn54|N zujC1hVHM%bUBK)KnHk}?nM0@~a}1?K@}Xx$KOg!F2)KY!DH3{_SEhyuU67Cr6TTKJ z+6mvGk_ihaWrBMHn17X*>|Dr;q$$xX3s3jAocG5{JMaJny z7yNNKu@=eh%0#rcPQe}W4jb-}7Kb. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/call_timing2.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/call_timing2.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 -00:0157 _wait_ly_5 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0151 main@wait_ly_5 +00:0157 main@wait_ly_6 00:0177 test_finish -00:01cf hiram_test -00:01d2 _wait_ly_6 -00:01d8 _wait_ly_7 -00:01ec finish_round1 -00:01ed _wait_ly_8 -00:01f3 _wait_ly_9 -00:0208 finish_round2 -00:0209 _wait_ly_10 -00:020f _wait_ly_11 -00:0225 finish_round3 +00:01d2 hiram_test +00:01d5 hiram_test@wait_ly_7 +00:01db hiram_test@wait_ly_8 +00:01ef finish_round1 +00:01f0 finish_round1@wait_ly_9 +00:01f6 finish_round1@wait_ly_10 +00:020b finish_round2 +00:020c finish_round2@wait_ly_11 +00:0212 finish_round2@wait_ly_12 +00:0228 finish_round3 + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000027 _sizeof_main +0000005b _sizeof_test_finish +0000001d _sizeof_hiram_test +0000001c _sizeof_finish_round1 +0000001d _sizeof_finish_round2 diff --git a/cinema/gb/mooneye-gb/acceptance/di_timing-GS/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/di_timing-GS/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/acceptance/di_timing-GS/test.gb b/cinema/gb/mooneye-gb/acceptance/di_timing-GS/test.gb index 2021714d424f4717bc1cf72f7864b849ee1069de..fa42bb359ba9456332d7056a94f3c8213beeb6c2 100644 GIT binary patch delta 424 zcmZo@U}|V!+Th11_hiy%JH`k96>}Lsxcuu^_yr^prPp=ma|o89dWS=e38!9yuM^w3rW zu}E4w3-%&CsPte?C3q18S+zpYLl_z;nGS;>Xit?rh(Z(%RHz->jlcJMJC82Oq07!N z-|zh1=lgrVo!MrSH=F#c1vv2bm3uSL-nP!eR=)G02=V-}2wUyp|1Plg@Y*>rpUH9S z`mT4u`smsUj5)z`rQo$vuwAjla_~D?v)g{>aoW=7BH14s>Kh+CuZ5poZ&QVVXTMi9(F&uSIE(PQEMLZ_(Fv663EHf;Z{5IJc6MrDo z{DpRb4@zqhJ2?r5%d*#)5X{eIjzfVY&oZd08%G5T!L5dI_q$9Ap>Rg|mSAJ%qyz7g z?5kFgV2;2Ql7m8hm|sEWGI@NS!Dni%WHMy#jhNpnUol~Wlt$hmsgZIro2p(2hxv6( zctD!ZF^HX@?Z|`}CM2VT{mSnqyg*7POq0|J{+o!j$>TW&Z>Xgb$q|`|kZ+;y;OM%{ zOH`(rS4nE7?E1O_$x)xigfB_*JcCtrLnicL!cdg(gYvrpcS-4hKc#d`o#3BECacKp z^8$l7UBx7G4>I>f%(U{m%qdcud7Pw1%BE|oUN-#>2Am?vOAOA+E61dS0ZbT)5=z=7 zZOGSXKQtn1zH1o. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/di_timing-GS.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/di_timing-GS.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48af clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48b9 memcpy +01:48c2 memset +01:48d2 print_inline_string +01:4898 print_load_font +01:48a4 print_newline +01:48cb print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0158 _wait_ly_4 -00:015e _wait_ly_5 +00:0150 main +00:0158 main@wait_ly_5 +00:015e main@wait_ly_6 00:016d test_round1 00:0177 _delay_long_time_0 00:0186 finish_round1 -00:0189 _wait_ly_6 -00:018f _wait_ly_7 +00:0189 finish_round1@wait_ly_7 +00:018f finish_round1@wait_ly_8 00:019e test_round2 00:01a8 _delay_long_time_1 00:01b4 test_finish -00:01c8 _wait_ly_8 -00:01ce _wait_ly_9 -00:01e4 _print_results_halt_1 -00:01e7 _test_ok_cb_0 -00:01ef _print_sl_data55 -00:01f7 _print_sl_out55 -00:01fa fail_halt -00:020e _wait_ly_10 -00:0214 _wait_ly_11 -00:022a _print_results_halt_2 -00:022d _test_failure_cb_0 -00:0235 _print_sl_data56 -00:0240 _print_sl_out56 -00:0243 fail_round1 -00:0257 _wait_ly_12 -00:025d _wait_ly_13 -00:0273 _print_results_halt_3 -00:0276 _test_failure_cb_1 -00:027e _print_sl_data57 -00:028c _print_sl_out57 -00:028f fail_round2 -00:02a3 _wait_ly_14 -00:02a9 _wait_ly_15 -00:02bf _print_results_halt_4 -00:02c2 _test_failure_cb_2 -00:02ca _print_sl_data58 -00:02d8 _print_sl_out58 +00:01bb test_finish@quit_inline_1 +00:01cc fail_halt +00:01d3 fail_halt@quit_inline_2 +00:01e7 fail_round1 +00:01ee fail_round1@quit_inline_3 +00:0205 fail_round2 +00:020c fail_round2@quit_inline_4 + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +0000001d _sizeof_main +0000000a _sizeof_test_round1 +0000000f _sizeof__delay_long_time_0 +00000018 _sizeof_finish_round1 +0000000a _sizeof_test_round2 +0000000c _sizeof__delay_long_time_1 +00000018 _sizeof_test_finish +0000001b _sizeof_fail_halt +0000001e _sizeof_fail_round1 diff --git a/cinema/gb/mooneye-gb/acceptance/div_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/div_timing/baseline_0000.png index 67f91d46142956cb2da784f7759ee9088a9d3c54..a5f8b0adc988507313c70070ae3ccc7aea7b8b46 100644 GIT binary patch delta 1020 zcmV-B!6p3L_t(|ob8?6mZKmL260c`|CQYfcNq^ti~Nkum#Ujd)F4`d zG%&jD`yN1-KW}FM=7L~x5G)RY#X+z*2o?vy;(S5~+qT8;L&D;1+X%0n@HzfOABmeb z_t`CDQpwuv)zGltQu<%cw(ooCY+hxbuY+UblAaoip&-)UZ-30NkyVKNl;GQvbY6ID znO&PDYvt*FuX~R_ETs>h_$hm??emqCew(Y6+l}p2*{o8O6F%oJiQ`i3-B4WY8)Ra| zxNEef|IPGX@01wleC{{NL5W!f%AYv&WQl`daS$vHg2h3wI0zO8!QwP_bcEA@QfCf~ zbUM4ql78}0Nq=1j$~qIDO1t18WQT_0s{Zt6%wM<;UtYKILu0n=1FJk*tHL{#ucQ6X#U~&A$!NJXV@a zZ0z=0eLl1EpGS4bPsMM}UDBs+JAKifW=kGg;snu-U3y}Vo z-+%+-!SWCXlRyM3f8*tO(V;LEa?~TEo#%5NUY-}7O=@c5e)2h$H{Y9dyNgjuLf?Cn z9_`2*PT!mKJO8w@NOA-wzEq}xQW+s_oi-w_mZKmL1$9pT|CeVUvSU0-w+M7>uT?KQ<0!UN zAT+Sa{QLVmfi6E+2LQ1kSR4e4gJ5wGEDnOjL9jTlX`1GFUVdMv#p~nNpEhaqsY^B| zFMqWPvEuYYdN{B5KkG_dS5UFC*5?$@-yF0qu?n&7>s;c5^kZ=5O^dNw@Tux6p5t7& zw^bicP5Dpe(}If?Y^7U6^2>pnr9f}=NDI#STHbS)ID5EqkX6$fn!CPDlj><+p>amj64t;e zz$tj};t#UH7@*By+4JXoB(dGM5GJ@{}jxU>9Fl7HsGQ>OLc$#~vdtTKgk(Vh9_ za%4y(Z>+!e6#kCcpAxv7kkzC-k2+*M*y6b@xRP7sk#{G19&FvBzT}0TtwmNL`3G6F z8*#{k#c9lghYT*PE_7i2Icwe+tFWKrVI$w{YQLz71^{;4aBsFj+hJW|U zLDnW;-!{y3WOm#;lQorO*IT)^1&_^xbHX6&7$;v}rpeMa;*0l1N8^vz>f4lU@WCe|)AY&u*RBAFo;8^;apD6Pzi=;(eX<>F+E|rR88Q+S&$e{d~AO zR6Kb%SjU|f z9NmDdTUhZwgr8~EeD{rbshY~;4qw>$u)jq^oMIfj2RC%l7wdD1rJdS}ylH%gUG7FC zUGx*j9gl)MlVAiZf1E6z7ricO;9l2(`*lL&j3dkEMHh<-Ej&-0prDW>+ z-lS7E%0|-fP5RCj*So~oL()N3|4!!OM(*L{-*KJg^P;CK23dLHj3a4SFp8vIG>k$# z4+iBt7^Z8#H|ekt?Di8P_zC&tT}V2}%Aa4}h2D?!@60d#5dXjXh0g_$hw2k2X%`Kn jK$9*6V3U6X2p0JVT|#u>yQ8Ks00000NkvXXu0mjfm7o#l diff --git a/cinema/gb/mooneye-gb/acceptance/div_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/div_timing/test.gb index 76c0f925b7da0016acc3df0cca5d02bc5dc1157d..8226f4393f7a02992e2a14a23e8c5b1c6b7aa2ee 100644 GIT binary patch delta 1059 zcmZo@U}|V!+Th2?G^2lV0OJ$8j{i@u9{p;_@L>Iejt5;2Iv?~r=zh@mp!dOq2mN*o z4|)_k{-3@EWORcV_v{!S^nn=9J}Z83KfJ+fb0Jfo?Iwp0?Dc{T|IZe9pIzY{l$xGd zT#{N;%mCs8k+v6*{LryoLl-FPSX`W1RFavW2bXs8sM@X}1koFkT3n)#mYA87n!<2$ zefWotc%T*q1%}hk8k!)@3_!w4f#E}=|A(%f8a!uPK^7`1Fo;Ohivn5xAhiR(J`G4rfrV(8q z!scYK0WL5DTKzxt;WnTi$~fBFUBFqt0t;xY;*!_9nez@8jWNY0Ch=r&3oqWJ(*Z6>Gy)6R}DEvJ6jQ<~(1=BJ1V+Kkm z6$Kgu8C)G0Kd>L}_pW^=|4!bfHUEOjNkxVRMh1oThi7>_YFOCxO{H$OHft;Guc| delta 1370 zcmY+DUr19?9LLYO^UvI-ZeF#ELY}RNMG%W1EpR$@ZgV#mZsbD`5_$~$?#Q@`%7)3Fm-+p#bzdUSBiRam*%YAuY54Q#cs zcsf3JThh9xy)CbMH*2*Uua?^avRm02g;h4-R{l_DfmF)}+{&*`!;f+pk^JIz%#X@= z7O_?Dj(KZ&bD(^ml;HZ1l*|PqU+63J7m|gcu&>Y?{#%GGdgIo?xOFma?IitV#>&P0 zu&=y(TlSeoJT;Dn>Q?9e`a>;814#MjLpq*{TOL($jYMOKbS65IMix=&w~Jm&PJKSu ziSsPuj-=DkkxU{rEJDFVc0RZdg7_1Qcrwv+h73j$YIFb@MW24N*rZPuWt~o^@$t}1 zN!CY8P5M~YYE>uT*9JeiL3J}{lOj_ zWm1YDoZ>f55mdr@s^rq&27Lg<7rE~zs9EXI@HHl@Q%N8wUVM*9C*dDtCV@G_JZTW& zr+hDEB4F0p%y-=9OuWpLKz?RYAnC~zd7cmrnQ3U)W?Je)*fGQ&hc-B%!DBbHbHCDX zm?_cF#iVF3&jC_pp45-UzidF->K9T(O`}P6D8^6OHqVfY~`TLDqz;z%mDW*%n(z8 z*~6qj(xFFqo(_E#3eGbr#StE-D@|bywb0H9kc~ESmHQRsI#Ud((f`~}rUetGHvHb45B1{BT5B_AxXLJ46>un9M$8OZM^rPU zxZ#cX(NTj^o;oAkI9qmgNlUd$p@1Rdh)R#JhL8x1L0_YGoUyIJiY3cXBIC=dR>}5> mtY&BX_huj4{(y)+x2@>j=zH6bi|C4Nsk@`b&fFcT?f8Fu. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/div_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/div_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:0232 test_finish + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +000000e2 _sizeof_main diff --git a/cinema/gb/mooneye-gb/acceptance/ei_sequence/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/ei_sequence/baseline_0000.png new file mode 100644 index 0000000000000000000000000000000000000000..f744683e7036d66a211cb28bdde1d3fb71a4f4cc GIT binary patch literal 1175 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QH(r;B4q#hkZu?@pU-z{BS2 zfA9a)m#$Iz>^e7pq$}?`bEm|)L%@f}tmyEz_ti|X|7xrlBelQ++ZQJ94*R2@e*61ft6AYU zkH0@yo$Br1eKe)x%l6sAWkIcH{JGa{Tk`nO_gP2FyG7RCx%;m4_0Q(8nu@3UyN=(o zk6V82eeu?y*qimMXK4BUJo5U-qbE14s>@Bp|1(u?dK6>&>ruV&;``-MJ_T`KL%l8} z&0~7&FY_*?vpJzqK!*?E+LC)OJldNsC9s9f`S@e`?gFrySV$Ejcfk@mFLR7 zHAe{lxm3`+!|#dqx?=5Fmv47vn(JmAG%WvmYOT%MeCH2wU(~H5y^l{^e$A}tQ2DXH zKi4jd3Ez|w_VkB^MShaYpTJ{Xelh1h>^S-^qno4ZX+xv|pP2eP3kyHn9Z@`TJ^QCD zc>EyX>w}ax>pxlCNH36i)8GF-?NgeHe|LG_Ki$Uu%}Zv9q=zrR(yY60JFEGpFI69u zUs%=%FF&-TziiX3A91$K3Z>)KJWWU`G>xLeACC9Gy9+2-^@LiIo)@qre1m9CU-1{PF#nOY1pX{9CZ)d)8S7)Txr4PlEZ<&kqE;#S|YwrIopQhNjbKE+4>-*nd zx68|wW$gEzI8rfhb?2w*i!X)euCb_Gr<@UG(7j-J#tc?O;wRt?q-;VpmFMDD8sCv= T^eWo|DsVhq{an^LB{Ts5$vs7Y literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/acceptance/ei_sequence/test.gb b/cinema/gb/mooneye-gb/acceptance/ei_sequence/test.gb new file mode 100644 index 0000000000000000000000000000000000000000..cf91511cc27ad76b50a9eb8a22e174d17905c1a8 GIT binary patch literal 32768 zcmeI4PfQe77{K4ITO0v(C`tx8(b>(0t`rR-NjGFWnH@%47~&Et(NL075Y)54qqFCIA9gr;dP_C|X$#-xeaVBD0g zc4p^$-{1Fp?`^m+`TUEK8>u^<7nAwl&B{{ko^O917`VNjm8=Kokf)9rhAKl$wXwO#uALqmi8$NIM)>eWX3M@Cs!7vtjD#kO~U zx}ZxBH|8Ja^K*ORin;n;|9nms{MS6GuUfOicJ@oVIoi_JsO^nwEqnKMunIH1uyZPZ z|GW7|JDD@*OgU$rGtPPEoO98+;9PR1b&qr2Kb6mXuYcj3gNGj%{JA|m+v*#o3`Bqk z5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la z5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpM1Tko0V1#}0?8!;|HZyU zO_Kiq;{j{BRHQ{=Op;(c#AT@+MiL3UU|f>6Yzc)_wYWGEfry@-nVG|fD=M~aD=GrJ zs%l&+E32z3E72eG!ZU~@$ufAzGLFNyj|+^0y{1N0bzN0!YCr>l26Y|osEfOZ06h{B zqlItu_j)n6rWpp<6eSomxdelX0=gtA3gng~RRui~F-@OOQ8X>-?th`1Ce{G|P$(8l zBrtz6X&8xw*DLIi2|sDpHi59z{Xk&@*(3 z-GYWT@Bu9xwk((rV;BuHw5-|LnVIfxO;c5cOE8FCfdAN-Wx)k^5kJAjvch3u2dl6r z5{5B0W^hR)z+TXiH`Je)n4J~zF!N**?xqR;xU#@s*FjfR*bP3P@VBg3ti64BI2N-k zutOyjoN+YT*VozE(h}tYcGK+b?dWK2ZEnW=sv1}nTwk0YW&r=CcCS~=zr9`51G_Aj zmIeYCfAS>sih}iUE@C|=CqWN#!Tkk&wX}40_VtPWz=FFF;-k?(VAG~TzQTUN`Gv!9 zT0oG$Vc^;E`Jh`^UpIE$x)QX@^0Vg`yg)FYICnS(_ejL+)%E7)#zxS94D8?D-tKPD zLGVoD{JmUs-86+io)|aYhs0%iny`n(xsLOIB0v#0UL#^uSsw%X@9xVL6z}O_0uC9TB zf*tn2QXThzEaRDlUsk9B{;Dd=bzEc_`3qKJ$H4lRa*-s_A4JvHx3$4Hta?E}FPq5Y zn`1iq4;>j9?LRugKKk&*tRqeq4YpPJ3s_|?$M7`uRHLnnK$knDJYq#&VPK+}UfP((Gw?RgGU`o0QG`Ar7ue34a2} zTv*0-L_Bw9C2`mdBzV(JV2T8%;<@uHNsxKVjcXEdAH;L#RuWez+~+2+M1s@t z+{Kk7$h_;u?G|w##&Z`|5?3fZ;wFfR1Ruw9msXM>bKH$<6LBBKbJHt{OAXuQ?uteE z!dCGWeZ|$97q#+o-WfWW%N&}Xcd(W@?0()Mw#&3KYbp*qP<$QX2VMr(w6nrn|B0^v22Tdj9=sYI?k^I zzfSN=*=*=0|9<9UFy-$#$8?$;+iBIy97F%h*^@eML($|dte5#F?RfM_$2<2195U^3 z`oYF0#bNKwwKwYmX}>&C#tctxZED&+@nGvOTO+53?gZ0*HsN8~T>Y5g-CYfCvx)B0vO) V01+SpM1Tko0U|&Ih`@i0z(2P6WPtzx literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/acceptance/ei_sequence/test.sym b/cinema/gb/mooneye-gb/acceptance/ei_sequence/test.sym new file mode 100644 index 000000000..66672e16f --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/ei_sequence/test.sym @@ -0,0 +1,127 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/ei_sequence.gb". + +[labels] +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:01a0 test +00:01b2 fail +00:01b9 fail@quit_inline_1 +00:01d0 test_finish + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000050 _sizeof_main +00000012 _sizeof_test +0000001e _sizeof_fail diff --git a/cinema/gb/mooneye-gb/acceptance/ei_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/ei_timing/baseline_0000.png index e2bd9276589dccc2256aa69325f37cbae882f7ad..10c70d5c62b52536949781e25524d2a9f6c4b7c2 100644 GIT binary patch delta 986 zcmV<0110>R36KepB!5>)L_t(|ob8>_mZKmL1#wUQ|Cil|>=KVctI#CPwd!RO;~=pF zY@6t^u4@8a{`|TEFct)hgJ5wGEDnOjL9jRo7Uz{xT9zfhcL|G^Wg)x{!t4Df``Ec@ zb6;FD7q$Decr-L@w^shcS=M!}?aia??Q!s4xu)le#Z(b#Z+|ye*r+OGJ}vmPC2beJ z*DQWoq-f>tc8^=n|5z&@UinpVU)%d@*ZOUaR!KPpz0ro7{|eY101>%AMAi#_jsqp1m|_WN(oxbEYSYM;YyY`2o?vy;viTY1dD@UaS$v{cL)N>rYU38H+$MR{q^J_Kv6)i0|H(#R>U*Sq?h|u-TQqLko#^CGU)}HBcT<*&( z_3R<&aR*)y2aD6vMf=X9HoCa}fz5YfLUFceejT$fY=0bsYg1hBV#JaCQO9wsb{T(_;%Bv798`d9`Wk8y^0#aFHf?D#*w=&VZ>#o ztoH8D0KQ4fZaqD-xMj<}h+o^pt-@=CG}JR4dglB(W+M(da)1}a!Q#Y?gJ;PHr@*Js zDQp}(OMgB%MLoC54C$idV1JB*`zq%nS5}>I5=9KHClac5j_qbdXg0< zULVI~$0OW@I9Qyn1Gi}i8LHxHsWA6)#} zv&5IzkD;*sPU*dpl}fv5mVI%tp7YvGG2`HXN7Jug>IAC5gT772Z{91JFa;w*Gb&Lzbj=%o%Ds4LU`S#ib^!>kG zcwExxTq-Z3+%LLV6n6V*6l_msa}k4G7lJ-Fi65yNdx5&?={iwQ`iP4r& z0c{}3_I|$;=9d0p>fFluDqiqjw8nVfEp zHlv(VX%{?%eMs4w-|d_P998eL%Q=t6F8cF&tf`yI`JB8`@=(_HwsL;3o()pYdGvPC zMdG}d{gT8f=R8_k@ZNko=U;1DLxisHDdj9OPykgFjd; zuQG^}NA~+Ttja6yQyV9IP#oY%~JaKt<~+B|Et^4ubN9z69XD^9*XkB7Y< z;V$IC;xw+wavnBB>%7Z#BKI7A8F0%Od!m5^T^F6=<(I|s44iMCMDKiX@nt_HzpQ@` zh4ptcN$*HjDpk`{>Y}oo&$XLk=D`8k`>JRcj!S~Bi%$QmvVW}maJq(aIv3jDNpK<$ zmWMo(Q3Mu$oS&h}yGv5e+pTdyYl)9D0p|=c7SHQ^&@cXI;#4liqVvkC`QNHUf9LZU zuQN$}S%#YZ*Wq6my&2zo^)`O&!rE?467Sn5Rk5{v+A8Nd9J}Z<)`U-SyVHVaHz4a2 z&VEnh zzGErKgOhLr9+OZ64S$L9ebIR+*18TP%J)SVLt(d{M#26{wjpA$JA|OWo3!Q<*BJ!8 z$y#|O^H{#zMf>ZPf8p~G@=$%^1nr_>6kq;2;i-)M`r3!)>&k-Dgx^g{Ps`WEyJ+W2 zt<#`nEVA9Scne-3Ul(t|vx%Rti??8ZUSx%QJ!r9D6m-$zAd|xa5tB^>Et60LEEInQ V5+3Lv(!c-!002ovPDHLkV1oAJ1JVEh diff --git a/cinema/gb/mooneye-gb/acceptance/ei_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/ei_timing/test.gb index c1584a879901fc42b4ea73a0c0274071dc03b254..bc46e210ea6e7d7afd4d521d629009e33129d603 100644 GIT binary patch delta 1063 zcmZo@U}|V!+Th3NnN#=Kj^h>o|5yM2uXm6C&BDU+*|6jP)2m0n8Ztas|DfYR*MrUn zJrBAc^gZZ(FyTSJ9pi%@#g6}{uK^joAjZ4TiXYq$Z}8eYkulS5lfwu0dclVOXA8W~ zuJ8^@P0uVYNi8a70P%rH+Y3m3=-95I3zT&%E>0~f$;{7#OFMZ~ZPyTj=nY9NE>TEJ z%*;tmVK})y{6j}PP>X^B!)a#?O^{{=AYrAz@S)NFL)T6Xp0lkW3l$X@L?r4(fh>QJ zS_y6-O928HPJ4qjy1_Iy_SD3~Y{|~*mH6rvOY%T^H-~ltB-T%V` zLIwc+4-Bkoutp!4#y0;C{e(1v^c^nn76wO}BQSEMfUznK=D9(6!oonOK@>QlC~!t7 zsE4U=K~dp~Pytimfug_%S;0wQ>SsLab@b_3EAO*v-e*(16&YrnRCM@%`rikafBg!- zfaC-)31?R=S5RkT=3}iF4EbD?+0FXf)5<*{ycC$TB0~csgTng5GrYf^Ha{ET{qb;w pcg4mNQcA+y65qpttSTjLi630d%TFjt{5*Jeq4&{~!0a4k0s!oNq(1-v delta 1373 zcmY+DQAkr!9LCSNn>x3to7e23kY_7m5rh(?1Ur?Ed*TpjX|>`{L98Ud8Yh!j?K z;{jB`^N6h?RrB`R)==dhDZ}+XDVxhip*T<+ET)PhVSh0a{#%T%_!8EUgmpS$RZ{^n zXXO(C*jL%RE%#U>-g-xKUAya0)6oMbf=K!2M>?KKSYB0ekHzB2Og1)_K^9Tzw~t=S zE`2G~iwi8{iDojfv1~FuDng-TZYgvSg7`g)c(bugmJCOeYHSD@CBJ^F)T&RHWSvf@ z@$t}HS=PtPt@=dHYFDS=*8xAd?AOnRTIiOqU6nTS4WP;=_7pH^VH_rzz^9UQRtF)- z91Qj27?V;I;WWQ-hM+Rm(`C2*D&z+!zRdjqL2XKxhOaYOmreme@!`8nx(NRuGX=~! z=1Ic{FYvvTiGbN?GhcI`Gw~Wz0{MYSfutu>;(0Pg8k+5fcigWPd}K-#e5X=VM1wgAOq8OJFU1gcvz3D~oxp6enL+N? znB7bXWs8FVN+M%?VS zj;m(3;(<3}v#TDZy^Th=WxnF>lU5s6yMu;|qbfbZdP1Tw27Qe>an`nmYnCiSiHxtP qS}i*uvYMS8+@F15`$Ho7#I|Dlqi<|KA)@QHrS6Ry)x`zeaq>TJbg6&< diff --git a/cinema/gb/mooneye-gb/acceptance/ei_timing/test.sym b/cinema/gb/mooneye-gb/acceptance/ei_timing/test.sym index f5d0a7625..379ee6193 100644 --- a/cinema/gb/mooneye-gb/acceptance/ei_timing/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/ei_timing/test.sym @@ -1,192 +1,122 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/ei_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/ei_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:0160 test_finish + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000010 _sizeof_main diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/hblank_ly_scx_timing-GS/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/gpu/hblank_ly_scx_timing-GS/baseline_0000.png deleted file mode 100644 index 30590ffab18e5deb12be845930a52ab18642fc14..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 518 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|Vn(PZ!6KiaBquU+ii&U|?{x z{qsNmo1B;Hnym>_oA=IKKFMK%PG{+y=amayKVL83P|Yc$UNGlCA=7aXVT-=? z!k=yOkD14xIsL}yU*6ou>NjH3zniQ39G*S5wqpCv-MoGwmU%1ReYcCb`1o>KP3^w? ztOf5>mpy*jtQ#kFe`4bIZO>aK*KeA(W&QeB-gmZts{j0uW&QSw+MxBj7WH4RJhN-X q{>0ypYS_V6!tEYqAjbqaH2yLz>&fNk@rld;#jmHUpUXO@geCx}Th!

. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/gpu/hblank_ly_scx_timing-GS.gb". - -[labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 -01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 -00:0157 _wait_ly_5 -00:03a2 _wait_ly_6 -00:03a8 _wait_ly_7 -00:03be _print_results_halt_1 -00:03c1 _test_ok_cb_0 -00:03c9 _print_sl_data55 -00:03d1 _print_sl_out55 -00:03d4 test_fail -00:0404 _wait_ly_8 -00:040a _wait_ly_9 -00:0420 _print_results_halt_2 -00:0423 _test_failure_dump_cb_0 -00:042e _print_sl_data56 -00:0438 _print_sl_out56 -00:044c _print_sl_data57 -00:0458 _print_sl_out57 -00:045b standard_delay -00:0473 setup_and_wait -00:0473 _wait_ly_10 -00:0479 _wait_ly_11 -00:048d fail_halt -00:04a1 _wait_ly_12 -00:04a7 _wait_ly_13 -00:04bd _print_results_halt_3 -00:04c0 _test_failure_cb_0 -00:04c8 _print_sl_data58 -00:04d3 _print_sl_out58 diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/intr_1_2_timing-GS/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/gpu/intr_1_2_timing-GS/baseline_0000.png deleted file mode 100644 index 3b4cc1095ac76045182ea615a70719f7a873b83c..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1199 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QH$r;B4q#hkZu?@n4}Ai!35 z`g?uq`PSu1tTPo=Bqi;4<(Ii~B;RWJ)7XFg_0|Tx`fzrJjS3MmEZxlsg#tQ!O-CI! zSe#FdlJIe+h8<^Fktzj|gi>{uyC8G9xf>vGb zp8n4{zrHuVo@Vi-8RS3?G4_LxP+VOp_ddxWJLSGtx=n3*(Jt$)9Tv_n#cf)RmgJm$ z&*#T9Yu>=&B_;@FF#~ge_Q-Zb%*}- zUDxx!zny>iolr;iN@cIa_bX@G-?&-V)oCerJ)U26 zNtfMIwMB2%U6!2BUzdFJ<@`rQPHB^mo&K_BlAx9RpRNCXad=8cF7;WWE9w322AAjW zgR(CzH2pp2*BPX!WQy``e({Fgf2P{zRTm=vUVpiE-hzKs8sh7_w|!DgtZV&t{qYNt zH}$K&{hq!Q-DKsm>(d?tmo0AQY;p?|w!f&qzUbqw z7a4!PMJ3Pqcc5Bu{uAYV4=J%TO#cbIu1WEfo&^-Qs`x&pLbWz_NliiPg_b zpDo{SY&dmV^Tv$VV$rYvAHKQp)w$n|cNX20w9VW3xBQ*%q5UWRYyC>J`Ti>P&yCit zccWBdwjICAQDqTX?Y#T+zOH+ptv)wME@yEUS9mQF_Q(8Tex&IAT1CCc%RBBq%He&w*Set z-B149U6Oh)xcaZhrz4W?m)x$czjJZ6{keRv`f@h&)~WT-G@yGywp0^+|02 diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/intr_1_2_timing-GS/test.sym b/cinema/gb/mooneye-gb/acceptance/gpu/intr_1_2_timing-GS/test.sym deleted file mode 100644 index ef6df762b..000000000 --- a/cinema/gb/mooneye-gb/acceptance/gpu/intr_1_2_timing-GS/test.sym +++ /dev/null @@ -1,203 +0,0 @@ -; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/gpu/intr_1_2_timing-GS.gb". - -[labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 -01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 -00:0157 _wait_ly_5 -00:01ab setup_and_wait_mode1 -00:01ab _wait_ly_6 -00:01be setup_and_wait_mode2 -00:01cb fail_halt -00:01df _wait_ly_7 -00:01e5 _wait_ly_8 -00:01fb _print_results_halt_1 -00:01fe _test_failure_cb_0 -00:0206 _print_sl_data55 -00:0211 _print_sl_out55 diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_0_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_0_timing/baseline_0000.png deleted file mode 100644 index 7eb77961da7e3261e5d57cdefc5e0db8d295ea3e..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1195 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QHur;B4q#hkZu?@n4}Ai!35 z`g?uq`PStItTPo=Bqi;4<(GxZ9NWVAGgyB8^=!u2f9w1hk{mZ!aEP%Ve54Q|!_wWH zP&n`OCL6i_uVt1xdhfT(-Qrp7Z<|{D;nxb$Bd0F=zkFtMzy6ey4)=#?K+_c&E(J#L&%X=#i zPCF6&@%`cDleg~w5vqB5<6e!^%eTx~s@k~VN0QBH>EFKsb45=(ZLx}+ed>wL(yseb z??2l}|FOf?o$k*i-P48t*4bXWlOuX z_`mAb{fpO<4&0e5aqi~r&s)CrM}1dMEK$proE^Dm8{7O%(sO+TN;b`kSbo?j{F)X} zci*x1>rJ1%^xw1o(d0c(cs(ySMP6_LB{^6;BGTdKnX9(gxm?}%;PR$@uh$2yVYdkG zx%%1a_2v7KGrUe8jM=i4_r|aP1*I#hKGZ3d@8{fU+dl2_`@{d$ekIntzk2$|M()>j z+44nSo;{p)^p^Ck*l)gH=3SquKcg_KpoDdkU*gkx;eXQ>{d%YUG0LR(yLCS9z@(9Vl{cuH?P$#c2na)0CfLTw3l?2g6i1FV9RpO#NP6|mXv zv*qjR<>nWcJ(u*FcHehZo0R_6$X2_4BFMi<>`Azf(4S%l_FW zuNTj&Q>*;cqnxS!I^6E!Z2R*U*MG79lg1}(*4qw1ToLq88cYH j*#Z%qSRF$R!E^TPahmVW?s>f#R0w&x`njxgN@xNAO_xj5 diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_0_timing/test.sym b/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_0_timing/test.sym deleted file mode 100644 index e94a96a1b..000000000 --- a/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_0_timing/test.sym +++ /dev/null @@ -1,203 +0,0 @@ -; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/gpu/intr_2_0_timing.gb". - -[labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 -01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 -00:0157 _wait_ly_5 -00:01a9 setup_and_wait_mode2 -00:01a9 _wait_ly_6 -00:01cc setup_and_wait_mode0 -00:01d9 fail_halt -00:01ed _wait_ly_7 -00:01f3 _wait_ly_8 -00:0209 _print_results_halt_1 -00:020c _test_failure_cb_0 -00:0214 _print_sl_data55 -00:021f _print_sl_out55 diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_mode0_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_mode0_timing/baseline_0000.png deleted file mode 100644 index 8bd6ee7d848ae15809faf9bd15bafcd0d8e818f8..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1206 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QH~r;B4q#hkZuFP5!V5ODPk z|M!1-v3!+ys%A5XacR|^-%EQh79Qf`aGG@e`RAJs)7S47Zio=j;cGhTxWR%$jQ!vv zg@`%dx8<(CzS?G8`_ZpuuUFnR_;pEf_uSK)!vwU?*Lm?j|ND2j-jQ7mvsy#nU%pen z{i4+ouB5r!i#^nrwtv2LRbn+;yw<*Fc5|8gw;lT|+4(=EE~{X3gOzL9R!^PxOD6uc zHoYNKsrj$?$IBF1{W{-QMKb!QeodITxkp7nB)+Ho?}G^YS!{#A0E9&os28_ zxxezq18-SP1@Yb5zj@xxzx+-tq@X^^*cJKDPyilj? z_2J@soI5vnu3H@0z0o>dl0VON#);z1!Dk~oC&yVH;68Tnk%}z)^yQPzvp>&YWZc($ zI{0!TcU-HSRUE(SlFqm}{Cd$bMv?RRw|zR3U(P+t_tfVg+2_r=66~`}jvZXdA-mpv za-qx~>(jp!Zgfpf-y`RKuZmgEfKM#FNal^{+;ICf?eb^e3V*D@7{jgE^H8u0~-F?gM$4j5tT>p4)hySNZomu~`!pFi%sb1v!SWf`|`^?d(l zzu08;A)<7a>4MERJ9hHz%;DF1H1Xsu_FH%Re7{UQKUM$G%PS9FaHY&Wbn3riO>XE{ z+ptGLCe634{~S8i{#aA(lgQ&IQZ^S|uKzY!+Ipv&G_WxbQw?U$oi+kdw+h8`Rn!na{jRwm;e8H_v<^;m*35m upL&!tqaL_kQj^-_0MFRuyObzD{bYAoD*lR-(*aZ}F?hQAxvX. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/gpu/intr_2_mode0_timing.gb". - -[labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 -01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 -00:0157 _wait_ly_5 -00:0207 setup_and_wait_mode2 -00:0207 _wait_ly_6 -00:022a fail_halt -00:023e _wait_ly_7 -00:0244 _wait_ly_8 -00:025a _print_results_halt_1 -00:025d _test_failure_cb_0 -00:0265 _print_sl_data55 -00:0270 _print_sl_out55 diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_mode0_timing_sprites/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_mode0_timing_sprites/baseline_0000.png deleted file mode 100644 index 0090d69bcab0bcfd1de425807d9e8eb6a6af46f8..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 627 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|S$lr;B4q#hkY{F6J$AU~mY$ z@#FvgGj=nC!ek3VlZuPaIbY_n@Y~6E@Z9N5J|%yDeq*wjexQ))IH!zy!5k1Hc3I}E z=Rf})*ra3r*!=#C>x*Ci$e4FMtZeSvho_%c)}`G_zh?hy@iu+Qy>~PIz5Q|h|Jj0> z|6*^RZE|~kd*04}`;5<@_LF<&_@ta2sK#9rI)z4*} HQ$iB}F^?-k diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_mode0_timing_sprites/test.gb b/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_mode0_timing_sprites/test.gb deleted file mode 100644 index ee6e82ca92e219de00aa596ecf16084e105e9052..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 32768 zcmeHPZE#f889w*!X0u;OZcJEi!n)jDV%&s)A$%=ydD-1;l1;K2nt-&31w#QlR>Z-! z6w-*=Y8}V1oid|LnHKSb+SZ|+w&Pf5Fa<@nAzD9Zr=!$#T5OBfVQM={ROo%~$-Vc) z@rOUuAD#0~_TGJ;=bZQBx#!*_KhC{y;ghj{sHIOP&}STl9bKtB_pi;HPgJmwXFI!{ zg;@pjSI_>=U99re6I)+Db?Q%hpL}x5#;uiao;daD-XA^r#6r5^#v8Y8`o^YtTZW9A zH*LR}tzFAZQx>v$3!-n2Hx$N~6~-_0#WNSi&XYQEf!G-~8oybI%#AgV-x1PPg^>d2 zP9-ug)&j_*GDa$}A1IOev3bC}9y2I;0RCKww8kz2Sms44@&Y}kL>9zaf%?jTGAaXn zN{K9twE-^oSui6X@c$~2MX`mz{pB2IR1Tt2jVy^R1`+U25sds`l4@jWYzdfPz-AZ) zKy|2*Ww8{fP|%?m1;MQsIK?pvf!n1=Hx+%E;r>ljsndtTtm z9HT05ZwQ>vG19=5d)!*e9iwV+b3AT;e#ht{a4Q5Z;270_yIP1Dbc|}jeO=%}j?oNo z-xs*BV-x{*NZ=|QqnY5w1g_FC(!u>*;Hn&>I&dDZ+n?qb)q|TYaMg~{EO3_#oZ%Qn z!L1RvxMOrNxa|VB-!Y1TyI0^IaExYy`>EHxMh6@t1KhI$chE74gZt}8a|v)4ypg6@ zlCQxZJ4SQB%_?)bM;)UEa7)V~?XhLTnz#C(OTY~ZoVDbwKBy7gjb*OZ){?jSpi9Bs zEpXP7e-K7Va0koW-mNA75R96@9Thlh$v+IEW^k_woVDa1fze!W?+Ki>8)Z z+g}F8`a;gz^5` zz&#~!T`=C?LU6ALTsMsOw+P%jKJgK}7*Md>g%nx>=wbmJM+rLT8->!b@2X;=t zlmM*+RuOQ23#&o;9I&{6c|tS*Y;hpc5}S)F?oqvA8U)rOU}Y7w3fMIQ=BuRDz-|(- z@+!It*tY|2eSVGB0NX2Ifol3Zu*Za2f)~*jfc;j$LN&A&*hwKrxR$O4_D=z;m_h4+ zeIQ_!5xNFgbqTCgnJL)U`4DHvH1BhIP8i|P~2ZSA>U8UlAuFtR+B=A0)~Gi%P=g_n2q(ME8O z2Hhu;H(VQSXjzob7wJpjo(Z~7kFtsx7hf`O@$$|qXcM@<2%N7n5^J2lgu1Sz&EP%| zxbmu*voF1D>5A@t+5)aF_jkCU+h*!ah%BS;QZ!Xq+)W!SoN5U7_)CQTMOv99(7e_pt~oojfhh zL6F1a^@SJ4&xT&;jjN;MzHncB2q!B(4$sA(4xKis(?_eqKIT1}ecfZ6+fk`JailFA zf6b(ZK1`{gO7;D|);K#~Lj#HW#EyjbP@=;4cL~S$sgx+0W#r7#&1mPD@ve3D81IrX zkv%j~_1@Rm(R;$vI^M)96085Hj&BH~<8rIxIc$=Rjz@~hZ5HS^y0SgR&OD3cO4CA* ze!S4fttcS`X*UYl;wl9CjQ@#{>7)Wu0jYpgKq?>=kP1izqyka_sen{KDj*e*3P=T{ z0#X5~fK)&#AQg}bNCl(=kP1izqyka_sen{K zDj*e*3P=T{0-ursBZ6Tcx8ROQ|Nl=9cdtJGW^Zk0%x`V}PntG;Ofoq<%s;^W{#Y!T zj7EdObQ&`@Y}m8sy6Ym5rY4{Dwt;9Ao5Jhr8XN2C_;?=Ij_LPn8b)Xu$8pBqX5bjp z+#HP(MWfBl?hL=52zA;BKif0lrPI?ncznF7^4Nxv$pF>$h6Zd=ZfMYT_m=k@BkVT@So-}ZAko&)2P$wFaxn8zO($z+CyRn_LxY52&%$B&Fm&yRTc*gXGE zq^fQYJhI!b?Q?~EK3(6iLD#w7s2P>=YTm9lxTHa|R^$?VvH&Emtu;9Z~Vjr_ZJ@7rh3N9Q9W zIOcK~&#x@501^CX)Y|Fpwa4f4g~G~}+qM-7`8;@J;>J79W;bqJy}G9dThhVjazjG{ z1HHXnT|9m?nwT+EHYQBYo^D9@{`M_&hIGjlE`M2D{R|}3jAMeG!p10l# zzri%VzED?B&+641H`?`q;j0kyv)M$VwwA|)@2(f#Un+&W1;+KyWca<~^`cr_Uu$k4 z5aPV1efa*xC>W1t-*+6tF`ZUbqOPv?c6d+*>vw2q-8%R%eoyoM@%{p$T+SZP?-<+# z_WIRzO-rTlN(nxju|FTid!ZSC64n_V7jK=k<<&@_I};>n6E z7$1#lTB~WA#`U+A;b(sR@wyPd->wg{+S-amoN?7%gTLb!$LkX{A^n{-=C_@Rkp3=^ z!$w)noRI#XrKLFAtuW)z(R1DAE@5Rqv%Z=8jYp1)dwj>OCt(|@HiDA}{~@#IW%pz@+MBy4Rmp4wAfI`h)#H_yC0I(+8js9PMnfAZw$n#q?( z*Y7ml zrPFfNEK~Y9(QdHGqoe(kCq|!0R%4U%7LLaaR;$lezG``8{e5NtT~oegxqhrQ)7V&_ z8S;J$Q@faQfKNrpBWB1kJLGRTJ{9t~E=yHaSM}k2!!8yxSb4>B{TFoHA zGiHM4>;$toK9!)!@|*-I%XJcrU2TReTA13wl&knugnZfzIc|sC%JHd?!zfB5kC`E#w?ig4J{7Xn@|=(>EY}H%ng{rJ)V$qHaINL41*Tlj2_z_)30|}l+|Kc- z1mCkfC&7NpbrOv2GDH5#!qg&D4)du9dE5;7f*tY?9G?pLH_LNEzHPZqNVDcrT-#mE zGRoQV@w45f;CYtxCOrB(rS7rT@wvsZRy}0i3vbQ#vHozNL{=kP1izqyka_sen{KDj*e*3P=T{0#X5~fK)&#AQg}bNCl(I(c1#n?B^ diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_mode0_timing_sprites/test.sym b/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_mode0_timing_sprites/test.sym deleted file mode 100644 index b5f7cac3b..000000000 --- a/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_mode0_timing_sprites/test.sym +++ /dev/null @@ -1,437 +0,0 @@ -; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/gpu/intr_2_mode0_timing_sprites.gb". - -[labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 -01:4000 font -00:c0c2 regs_save -00:c0c2 regs_save.f -00:c0c3 regs_save.a -00:c0c4 regs_save.c -00:c0c5 regs_save.b -00:c0c6 regs_save.e -00:c0c7 regs_save.d -00:c0c8 regs_save.l -00:c0c9 regs_save.h -00:c0ca regs_flags -00:c0cb regs_assert -00:c0cb regs_assert.f -00:c0cc regs_assert.a -00:c0cd regs_assert.c -00:c0ce regs_assert.b -00:c0cf regs_assert.e -00:c0d0 regs_assert.d -00:c0d1 regs_assert.l -00:c0d2 regs_assert.h -00:c0d3 memdump_len -00:c0d4 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0174 _testcase_data_0 -00:0176 _testcase_end_0 -00:0187 _testcase_data_1 -00:018a _testcase_end_1 -00:019b _testcase_data_2 -00:019f _testcase_end_2 -00:01b0 _testcase_data_3 -00:01b5 _testcase_end_3 -00:01c6 _testcase_data_4 -00:01cc _testcase_end_4 -00:01dd _testcase_data_5 -00:01e4 _testcase_end_5 -00:01f5 _testcase_data_6 -00:01fd _testcase_end_6 -00:020e _testcase_data_7 -00:0217 _testcase_end_7 -00:0228 _testcase_data_8 -00:0232 _testcase_end_8 -00:0243 _testcase_data_9 -00:024e _testcase_end_9 -00:025f _testcase_data_10 -00:026a _testcase_end_10 -00:027b _testcase_data_11 -00:0286 _testcase_end_11 -00:0297 _testcase_data_12 -00:02a2 _testcase_end_12 -00:02b3 _testcase_data_13 -00:02be _testcase_end_13 -00:02cf _testcase_data_14 -00:02da _testcase_end_14 -00:02eb _testcase_data_15 -00:02f6 _testcase_end_15 -00:0307 _testcase_data_16 -00:0312 _testcase_end_16 -00:0323 _testcase_data_17 -00:032e _testcase_end_17 -00:033f _testcase_data_18 -00:034a _testcase_end_18 -00:035b _testcase_data_19 -00:0366 _testcase_end_19 -00:0377 _testcase_data_20 -00:0382 _testcase_end_20 -00:0393 _testcase_data_21 -00:039e _testcase_end_21 -00:03af _testcase_data_22 -00:03ba _testcase_end_22 -00:03cb _testcase_data_23 -00:03d6 _testcase_end_23 -00:03e7 _testcase_data_24 -00:03f2 _testcase_end_24 -00:0403 _testcase_data_25 -00:040e _testcase_end_25 -00:041f _testcase_data_26 -00:042a _testcase_end_26 -00:043b _testcase_data_27 -00:0446 _testcase_end_27 -00:0457 _testcase_data_28 -00:0462 _testcase_end_28 -00:0473 _testcase_data_29 -00:047e _testcase_end_29 -00:048f _testcase_data_30 -00:049a _testcase_end_30 -00:04ab _testcase_data_31 -00:04b6 _testcase_end_31 -00:04c7 _testcase_data_32 -00:04d2 _testcase_end_32 -00:04e3 _testcase_data_33 -00:04ee _testcase_end_33 -00:04ff _testcase_data_34 -00:050a _testcase_end_34 -00:051b _testcase_data_35 -00:0526 _testcase_end_35 -00:0537 _testcase_data_36 -00:0542 _testcase_end_36 -00:0553 _testcase_data_37 -00:055e _testcase_end_37 -00:056f _testcase_data_38 -00:057a _testcase_end_38 -00:058b _testcase_data_39 -00:0596 _testcase_end_39 -00:05a7 _testcase_data_40 -00:05b2 _testcase_end_40 -00:05c3 _testcase_data_41 -00:05ce _testcase_end_41 -00:05df _testcase_data_42 -00:05ea _testcase_end_42 -00:05fb _testcase_data_43 -00:0606 _testcase_end_43 -00:0617 _testcase_data_44 -00:0622 _testcase_end_44 -00:0633 _testcase_data_45 -00:063e _testcase_end_45 -00:064f _testcase_data_46 -00:065a _testcase_end_46 -00:066b _testcase_data_47 -00:0676 _testcase_end_47 -00:0687 _testcase_data_48 -00:0692 _testcase_end_48 -00:06a3 _testcase_data_49 -00:06ae _testcase_end_49 -00:06bf _testcase_data_50 -00:06ca _testcase_end_50 -00:06db _testcase_data_51 -00:06e6 _testcase_end_51 -00:06f7 _testcase_data_52 -00:06f9 _testcase_end_52 -00:070a _testcase_data_53 -00:070c _testcase_end_53 -00:071d _testcase_data_54 -00:071f _testcase_end_54 -00:0730 _testcase_data_55 -00:0732 _testcase_end_55 -00:0743 _testcase_data_56 -00:0745 _testcase_end_56 -00:0756 _testcase_data_57 -00:0758 _testcase_end_57 -00:0769 _testcase_data_58 -00:076b _testcase_end_58 -00:077c _testcase_data_59 -00:077e _testcase_end_59 -00:078f _testcase_data_60 -00:0791 _testcase_end_60 -00:07a2 _testcase_data_61 -00:07a4 _testcase_end_61 -00:07b5 _testcase_data_62 -00:07b7 _testcase_end_62 -00:07c8 _testcase_data_63 -00:07ca _testcase_end_63 -00:07db _testcase_data_64 -00:07dd _testcase_end_64 -00:07ee _testcase_data_65 -00:07f0 _testcase_end_65 -00:0801 _testcase_data_66 -00:0803 _testcase_end_66 -00:0814 _testcase_data_67 -00:0816 _testcase_end_67 -00:0827 _testcase_data_68 -00:0829 _testcase_end_68 -00:083a _testcase_data_69 -00:083c _testcase_end_69 -00:084d _testcase_data_70 -00:084f _testcase_end_70 -00:0860 _testcase_data_71 -00:0862 _testcase_end_71 -00:0873 _testcase_data_72 -00:0875 _testcase_end_72 -00:0886 _testcase_data_73 -00:0888 _testcase_end_73 -00:0899 _testcase_data_74 -00:089b _testcase_end_74 -00:08ac _testcase_data_75 -00:08ae _testcase_end_75 -00:08bf _testcase_data_76 -00:08c1 _testcase_end_76 -00:08d2 _testcase_data_77 -00:08d4 _testcase_end_77 -00:08e5 _testcase_data_78 -00:08e8 _testcase_end_78 -00:08f9 _testcase_data_79 -00:08fc _testcase_end_79 -00:090d _testcase_data_80 -00:0910 _testcase_end_80 -00:0921 _testcase_data_81 -00:0924 _testcase_end_81 -00:0935 _testcase_data_82 -00:0938 _testcase_end_82 -00:0949 _testcase_data_83 -00:094c _testcase_end_83 -00:095d _testcase_data_84 -00:0960 _testcase_end_84 -00:0971 _testcase_data_85 -00:0974 _testcase_end_85 -00:0985 _testcase_data_86 -00:0988 _testcase_end_86 -00:0999 _testcase_data_87 -00:099c _testcase_end_87 -00:09ad _testcase_data_88 -00:09b0 _testcase_end_88 -00:09c1 _testcase_data_89 -00:09c4 _testcase_end_89 -00:09d5 _testcase_data_90 -00:09d8 _testcase_end_90 -00:09e9 _testcase_data_91 -00:09ec _testcase_end_91 -00:09fd _testcase_data_92 -00:0a00 _testcase_end_92 -00:0a11 _testcase_data_93 -00:0a14 _testcase_end_93 -00:0a25 _testcase_data_94 -00:0a28 _testcase_end_94 -00:0a39 _testcase_data_95 -00:0a44 _testcase_end_95 -00:0a55 _testcase_data_96 -00:0a60 _testcase_end_96 -00:0a71 _testcase_data_97 -00:0a7c _testcase_end_97 -00:0a8d _testcase_data_98 -00:0a98 _testcase_end_98 -00:0aa9 _testcase_data_99 -00:0ab4 _testcase_end_99 -00:0ac5 _testcase_data_100 -00:0ad0 _testcase_end_100 -00:0ae1 _testcase_data_101 -00:0aec _testcase_end_101 -00:0afd _testcase_data_102 -00:0b08 _testcase_end_102 -00:0b19 _testcase_data_103 -00:0b24 _testcase_end_103 -00:0b35 _testcase_data_104 -00:0b40 _testcase_end_104 -00:0b54 _wait_ly_4 -00:0b5a _wait_ly_5 -00:0b70 _print_results_halt_1 -00:0b73 _test_ok_cb_0 -00:0b7b _print_sl_data55 -00:0b83 _print_sl_out55 -00:0b86 run_testcase -00:0b88 _wait_ly_6 -00:0b8e _wait_ly_7 -00:0bb9 testcase_round_a -00:0bc4 testcase_round_a_ret -00:0bd4 testcase_round_b -00:0bdf testcase_round_b_ret -00:0bf0 prepare_sprites -00:0c06 prepare_nop_area -00:0c0f setup_and_wait_mode2 -00:0c0f _wait_ly_8 -00:0c32 test_fail -00:0c46 _wait_ly_9 -00:0c4c _wait_ly_10 -00:0c62 _print_results_halt_2 -00:0c65 _test_fail_cb -00:0c6d _print_sl_data56 -00:0c74 _print_sl_out56 -00:0c82 _print_sl_data57 -00:0c8a _print_sl_out57 -00:0c8d fail_halt -00:0ca1 _wait_ly_11 -00:0ca7 _wait_ly_12 -00:0cbd _print_results_halt_3 -00:0cc0 _test_failure_cb_0 -00:0cc8 _print_sl_data58 -00:0cd3 _print_sl_out58 -00:c000 testcase_id -00:c002 nop_area_a -00:c062 nop_area_b diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_mode3_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_mode3_timing/baseline_0000.png deleted file mode 100644 index 34626054e21293caf7b4334a9deed0b9d2ef9ce3..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1214 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QH|r;B4q#hkZu50))9;BlR6 z`SXALIUTFVzZ!ITrgi<=QGU5iLh+AMvSRxlyZQc%vH$M8WjNAw;E}=x3l1GVrtW4i z^L@~%*I!qyzrAJ0UAwC6$!_y+rC#2#&)Uf7)8(?45BKcBs&}{@M2+k6kjhtjuH0{3SELxv})O z*rfiqtnuIUO??M6~ZU)9!$L zO=;G_+w??3-z+O~+w!j6Ad^8;U|ZJKwv?9_^=4L1tc|L?hH`*g{}=v!LXUJ2Yi zs-1Vu_vY^BJ(lt7Tnc#aAN`fR`+b^(j_=-|_fFiH^B}G0!dH7y#p@4#ZhotG*dR>s zr_syhfjQ^)_o%#l&bLQ_U+noQfw$Im$DSTMdM18-B=;xdzV7P@>s?PQtlaQE>E$~w z`{O-&9olxXbvf$(rOTRQuEb^<-?Ur4OI4%k^OJ*S`;VR%eK#jXvNFYYYi!T-87Wqw z`|KW_Q{1)HEUG70CiUKr6NgysPv5vY$8pY=Q;cyF*t;j2@UP3?sd6xW#}dyc2cH|f zTB%now%)IQUG#B5BNzQ^&9BA8{l#7%eCqz{T477byJ-Jn?GQx++ZR8IbnTK-0z~zYT5h$Hr3w$n3-bmndQ;5(u<4h zJa5Ez@4OZpBXYxT^-upV8EQ{=3mvxjwP*fspTFG~zp1RbcTy{R^2uuDA5(T+JjZfS zCA+K2TBmqJ+0M$?5|eK=xplEyF7D%+|741}N-6iAgbvJD1;_RC-(gR0E;auB*7$4e zZm&RTiR}`*kDI=_Y#%(s>-53BFD@EAxcI;Q>cYIoe|uw+H-1^jZ~S)t;r)uc*74nG z_cLeed3x|}>501xxv}IJ?5?4P=$!olRm%6T&Cq!bDwjN6{an^LB{Ts5pX5gP diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_mode3_timing/test.sym b/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_mode3_timing/test.sym deleted file mode 100644 index 4cc8629e1..000000000 --- a/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_mode3_timing/test.sym +++ /dev/null @@ -1,202 +0,0 @@ -; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/gpu/intr_2_mode3_timing.gb". - -[labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 -01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 -00:0157 _wait_ly_5 -00:01b5 setup_and_wait_mode2 -00:01b5 _wait_ly_6 -00:01d8 fail_halt -00:01ec _wait_ly_7 -00:01f2 _wait_ly_8 -00:0208 _print_results_halt_1 -00:020b _test_failure_cb_0 -00:0213 _print_sl_data55 -00:021e _print_sl_out55 diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_oam_ok_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_oam_ok_timing/baseline_0000.png deleted file mode 100644 index 42de5e8c0e5a501cc4f5877e3bf7302de0704cea..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1186 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QH@r;B4q#hkZuFHU-;Ai(-~ z+W-Hj@3rr34Pg>yGJaig>F=g&A2s190j5`vzgFcgIDLM(a6^QE4qwwz#|;)7V(bSW zDMZY9zAd-^_+p!N?MJ_UyBEAW@yk-@GVAH-)s9t_w>0n0dH#O>E`irfSz=*({fqzK zJ$6rVufpEXQtc8zx#R1OeaZT;^ilS^WSNRBrt{8w{IUML?%-J_qpmkulOy6hm48c{ z?oj^}^yl}7cPX;>|IE7b)FN)mS4HJ?NlyiheG=z?9o$%F5`A=+K=s@;v8hIUnMvD^ z9k*G3Y(M{={LaG`5i%^@%?X7VPX4JUyXW1T?~m3TH&N1;iAFE_P_atxa%$xLlYfgHR z=J`4Q{AOlG^gK1XyijRY#`?74l*)ixYF1BdEB<6vpEmfHR(WjK)IX;^ChdE7fcx0N zM`uhfeyf_bGvnB=tmz92o_(y+nEd`=T=#_8b4Aws&3T;k^2Nt0naO)!e5(Ka;oxdn z!Iw$psq)JH$1l3bD4O2LE_fum%H2u+UCpM+S9e#3%IV!(a_4So(fP|K?D^;CEP9=> z_vnpdk;j_9E9pGT%=dS?bX~UMphd)-C66C`3iGxLs`LOFn+|Cs3_3!8M&lAb% zS2(_Y+x5vsF`bF?|GujEu=>}(>G!^cthsmc)-|ii^Vc5atli(dHnxA?8;Df z`e~oH?_u<{{Ph#Ql(NTNaKRFdz_|UqFSN4s<(b0YC;qIn^$sjE$TKuMpMA#v|JfrU zQGV}SzfWWQ{?C4{Y}UJ)J?c3+)9lVBru_f?VSlIIYUcjX<&n%iPY<3gJ&{@+ASiFV z{qr9F-)g^3EbSCo%;p}x;GX6u{~s-%HiusQ9?|K2ktfew;(qb0$C_%NL>>d9c2VcL z@0o7WF{;7;FV9KNKX$WoN$0-g{g1;8_#in0YuY19Q2q3KwW|yF*nNKab?@cf8Sg6F zCOs{mJZs@K@3X5fEdJc{c=G<)B~nM0R%X=2?X=k~QGYtO-23-#&p7$7TZ~UmPM7ht zj=cY=^WLAzb#+Vszcf$2aby1d*#B`1yX|MFpSPH_j5SUrchNy^Y?*^72ZD1x@ha!k Y_bU3HWdFQi4XEt#boFyt=akR{0Nb=vYXATM diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_oam_ok_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_oam_ok_timing/test.gb deleted file mode 100644 index 8196451a40d4d69442eb8d2f94f9ddc0ec5d54a7..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 32768 zcmeI4Z)jUp6u|F$$+Fib?OvBz-|Ay~jiF?78(ke5OME78uWhnMTiVV^Ev&Yz8%*b5 z{;4x&9r{7>i^9+eLx*1kL5d&@9gJX67P2S^DuR=I&?0q?!IW)LTkp9i_oeldf(Yt4 z^!+)1?m6fF-o1r>=v`X+d*pky`1d6GhqJJ`LFJPlr=~76v7qk=dzOV*6VqBYKK}x1 z{`$h9`HL67dhP7l{ga29FI~9!^=ogOegAg*kw+grwC|~XTlY^`kL^417#kgBT$J0{ z)>qbEz2YvuU{(43C97I)OSiK{TdgdW8&!z;^AceG{QQzt9sH{!<-iB7Zr2Lmeg4tU z+ZUH++qJ@z?F|J*W91utwzAM%;Fi+7tu8c)x65<)rg_T_Z#*^cTV&RC@$^~OZL5-+ zt*rUw2{yM?El1PkyVB*Q{&wqRd0cHzE|nIS&-dtCRw&?WUe&5?XzI9WTZ9?EDF@VY zC~E|JQ<-eHl}=?xSgZ5zTq^(Y%A|5cfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la z5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la z5CI}U1c(3;AOb{y2>jm&>u#>PYfMvRZ2IC0=WYwM;>fdKeT)8evzeMiUo^%#$N;T=TNbR8me9qsV+a{)W} zH*Ypg+cwS3n?VDC25lSesLQ(?0eT`Kt@S6yt19NUtYi{=h7pZAT%u9K0A14z19EGc zX@Z_eIF8?M7?zb6>tE`QgEb&N7E7mdIn1BWCzH9Hs!D$%0XkH`_Y&(JA$3mW<$2DEtGbzwe?;b@ql>z+Dw;>6gPWtpbI zB^t#pAbxtV`$96!Uwb>ngA2e0(!a>?ZMbdpOh2mZQ_yrKTg%&AjyJj^_whr8oI zJbqc=Z`+`oCaea(U&gy`Iz2de_;5Pyy5NUOC^+L(YI1V-?o1}d1^kXPF)=i>YgcbC z<~PkqP4N5T{4fK=FZZkbj1Ke<4$6Aq*Y!{+62bAujzO;|SP$nSzvuDephvmj`hvbP znccf5CuM)&!Bq(3Q>jQ~-MV_d`g+0n#pAGBK#+ejiF?QIhi>8fim?q1LGvv*eYz%Y|+|xLJm5XgVj*Q101G_-3U&GM#cwFa# zqZ!+=Bb#;I9XtGfoJ~9qe4WvRQb-SFa1`)9;>di-d#5wLSdpXe4M{2g^BYRruDR@zb5f zb~d9hYj*BNA3wQ9InBfyKj$TXe)&N!rE|sEic{HH>96dvTPjKW*Gk`v zoDb8&3d)OVI3lKTsHZP8Jkm2X%*s|4e&TSiYK1egJC#`x6HE;c_Y93>2JZ8MVwt07 zVmI?Z|`}u*i&6w*n70xnthsIZTt#X zTMBo_*1(AQjf?B7A9zmV8!-odj?L^I-pF3%jtsQw<7=a|Gj@;CBUClTlmT>fTdb-S z2C9vP_hT(Qsj?sK?G{^SY*Zc>+Nyzmp1{zR=Y*=kTI0e>{XFGKVN-jV@+J<2l#Hir zkSRYvdoAU8p?N946sngJxGZ2i6d2|OZU|L%nBv96^IMf zD^Plnr_2hQx|1pQ<4{Pc@{~cD@(|itlKlf1w?LRDR+oIwW^ zSj7u8%L1RGy;k6&(7Xbdgz6P29poulKTKZjVM?QT^Fc~KPuV0>M$leM*(o$HuVNaCf=VO}JxJS^>w z7kW&ZcCHM4RoY!I^lfSCSsD7Fw5Pq$&!vf>Y z5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y W5g-CYfCvx)B0vO)01^1_5cnOeI-Q3A diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_oam_ok_timing/test.sym b/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_oam_ok_timing/test.sym deleted file mode 100644 index ded62c5a8..000000000 --- a/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_oam_ok_timing/test.sym +++ /dev/null @@ -1,202 +0,0 @@ -; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/gpu/intr_2_oam_ok_timing.gb". - -[labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 -01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 -00:0157 _wait_ly_5 -00:020a setup_and_wait_mode2 -00:020a _wait_ly_6 -00:022d fail_halt -00:0241 _wait_ly_7 -00:0247 _wait_ly_8 -00:025d _print_results_halt_1 -00:0260 _test_failure_cb_0 -00:0268 _print_sl_data55 -00:0273 _print_sl_out55 diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/lcdon_timing-dmgABCXmgbS/test.gb b/cinema/gb/mooneye-gb/acceptance/gpu/lcdon_timing-dmgABCXmgbS/test.gb deleted file mode 100644 index 00a9a878eeefae9cfff4963276d50f215ebc15f1..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 32768 zcmeI4Z)_W98NlDWxal=Xvok5-;@+Bz>jgKYnaL_bK)dk?d8v^g`l-DNrzU_ zh-6aQd7j%u`=fmUDIYqi8WmsQ3j_pGw^gbvDowRg149Ca)S?W*K7@gaRv5EJ!u!0B z@9e~@l#h%(kK(&~{=CogyuW+jJE>A{bMvz;?0QoA<=>{KZ|-IFHFIo{HL$%*akjqn zGHbkbbLPF>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F z0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F z0z`la5CJ0aDIt)l5cps06>5g`|34mZPb)$f7Eq@>YI#j^;OlE6+$Ok{mkJrJVESKki znalIFbR<+;t7#`rXd3c{o}p9h7Buuh3}}A8X~KLM!_hE9)4X(Pd3j>OFmzqx;_+Y? z5Wlcsn(%|8H9pJ5H2r?d4_?ckPKQDZ3n4D)H2BLp@`n1^?4?WAc$j%61II`N;_=P` z|6mYwU5C}+a9HuC8H**8v$L_7X@Varq2P?e;Z$mDY+xYF1^ki7P@9 zt3UAIDunUju-mBTh zNIY(uM~*lgI2*qo_;@_vhqYb8DfTz$){az^*;$ym$K&<-e4U*T4|!3LFW9E1$H##> zT!VCVb$7!}M-4l)?hn`|CMG8%5m>3A5a>NUuv%ab%7STUXLmQ$1s~2{)1Y_MRW%TR z4$AeRR(re4g??Cr<>w37&T|kMpZ@?t1OtV7X@OYC2f2-F-OU#GH@6KdyRDO77^;&*qEwa|THncVvbgqShAFuUa=U=_4{9a8qwv+GG zIPcF%uf*V!HFd+${(+Iv=b8mQ^JgIaF?QI6zr?pDY2yItlh$qlgX-TLGtTirdb%>|DC~R^clfI8bA?5u% zWxJK~O|+L%-VmCd^7lfuQv#QDjE4dvyue37l_N~585EO&0tPQ|$SSZO?WF>Tgk~4; z3)L>L`Zb<1E^KlylOD&Rkg}Dh^jaxr&|XTJ7Mh*%6`|TGq372y9(qpk0zVR}Y%=Kz zI-r1?7xN`TeemxYdep`G1c)d_jON=6N^SCjTp)>~kXgsBtotnwpyvA>0j-_*XhVK3tCZZ6o7*Gt=*S{TC~Vrh^S< zH#FlPZ|5`XuAFPVC3kjR%e~#sy0n((*7x(*n_lsH>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3; dAOb{y2oM1xKm>>Y5g-CYfCvx)BJe**;J+{OfFJ+> diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/lcdon_timing-dmgABCXmgbS/test.sym b/cinema/gb/mooneye-gb/acceptance/gpu/lcdon_timing-dmgABCXmgbS/test.sym deleted file mode 100644 index 8b0bd688d..000000000 --- a/cinema/gb/mooneye-gb/acceptance/gpu/lcdon_timing-dmgABCXmgbS/test.sym +++ /dev/null @@ -1,236 +0,0 @@ -; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/gpu/lcdon_timing-dmgABCXmgbS.gb". - -[labels] -01:5087 print_load_font -01:5094 print_string -01:509e print_a -01:50a8 print_newline -01:50b3 print_digit -01:50c0 print_regs -01:50c9 _print_sl_data0 -01:50cf _print_sl_out0 -01:50dc _print_sl_data1 -01:50e2 _print_sl_out1 -01:50f4 _print_sl_data2 -01:50fa _print_sl_out2 -01:5107 _print_sl_data3 -01:510d _print_sl_out3 -01:511f _print_sl_data4 -01:5125 _print_sl_out4 -01:5132 _print_sl_data5 -01:5138 _print_sl_out5 -01:514a _print_sl_data6 -01:5150 _print_sl_out6 -01:515d _print_sl_data7 -01:5163 _print_sl_out7 -01:4000 font -00:c01d regs_save -00:c01d regs_save.f -00:c01e regs_save.a -00:c01f regs_save.c -00:c020 regs_save.b -00:c021 regs_save.e -00:c022 regs_save.d -00:c023 regs_save.l -00:c024 regs_save.h -00:c025 regs_flags -00:c026 regs_assert -00:c026 regs_assert.f -00:c027 regs_assert.a -00:c028 regs_assert.c -00:c029 regs_assert.b -00:c02a regs_assert.e -00:c02b regs_assert.d -00:c02c regs_assert.l -00:c02d regs_assert.h -00:c02e memdump_len -00:c02f memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:015a test_ly -00:0166 test_stat_lyc0 -00:0175 test_stat_lyc1 -00:0185 test_oam_access -00:0191 test_vram_access -00:019d test_finish -00:01b1 _wait_ly_4 -00:01b7 _wait_ly_5 -00:01cd _print_results_halt_1 -00:01d0 _test_ok_cb_0 -00:01d8 _print_sl_data55 -00:01e0 _print_sl_out55 -01:4ed8 cycle_counts -01:4ef0 expect_ly -01:4f0b expect_stat_lyc0 -01:4f2e expect_stat_lyc1 -01:4f51 expect_oam_access -01:4f74 expect_vram_access -01:4f98 verify_results -01:4faf verify_fail -01:4fdd _wait_ly_6 -01:4fe3 _wait_ly_7 -01:4ff9 _print_results_halt_2 -01:4ffc _verify_fail_cb -01:5004 _print_sl_data56 -01:5012 _print_sl_out56 -01:502e _print_sl_data57 -01:503a _print_sl_out57 -01:5055 _print_sl_data58 -01:5061 _print_sl_out58 -01:5072 _print_sl_data59 -01:507e _print_sl_out59 -00:c000 v_pass1_results -00:c008 v_pass2_results -00:c010 v_pass3_results -00:c018 v_fail_round -00:c019 v_fail_expect -00:c01a v_fail_actual -00:c01b v_fail_str -00:c01b v_fail_str_l -00:c01c v_fail_str_h -01:4bff test_passes -01:4bff test_pass1 -01:4cf1 test_pass2 -01:4de4 test_pass3 diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/lcdon_write_timing-GS/test.gb b/cinema/gb/mooneye-gb/acceptance/gpu/lcdon_write_timing-GS/test.gb deleted file mode 100644 index 414811dbed7d66673a70ac82ccca98be528cc901..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 32768 zcmeI4Uu;v?8NkoIG43TX={08AO=`ilu~HMIEJ{)9WyaVy*NL6jahg9w$}%;?O#qdJ zXap@#*G)zrR`q3-c%TyM(4?u_Ll+@UVvGs(4ynR2ZpE~2npCE+jZX5q3e+-IYjbwK zb9}DNp8B#E`hCLp-tW)(zVH0bIrkwFcXRWrE#%s$^!`5<7H(`KElnrL8R8<_h~nP$ z!`DdbM>iHfzIE%5Z(g}_IJ?;T$&Fhdz4_xSm!FP&_xSO}`BU>x9iG#d=T9t?>1jem zdYU{ndhxSTAW>2irH+J~R7?I5_x4mNopO^^c>V@FL%=r^rEuD(pDX=T@^+JB^Xq*5}iDHHMW2|Y7R+DPH6y=pjnB!C2v z01`j~NB{{S0VIF~kN^@u0!RP}AOR$R1dsp{Kmter2_OL^fCP{L5+R|S4FnpDMBvJGaTOy#4~K=d ze&_MB%ya8{GzvaV3j_=*fqa7o8qMWoS@^?Y(4hj4&*vYm5BcCH{QNl*k>&avc;@#qr4Up_yc0pc6|vMlC5Ix6ac zUsYW$zn_nPY z+cli*e1k4dq@pY>!OR1JV6dmByBp#mFBi@iYzqt1(?A`bLH6$L?S)0>8t+i757=gA z=H?6oc4{;VdS4&x7C3`4W7^%_+Y5EU$7io;&^y;vH5`Tx>h+;kXJVWIAaJg`RX;0~)^ z7tmKOUhnXGTC@jK^y##}Mf(?6uIgJnyIZu+pDp;vszmhlYhMidNL9K(*c1IkP5yf0 zH)@Jk3+o%kM*qg}#!$q)5smzNWAGaN>P_RPZB`Rs=F>KA(~@3Kz}Ib>$Kr#@@rn4@ zI4ON64gXHUwUV+f1)r7HSxif8d^|ojk<5(PLBZtdOTn+xK12ntOFGH4 zEtz4OKvShxnX15Eqe6U7+}Fnli;~azBv{@}ZD&fTqld zl#AS6OPOPuo$__2+9{#uw|G4CoTUZcVXABr=@NH9fg~+3CJKDO?X?28m}VFFgsFCc z;)^sT8HUNraUwOdrzS|5pedgdDgE4DOWDITJLLhU+9{#uF&+;+pP&T}F;z|w=|%2< z0>iYxgeY)^+iL~hV47Xv0#oe*#g}NxUoe}TBGOep6jBb+l;a}h@43B}@~=#@Q+~!& zJ01q;_YLBG7EFC030Z2kpGfzG93P!RprAoWrW7UVB1($#+|du+ZBPFR54 z@of$}N#%f**_yvi&nJX6ry-#$zOpo*U50D{Qi)nM=abwS%PyZhbPSSEXAGQeM!~19 zx=B>J`&jAjV4=B6f)0O^_Mk9W>?s{d7kji8`Xc#smy={%TMLoLFI1aD@_UcH*W)jE zq&!RO)b$u`9^O7rNN)(!K+WXw(C$3a&xGBuLw_wy{SSx!PS{O5^l!oxe>ikg*b{c> z_7UJfdrCEi7AP^P+gh)BuHWyvGkdi3tr0VQ`(9Z4^v;L(*UO|@CaXU3uKW0ijp%m#c-f=(cLbaf5?h5 diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/lcdon_write_timing-GS/test.sym b/cinema/gb/mooneye-gb/acceptance/gpu/lcdon_write_timing-GS/test.sym deleted file mode 100644 index 67acc5419..000000000 --- a/cinema/gb/mooneye-gb/acceptance/gpu/lcdon_write_timing-GS/test.sym +++ /dev/null @@ -1,230 +0,0 @@ -; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/gpu/lcdon_write_timing-GS.gb". - -[labels] -01:4d3c print_load_font -01:4d49 print_string -01:4d53 print_a -01:4d5d print_newline -01:4d68 print_digit -01:4d75 print_regs -01:4d7e _print_sl_data0 -01:4d84 _print_sl_out0 -01:4d91 _print_sl_data1 -01:4d97 _print_sl_out1 -01:4da9 _print_sl_data2 -01:4daf _print_sl_out2 -01:4dbc _print_sl_data3 -01:4dc2 _print_sl_out3 -01:4dd4 _print_sl_data4 -01:4dda _print_sl_out4 -01:4de7 _print_sl_data5 -01:4ded _print_sl_out5 -01:4dff _print_sl_data6 -01:4e05 _print_sl_out6 -01:4e12 _print_sl_data7 -01:4e18 _print_sl_out7 -01:4000 font -00:c144 regs_save -00:c144 regs_save.f -00:c145 regs_save.a -00:c146 regs_save.c -00:c147 regs_save.b -00:c148 regs_save.e -00:c149 regs_save.d -00:c14a regs_save.l -00:c14b regs_save.h -00:c14c regs_flags -00:c14d regs_assert -00:c14d regs_assert.f -00:c14e regs_assert.a -00:c14f regs_assert.c -00:c150 regs_assert.b -00:c151 regs_assert.e -00:c152 regs_assert.d -00:c153 regs_assert.l -00:c154 regs_assert.h -00:c155 memdump_len -00:c156 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:015a test_oam_access -00:0166 test_vram_access -00:0172 test_finish -00:0186 _wait_ly_4 -00:018c _wait_ly_5 -00:01a2 _print_results_halt_1 -00:01a5 _test_ok_cb_0 -00:01ad _print_sl_data55 -00:01b5 _print_sl_out55 -01:4bff nop_counts -01:4c12 expect_oam_access -01:4c2f expect_vram_access -01:4c4d verify_results -01:4c64 verify_fail -01:4c92 _wait_ly_6 -01:4c98 _wait_ly_7 -01:4cae _print_results_halt_2 -01:4cb1 _verify_fail_cb -01:4cb9 _print_sl_data56 -01:4cc7 _print_sl_out56 -01:4ce3 _print_sl_data57 -01:4cef _print_sl_out57 -01:4d0a _print_sl_data58 -01:4d16 _print_sl_out58 -01:4d27 _print_sl_data59 -01:4d33 _print_sl_out59 -00:c000 v_test_code -00:c12c v_test_results -00:c13f v_fail_round -00:c140 v_fail_expect -00:c141 v_fail_actual -00:c142 v_fail_str -00:c142 v_fail_str_l -00:c143 v_fail_str_h -01:4e22 run_tests -01:4e3b test_case -01:4e6f test_case_prologue -01:4e73 test_case_epilogue -01:4e75 test_case_end diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/stat_irq_blocking/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/gpu/stat_irq_blocking/baseline_0000.png deleted file mode 100644 index 30590ffab18e5deb12be845930a52ab18642fc14..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 518 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|Vn(PZ!6KiaBquU+ii&U|?{x z{qsNmo1B;Hnym>_oA=IKKFMK%PG{+y=amayKVL83P|Yc$UNGlCA=7aXVT-=? z!k=yOkD14xIsL}yU*6ou>NjH3zniQ39G*S5wqpCv-MoGwmU%1ReYcCb`1o>KP3^w? ztOf5>mpy*jtQ#kFe`4bIZO>aK*KeA(W&QeB-gmZts{j0uW&QSw+MxBj7WH4RJhN-X q{>0ypYS_V6!tEYqAjbqaH2yLz>&fNk@rld;#jmHUpUXO@geCx}Th!

sowt{Ib8((~h zt^DTd#Pw^}zCLsD;(@V=l|Nm*_RX1d7vF!te){m?iT%&*-+ExwI=cVJQ8qlxxG4{? zt*^yz`dR2h<%T=|l2zr;SFEb7SCW6)YGvVOIg&0voGvf)hOE=&b4n<&P?}#{IsKLu z@Hebn)~an-(RR>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3;xZ4Es ziwyo3`yw|_{{N2$ywk;|)r>JsgLstN;ygrhIs8Ce(>82~MoqJ+DISLr`}UnWb?{(o z>!wY9Kjcl*;TSdY5!9Zb`79V&Dk7?Fs>EfO&d@HNdaKwHyH6a0AGaeO|*u&lh;|I&9H z>;d)BXgZzCp?*G}NaS*=D)aF;_|O6C^ZBLyK@UDMkKb)uRqJa&<@$Q1kA(bw!`Qda zFpxLQ8D@&J1rKvj170lVy09L`a5SvYbRa~Ievzl z>&9X-4_TSdFMf1ebWrr4Bs!V4;7$(ab8vB z`uqE3KgjEPAP^4Y_~XZ6u4vc~*COBNi4)*QxZ(bSd1W%YcaM$9`9TJEA&gHZ!{Ie+ z>U#D4g6oUL;Ix1t|3m`Mj?V|Ph4(AQHa0e6Uf2J9exV8s_2jw37(C-~RkiJ|uFg*I zfDG*4(b16+@WJp*iwZtTid#In1?-B z|NR276WoS}$H(h=*aM4w+ylCfXBK|5LKmnvOS63*Ogk{Q6Ka#AXy`&0fCM9b)s!c_zN` zi)!*$7T;7;x>TI4IF((M-b#<%Qc2i=H)b8IrASE!c?`w zh3G@dtf*;D4i2UUhBAGRdAG(yGt(EM_rlFFpNo-Z;FZ7J-Gu7VNQH_orIe&m|Qw_*+aBA(ejd?I_52Qx6$2EI2+ zyP}UMDdDO~ru1Q=(_&Sn&{u6LydQ1hqRIh`hb*?n*r+@syk&j8T)@zk7lf<9UgO3} zy@u)WV4iBOhAKWyunJ@;4_TZ8e9{e*Wf4NdJRg4xFqX^#j7c%G>LBwAnD_h zE2Lx?<2A{4;dzpe2-lN@IS*hx%=rj!@T73nG*b>?0vasm4RqPyB*tqEUKO6#;Jk3X z2Bl+M@;wn#vrM^!LqXEdC09wwFEL(|{7!hD>BtS``5v{#*>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&I lhyW2F0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5x7$X{s9;1nb!aS diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/stat_irq_blocking/test.sym b/cinema/gb/mooneye-gb/acceptance/gpu/stat_irq_blocking/test.sym deleted file mode 100644 index 96dee6c56..000000000 --- a/cinema/gb/mooneye-gb/acceptance/gpu/stat_irq_blocking/test.sym +++ /dev/null @@ -1,219 +0,0 @@ -; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/gpu/stat_irq_blocking.gb". - -[labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 -01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 test_round1 -00:0156 _wait_ly_4 -00:015c _wait_ly_5 -00:016b fail_round1 -00:0180 _wait_ly_6 -00:0186 _wait_ly_7 -00:019c _print_results_halt_1 -00:019f _test_failure_cb_0 -00:01a7 _print_sl_data55 -00:01b9 _print_sl_out55 -00:01bc test_round2 -00:01c6 ly_iteration -00:01dc finish_round2 -00:01f1 _wait_ly_8 -00:01f7 _wait_ly_9 -00:020d _print_results_halt_2 -00:0210 _test_ok_cb_0 -00:0218 _print_sl_data56 -00:0220 _print_sl_out56 -00:0223 fail_round2 -00:0250 _wait_ly_10 -00:0256 _wait_ly_11 -00:026c _print_results_halt_3 -00:026f _test_failure_dump_cb_0 -00:027a _print_sl_data57 -00:0284 _print_sl_out57 -00:0298 _print_sl_data58 -00:02a4 _print_sl_out58 diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/vblank_stat_intr-GS/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/gpu/vblank_stat_intr-GS/baseline_0000.png deleted file mode 100644 index b8320c44980d233f9324232988e06d7510cda872..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1237 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|Uz(PZ!6KiaBrR-ksL0z|&Ib zfB*l~-Qw?p`cx*)4|r^G|7_mcV^cCG2&}sO`>!9%^!cl06|xr|co2|KpkZJkA|b=Y z!^g_@d}`3GZMysQEnm}8;a|~jTimQ-2J5>?)Usnf~VPpq*vc@zw>`X zptXzfqPf>CjugCnnA6^IQEA8OpGRtYn6tOu`kT4&e~O);j@g8ZDSKm+{;6$!lkc)Y zEoJ)O=N}|fu8P}F+$4K@_9mMpPjz(pbT;uHTU`@)y#0puwB8lGoA?f<$S5U!Kel!L z-f#1n*GE4v;Ad-RYIbfsi0R(aecesh&+JP~-{g=YvOL|VbMxjzb(Z6-Ws2S!(a=fMJ;}~>y5;>&;KXex_D>WEIYP2c8kZH^O@C`*5%bGn!2$? z{#HN3^L^>ljo-7j&W--D|B2L{f0@0h62HGK<-MM9C*rC|y`<-b_p%?GDh(`@W52w7 zQF7o`myLz!x^@ndli_uy8Q_`Ma?#-g@^;=G4n<%Y2bvpW3&FbFl zYifVD{N+D1iKFjl?7E%Z^NnLHPejdfmvhQe+Y`0OEJxh-(X_`R30Bg3GM2wES|?ff z#dz7S&PoHDGtCDb&o$p|f4XSmgIJRyxjBDs{VlBA;M-zjF+a(@di%u_k3S{Mwz!`< zz3Ri-#s86tqH-siU%y_LX2Y@Yaq}6VrI3_`5rK2g zhorv0G_z{Anf{8i&pVC3?)1`_b?IF8l(#W;OvUkj&lYW+wD#NnYaQRteVwymW5lm3 z?bH6wKO8T<_wRj+<$SV+Ok3VYO|;05zj7q%>A4l@HZ95Gv5Q5^j=XhaSTO+&k}f?tf%;>hGeeeZ*h(6N2AlBp~ zlO_MQ_sJGHZ{xr*EoNh`x%OkRY`C5I%PSq;-xdDFS?;&av_BeV-ddYCDg04lwb1eN zr7W^3N6+h*Kl*JcaWL-Z(!am&{`}2!>qUGf8hUlk~=k>1}#x@5~NiT5E~1=xmt1&fMN4GtIaONxFp?Xg8s0 zMXiOp+gN9(Del9H54#J6tr)b3Aczu#g`$OW*|5@KIx7ge2v+7n`w-ny))nojiRX8I zbM7SFmz7W-mfw%eo%{Q9zQ1!m_nbf;a#vS3W=ox(5LnuR-y2i==|{7rQRN^1nw`Dc z#zKLU>{%9OZA|Of@rUPF`^Q(0U%z(kqZck+Iy!T_{fn#DK7QflOK;zAKk?*~$B#UH zB7LKE);{88_vAcJHeSkN1u73Mlw)Ch{iDxT6&sJ84 zqt^M#f)Y)ymRD}NE6-Uqe*KeGJN=p!ZVt3Jb!pq%dhXs6W5)N&t4bxDH=44U`~>TA zN_Fi(%vMkFL4UMr(D%n%HMnkOH-pRFUR^s1+Uv6Q#M2vX%Kp3SHre$>5Vx&rW_{-^ z0_DFq+8Ge~#6}p`m%FCxp_=I(tZnl~YTe$@m-lJjXCM6i ztNT_~7o(bYD%#>H8mrtIvX$kq$0OwrZMGZ|cc1WBySTf~V{PK@#?r&tpZ>5=M>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&I zhyW2F0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vQ0D1qV{ga0I7;}*&P z|KoA{+XA$@F{WvdOK@9XlSmW__<^{lZQq_qm}YBhDg`4BA3k^P*s-pzojaSGA#a)% zx2;=ydbV!Gdent`Fiq2SsL*wc!*`Gy#38?HmucFzY3|wu9vDo}w&9Atyvh;ar&2Q7 z_{MrwMQzJUry*w;@wme+9ybi|HO(+UThmMv{8Y+uf^Qjd0&;jd<#r6F`4?Z%F_qMI7jWwWhW4+QxLe0&Farm%dAa9s6%oJw} z9_FA1ykydKVLgoDXjq}^E-aioH#KEhrfG1C$8i==KR4&P@PVrwKhMo|lS!F}tjre* z>Ga%Onp>d&`G$|Yq5u5+!h#$RD=!w|>Nrr3PZs#wHu$CqyCE2q^{$)Ej*gx8hI-INL%tB3ot>Nn>TnOXXHQ=rJaqJMhVuD9Y-(zH+Hqi~ zrqkf}_rq?1GpGutyLb2XL0`z>>J0&xfi8=iW@z@K~T zN_Q+0GQK{@?@q@;#y1eTY&AuG7Bc?xU@6Mx6=p3i-5QFr73BgGcl=#7#Vc!HR#U!Q zTC6(NebwRWe!HWZw!f0qAnd=_4F(>gXVlpCKI7#n95D-S5GXiyij>xl!PY+#wV=7OfEm*veI&g_q*l0 zyuxzCYfO%vuSNK)Snl!;ovw7{pW&Zw{)yB&yk8_X!-(rURywWExu)@nSOb3-&*DKo zkweM@IhbmI?~U@l#6!w}aMcV`MljKDv6{kP@zUzOo#^1A%2A9*E!Ju5P<|u4rjcPT zVCc&4g{#3{;1&4wp@*RxVC9eq2m;9%2eM#W5jP=l9oHw{7 zT-9MpV82)lGzjnpVcB3C#_J7s3eRtl6t3T({0NuKi(hpt_ja?@P%;w2Ia@NBpZgs zs{>4F6?XxU406dfDH+3fU9wkrzT`u~^(A4>V^|M!KFJ&WTDWSKDUV?S8f@YXblKop zjMp3dS$KYf3&Qmql%L^}e-$w`&y>qJ6eOFupYSb%iB@v4HV)X{g*=xhG%lHA4I>+}P2~M#3#6d-H{r)};FGrgwW|rHGQr z1Hfj>%J5mh0otZa$k1Rt6p8RA5#@0icl^>bGPG}f>0e~r^-Euup@H?Kf0Oa7U;2Rz z<=2*$?&x1oBu)f~01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y t5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1nwMx9{@r-tv&z% diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/vblank_stat_intr-GS/test.sym b/cinema/gb/mooneye-gb/acceptance/gpu/vblank_stat_intr-GS/test.sym deleted file mode 100644 index 3573e7337..000000000 --- a/cinema/gb/mooneye-gb/acceptance/gpu/vblank_stat_intr-GS/test.sym +++ /dev/null @@ -1,216 +0,0 @@ -; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/gpu/vblank_stat_intr-GS.gb". - -[labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 -01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0169 fail_halt -00:017d _wait_ly_4 -00:0183 _wait_ly_5 -00:0199 _print_results_halt_1 -00:019c _test_failure_cb_0 -00:01a4 _print_sl_data55 -00:01a9 _print_sl_out55 -00:01ac test_round1 -00:01b8 _wait_ly_6 -00:0203 finish_round1 -00:0221 test_round2 -00:022d _wait_ly_7 -00:0279 finish_round2 -00:029b test_round3 -00:02a7 _wait_ly_8 -00:02f2 finish_round3 -00:0310 test_round4 -00:031c _wait_ly_9 -00:0368 finish_round4 -00:036a test_finish -00:c014 intr_vec_vblank -00:c017 intr_vec_stat -00:c01a round1 -00:c01b round2 -00:c01c round3 diff --git a/cinema/gb/mooneye-gb/acceptance/halt_ime0_ei/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/halt_ime0_ei/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/acceptance/halt_ime0_ei/test.gb b/cinema/gb/mooneye-gb/acceptance/halt_ime0_ei/test.gb index d93cfc812137dab62454875cbcc8c547657c78b8..01f8b803efb8b77dace0ec76021303f28d3aa7e8 100644 GIT binary patch delta 335 zcmZo@U}|V!n&8M(&N%ra2298Zd}Co&2m=hY$@(EiO^;_ht}dIJx;FBfs6mgrrRlAK2>+86GgQdK`Uv zw#wsdn#b809*PVzPAWS5Km8AANx#A`AUOd{!r4{J71Y_7`B=p`o7VgbDkl{g8W&x^=UyZe8XK6WrS>QW2ye=oGALyR7XREv&^IJPh&RVd6y;*`_Jz zMZ7o_+(BdrA_!9afT7?B4rCz&LGa_EyJAnewhwiGxkKhG}O+w%6lyuDJ4;VJtD#QIjO2FYB; zE;(Ms?$|vX2?jPaceQR=zkTDbI8uJYEwCe+5-c224YGmD$$tzqT+UNeTOfN*VYITu3> zm`3c3Onza0_2|~DS#vT@)+suJsi@PJ`sL*2+Vg9st>*u+WBso!N09+n@^sgsAvISh zSJa_0vav?Lz4Yj|8Z(K#P-B^Jx?EO=DuvQv5lR%sW)ho75MHxLgzbAEUC`8iWY(j` z`Fe*jQI`!moz5Q!nsQ}h*zGVz#_TR_ocy}UPj;imfkYc!^0}wciN6r2@{#R=Je%4u znPdd^6zHr0jFFX190Zj~DUG1SFYL$21*7DKjHihxfx-#y$1v(tdUQC$WOJ!V2ueF# zVzL$U53-7cImJ9_0Kpx;mNF4xuJf7CxX+m|&y+yEV^SdLovHIY#yYafq+yw9DT5#| z$hJcp0;D10H*Ds<*RX>r(a_7JXt0hFq{cici{J=fN|6#lhJEBI;_KwrdCUnG6U-}2 z3MQTUHV4sLeVjBrU{dNwFvBmR!EboQeXrmHQ=;H2mAWDttWm;5MY?@SMG#_V z0m^J5%=JDq&V7%WWJ)j(GAWRB=pmk`L!TxE$C#Az2uA6duCRs{($MZVT;wafhDoMG z!!(nk!5SybC(M&H1haf89Xd#mZ9eiX_dVn%rWjJE|G7n`1(Qr|#@ee<)CUVK_Cn4K zHBh1{9#EFdoRze9YF1JSlQ-g9PY{(N>&#T!bR*O&y=-}zjGHo~HF^t!7^le?^flTH z72g{0ELkQcGMv. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/halt_ime0_ei.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/halt_ime0_ei.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48af clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48b9 memcpy +01:48c2 memset +01:48d2 print_inline_string +01:4898 print_load_font +01:48a4 print_newline +01:48cb print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 +00:0150 main +00:0151 main@wait_ly_5 00:0161 result_ime0 -00:0175 _wait_ly_5 -00:017b _wait_ly_6 -00:0191 _print_results_halt_1 -00:0194 _test_failure_cb_0 -00:019c _print_sl_data55 -00:01a2 _print_sl_out55 -00:01a5 result_ime1 -00:01b9 _wait_ly_7 -00:01bf _wait_ly_8 -00:01d5 _print_results_halt_2 -00:01d8 _test_ok_cb_0 -00:01e0 _print_sl_data56 -00:01e8 _print_sl_out56 +00:0168 result_ime0@quit_inline_1 +00:0177 result_ime1 +00:017e result_ime1@quit_inline_2 + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000011 _sizeof_main +00000016 _sizeof_result_ime0 diff --git a/cinema/gb/mooneye-gb/acceptance/halt_ime0_nointr_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/halt_ime0_nointr_timing/baseline_0000.png index de3b4f9865fc51cee35462c22d61a47a552476f8..397c780261badb891c8bb059c3a632657a3b00fb 100644 GIT binary patch literal 1191 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QH*r;B4q#hkZuFHT#mAi!Ga z|L_0wyX|j;`kk~dWISK?Dplxlf;VT=0=?I})GjjDQYb(^1C_793*i2OlX! z%nA3(jGXr8?$YQzI^1_(E9|*fzo~!jY`gDAO^bte$9KCsA1}*(`QPI7u60}Q*qpj2 z$Nqk5cGbEFAJK{5%8C!Tt(fq0%7e?3w#5F3+x#PY;-ab7-pXyC_kZIwyFH(lC&k_V zxmEkGnY;FK?c4UE&Pz4kSLE)0BXd3Lecz*``3mJ>J)7O)f9*f>;-gx+!%U3ppX{HVvH z?ll*cf3(T|>+-qNx2}!1;*{l%%>4VRUoGTM)M_OZUKUT6ztYrcKUw8PA$!~fezE1B zW#-uThcj%|I=A%I=eaWsR_?c(dak%&?dl6&YbQRsRH0cG;qGL5sr=><9;?+ap4u

M`fvFPnKeDY2Sc@2Vz;fBC(NarT;R zU(FhpbN^7z4K$-R@NE;Cije-Ymo-^`t7epH74TzqrN zeA(wkGoDCywLf?0tNik=$#9~?Y*UDBodxwPee zvAZVes~$6LDpb5)7;;K`>-uE-zS_bKdw1OVaewK*eT)D6Jhf!UtzWmlT%OLueCP0T z7V+1I7l|hC3|uMJzi{iPdn(qfzhA#o;IPZDH2Z%qHX|h_ca>M+&WZieEA2LhU((n6 ze{)ey5nrAauAOy_0C&9t*VS84PAo{F;I^jC@BCf`!N?VEUi_LHw4+HSu0?fO5V zb3yN#?}ryXPLKa%VeP%4_I~d1;u+nZrg#76ACL60_nY&XLrSbda7!1PK3Wjsbree0 dCspM?rj+}el&7)pUkNIJJYD@<);T3K0RV5UH(3Ax literal 1210 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QH=r;B4q#hkZuFHT#nz~lOI z&A{_cOO;l{C0Jv^xdr|GoL<=))mzCvtDwxa$o!_pEbrFXVz577XH2Llq;+& zn7jX&nw!V$&lXc9*0PkR&fn3uF){nJe82kNxj&~Q7&iClyk0BRZ+vp|zQ88aiLo!= zA6`E3YTO@}S2bVKQ}=eJ>(65lTgrcI^S=wz_&0{FF%Ha5naeeKV`oRK^!CDU%l7l{ z$!k1ZhvG;26>)y4@`el*vB(wgvNMW z6}RqB53H}%Y`*?rh3APVWz{7gg{&j1GV5z)n?t`mwvYOMX=aCowtw_J=|pSgdL2LA z)<0#Z7YWVz91#8K%k}Gp>B^^rv)a9nt$eY5hEDA)`FX{5-#ost-ec0)ZnlZ-k&f@# znmy+uJ0{0jdWgJXZ!WI4-|-^!X^s4ve-f8c)9rUiugw*@l*W1H%idoH%_jf#uCB~i z$={Oy*YoXF{%t3VS13L{Xm;}V!SDVze`Z}0yVI=m_kr2UpM_1Q-L9p~$>p6NQ1(rD zg3lpfV1GYi`pak&E< z-zPucKYPcN?&^!T4Ay@8SH!ob*dSDeC8lCtl zM{}Q)&G}uhZc+3RM)};GflcA!3c2D@e`bFOUiIj<*dyiaIj4F5Wb<8qm!#llpttTI zb7;xlz8SOXIkttgz4_bKSb42I{dn2&Fq}@s?g8wg=l=emonrsq`tylfPyK)OFBOw} z9<=FC{e~G=YSy`?{(5C`z3~5kHObDF5dKG>PaWSr`Q`LGW!|^``*u}bx!kAXKj*c_ ztrNedsaJhIZuxuizv=sX5|i!sTmRq9P*!aKl9dwcRLT_fU9=#fKtn=?i>-UkyN^xFwO=u_o zpcVxMhSSa(njp;#K*CCa;X|YUhpwF(JZD=$E>u)t5Rs@C1+x4>Y9+XVECmQ)IPDGA z=myi+;Qyf$RU>wN5a)nw4h9?G1T&!7|3eQp1L`qsjs|OVhG}f_|Im$1Bf36>&BUlU11tq{6F;K)`-xDu(=p)fCtQgcK;6(2pItMKQOSW!5V#F z8r%Fo^b^tu(s#JPTNoT^j=;#30>-K|nCAxN2@3{qKXzzkY>ZKym_@gtM!b zE2y(E^Rd>8amewiiRvjiRGjtnt_0#LAg%`D8X&F(VhK?PJ0~EGh8!3q{;q%E^uYOn z_X96rmUOWD^T7RZwKvGtx)Tr!PwzYVfYGk;0n>V01|U%QdGZ7O)7+oWT=LuKuqtVl$V>Vj6m*tAWPn9(dvun&So1Z7w8MZ~54 znZWML;)~J;iw{d#9|S?N>O$FlD8m+|!!QVf`s5N8^&yHBRJ36?_1tqa7mNF_Av4_X z%elYroI6R%WmYb;Uk^}r{kxfOXm88k)YvlfElmW)f>o;BGpDF-O}*I`w4Xn^_ikHb zwPFPAvqpzagT!0OBxAKM8yxpVvZvOGtJjPBv);z6w=3(d<_$jU^)h34)om<~HGblC zxL@Y==^H%K7U*j23vTG#)VnoK^ndA>%!`C;rT(}U*56OUYC0a)KL}@mw`yO7^|w16gOn-ZmBp2eK^k<9;0k)a zxb$h$?t)XPj#Njh`Rcx8tU8?hrtO=)z#q>leS2&=G61nO5#1~LVA7V+QlrEOIIJ@*1acVL9LaoO> zU(;-HfR=m|WVWu^ll2~ZYTD~F&%xCXmsXG2dlKDZ%Zq`=I{p%%`d>H&JeA5MbTUPE zrx$gR-@d2ZA1@KcWnB z`66x}n6v1yaYBEQdj*pKv%_cpA$`fDOQ;m`2}*?&CsUL4oLj^#Lc$7aHbQ7%AC4mu z0+0~#6V^+=nXnm^N*F?^65K<8G|^+DgdUVz1(E?W>?2QsZ^6+undh-gF)yK1Owskv z5+siLC?woM$;Jqsmmi3PR!Hdb6COyv8SoU93V0=?rK<$@1TaZnjL*`9hHw=S%obpF z`pmfWo6JE}in$l1LW-s*WW8wmGz1($$+Co=5GzZ^gmy@X`UyYC9nFL*s8qrnN|oTA z1Lkk&F_X{*xm7gX2FPw7`B?f*. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/halt_ime0_nointr_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/halt_ime0_nointr_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0151 main@wait_ly_5 00:0167 test_round1 00:0184 finish_round1 00:0193 test_round2 00:01af finish_round2 -00:01e2 fail_halt -00:01f6 _wait_ly_5 -00:01fc _wait_ly_6 -00:0212 _print_results_halt_1 -00:0215 _test_failure_cb_0 -00:021d _print_sl_data55 -00:0228 _print_sl_out55 -00:022b fail_intr -00:023f _wait_ly_7 -00:0245 _wait_ly_8 -00:025b _print_results_halt_2 -00:025e _test_failure_cb_1 -00:0266 _print_sl_data56 -00:0276 _print_sl_out56 +00:01e9 fail_halt +00:01f0 fail_halt@quit_inline_1 +00:0204 fail_intr +00:020b fail_intr@quit_inline_2 + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000017 _sizeof_main +0000001d _sizeof_test_round1 +0000000f _sizeof_finish_round1 +0000001c _sizeof_test_round2 +0000003a _sizeof_finish_round2 +0000001b _sizeof_fail_halt diff --git a/cinema/gb/mooneye-gb/acceptance/halt_ime1_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/halt_ime1_timing/baseline_0000.png index 330cf4ba5be0315037f8db93e7e7f923d238188a..cc658adb9c9f548bf1cabbbcce8e930968178169 100644 GIT binary patch delta 945 zcmV;i15W&g3H1n&B!4_fL_t(|ob8>_mZKmL1#wUQ|CikdcZmmSL}-)trs`!9<6vtE z3be_xu4@8a{(L(CxEBPAgJ5wGEDnOjL9jRo7Uz{xT9zfhcj*={%R=`$2(Rr=_EESQ zb6;IE7gc;(JsSqLYnA`wEbF>jNAoCqe;#ZrTY7pdCPQRbQ#iI-?}6&lzCadM z8dr_6@_(7x^PL(KoY(m(HK;L9f%+#7BU$1gSR4e4gJ5wGEDnOjL9jT31088Mp)?sm zb!wCm@9r+8#>C59faTpA%yaprAMP@?AD@2ZK%Y@}JXe=XN301iwb&-=zpoM@}x4d@Lcp-E>n8j=8Hx zyxMKAqVC|EH(5QkcDQB~RsW8@byiy)fD6LN;d2}UOkcgp8i+F;TIT#ZW+e`KJaawG#wTA@0&MmV^ady>ZKG@=S zYj7vG_Jd(VxgUIblhvPEWEB$sCX4zZ4*g(p26M6+ZwE@d=`PoOaQL|6?Yr~{1kH<1 z@y70}@i@*m-^A>EaCNsQ`@wn1SZw|DpF?5&ois8#l9l|PH2FN8aX!~>irEhiNN%g5 zT{upOm=~Q3xm1)DNwK+sI2#w*_Iz^$Lf0FZhklbU1Q&mA!2#zrqs8+?&c~vy;a0C_ zbs7W0j!*x2mG(Hw`S#9K(CYHW|1S3L9p%?ONpaTt`|{Hh=HWlay9Qes3)R^kYk8wl zt)4@x@w-Xw654NzlVCnO^U?hK?ZU=^vr=lR%NxgWFV!b@qx|afpRLL#*WgPR;C1x- zt@`I>ua*k`;}_t>e6T$9gOe=;D?^F$ebLECh5XrEDlejZUv#x7?9MYNxSh=AA_luI z1pVD49$N7t=uOtTu9M&O4jW%?qN~rF6ra*i&%ogmCukE5UXvjNPm>%3FBbd-Y-O4f T-jQzA00000NkvXXu0mjfbZ^^i delta 944 zcmV;h15f<*2!;ueB!5jwL_t(|ob8>_mZKmL1$9pT|Ch55nK2xpTf`>my;i+!Via3y zK!HwneLkNH=<@UJ0AMZ%76-xNAXpp(i-TZs5G>APS(bHOxA*0+xZG}iv>QgBI%K!= z_Ni5f6{jE4&3U~3DJ!w8pk`&2`!x68ZL|)t3bD@X9O8s@b79t9i?Lepsp@O);~ZGq z>W`0}f*KwXL|2}Zv5{GeJ_{)$C^oK{he_&i+g zqMKa2PA41WVo|3)wF1Z~(qiNx>ve@2!|Si*vAce6tiTUr#h;2P_u&4kZKh#3SwyjP z#_7b9KaC`R>E9hh!8ll)kuEy6|FpWekghK_kEfXqyuHrZ7Y^Qoqmq!V;a14_GB#Pd zndz7R>3Xn>UjMMhmz{+)v+}I%XCpkEIXP9bpHrOE?lP$b=e*RKsD3-Ds2P0oA*-j= z4!4Y5)1NW6-sOkq9KMfKU*Htr^3{i|fjF0{XWm|a=WN7D?;H>X<6v==$H5<1mCD~m zE02ShxJqwcuktw9C&M^+E9%9SI4xeW`BMU4XUb|)o=Xi`54N~(3+`mdw&xo9g5*m`YMqQ7%J$LlN-_oOHv?tdSCyXf`rhjZ$t(`*6Oc59J%cJi>5K5fN$ zANE~zjkVy@-0rmC*$v1#g|lFF2Y!~K`PPkitD4U34i~?pFm{T8IK?=)2M=@@(d9nP z(oUr!?;77>m%9^57k$U)j$6SvlOY5vKb$PT7hM)bu4^D!elNON6n3vODA>i!??LZ_2@m@1 z7#{Q}cKknm?X%(scc2lQFEZ-eO%zbu7uh){*N1=ThzDv>P+&Oitf2|g%m5^;6c|1< z`hV!!slju$732p+1qKm`dQl+DAEZ`-8^}_C0EW}vV2y4tjSc=EI#D%Z*9UP9$mU?M z0ZuRjn*BfYU^Ac|!{%tPMrWADCjSrJ*fgT+L)e@QHoygDK&$_UKHLV>Bl$TStkD&w zvBm#GFK&$peF&S2!3KE13~2ZNFoBQ(K>q^+s~W7)2d1&j|3g0^jUau83%rHFk>&`D zTq$6zN`rZBP@b?b&}k3_PACeT5en*IDqK)hxFS@*6nLO0@Ih8^5}588k9r+_de+MO zteW@P6mLa_87CDT{-6H$!R24S!Y?2>0ZhW#Rm&CB*_ioQ>%} zIjP9dz{sGm{_qU%ucyt=MtFZb9N}HD@r0C;Ft^0_a3HHniCf|a7xVHHN)kU0o?YmD L^dvAx2bll>EC{aH delta 1445 zcmZvbOK1~O6o&7aBu$#6w&`dcD%hJSk|Jn}V5?wk+NMd&*kBXv!i9(n7Zo?+gSI*W z-H01sU>73Aji5+qD->On!J>2+20>6)$}H4H6bV$Rjhc8LnTth3X1M=9=YIb=H<>~~ zDiow^hopyaa|RyWfMKnz^Jg&`bKA98+4jUdw)d>t+M2TVq^w#djHj$y5bmp))$(BV z3a*g*HC!3LkAn@ab)Gig=B8~Mc0`c!8}5J=RFz;pk;~(ucv?*iqPBixx!b3IeEs}; zcePdw`}A|+Mjd>}T201KDX0_2biY|Vn3|h`ow3=zvR6Alv(z4u1Io%MS&c^m$`9%+ zV2`{dpnU5w!l(cU7Z+EPVN``_#8#xgi%WkuXf7Bi68?G z@)Yqka&&d(Br6llt4s51UUI)4@Qx`F@P$fE z5eeoPVWJEjUrHeGvz3c7-GtfXFeBWrGrO1)%>7IXByDQzBuSNs(Yq5awg%Nh*Q`zLhrJK#Dmal6hf#E%3iCSH2hT*bw^yvijg$CtnI4Vr3A. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/halt_ime1_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/halt_ime1_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0175 _wait_ly_4 -00:017b _wait_ly_5 -00:0191 _print_results_halt_1 -00:0194 _test_failure_cb_0 -00:019c _print_sl_data55 -00:01a8 _print_sl_out55 -00:01ab test_finish +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0168 main@quit_inline_1 +00:017d test_finish + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +0000002d _sizeof_main diff --git a/cinema/gb/mooneye-gb/acceptance/halt_ime1_timing2-GS/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/halt_ime1_timing2-GS/baseline_0000.png index ff8a0a6848d16e122de0249cb3cb9cdafb6407ec..64dad899539251703b7d086149cd8475cd074b3d 100644 GIT binary patch literal 1213 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QHor;B4q#hkZuFHT#mAi!Ga z|L_0wyX@ti?h8XRlB(BM%~X-f(RGZPVR82J9Ea)l26La zw9{OgIqOsP^eq*$)GobNsF`Me^Y}5}*}osn+PUKFrAId}Y`7csQ$Kyy^POcT-#1-< zesEKf?|I4Yl}eZHxzBhj>)QgO-E6jdbwh;@>;ejznV4r?4DjfJNw2R_4k}tJJf$DxbIHT|8`jPSi!?k zw>kB{AD%v^(0)l`+TP^w@7E&sKR+OA#{8Unzg3=W`#rT?9pQUl>c1-3@i|51qwBQ{ z!9UHibw?ay`q#DbR-7>Xap|6(X{o*ZiCV3M!prLE@>iNV?I)|esAP|uz}|hig7@6| z_H&Eh?ceaz&qrd)dj6#!rDD8ArB-}BcHaNFv6r0GbLFb*y}n<*%s+hdT>BNiuJaW7|e;1ejyb<1g zYrYAiFZuP;-)-qa3+H*Easj?oSD` zEq1>$lFJdc;onz(>fB<^=tARDl^+t-yKN-o_$xP9=r)=A2B+Hvzj^AXUFG$T^G%IS zb6&~rf@1a67MZ$Hb(zP7Z|1#{=YMCp__}+R?T^pKyVW0WdCYmQ^X1;jQ`<__>LLK&ySTa|Mj`= z(`)0&k9w^C9Tj}KA(_GcaddO{+r+owDOvNSd$T^u%+fyZyUBaQ{XD;>_P)neAK%|> zJ=Umw?ai&{#|mS-zjp2os{8o)df3zE><>%1Kh*rKbl$s-1^JAIgXZMTe$}e8ndc3n(;E;AMb*z0vhZ^6;kf0} zEPkqT!(Z#RvrBDPcZQv7o_v45%3eMGZJm?jpVjQ$wq^4lk=uD(zwfB5KXSNF#c$4I zj$0?Y=Ev(D>EFDOt@`QoqxWNP=#-vp?tTh%jEv)9CjBO}iw{`QvJWt)WAz!ug6HBd XPU1IGbu;_~DwaH5{an^LB{Ts5Dr-pK literal 1231 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|U!6PZ!6KiaBrRUYxdCfycEl z?EnAi&+RIXZ<=z1!PA#NeSc4~pkT{Z>DQKUE#A#%DQagowa26Gm7eao?Ek^xNwJP+Ppvv_a(aH5 zSG$MXlFwT08bGPCEW;q~cdPcLNj^QWI;yN*=Ue!*yG^r2mxM&-Pp`P+Iqj1d_q3Kb zoA&d)cf9uX;q@i!+^a*cwMU#wDpWXOC$aw5{OsQu-?~awy_(kqCkOFmF8Y2f+`jtl zdgl4j4-EKF9I0VoAtE6IcKh?vc$Wi(Y5RBXsmS4*xeg_qI~mK(|oCXUby-G z2|~(D^$(i%FA{nkdU^|AyG`@%b!GW0m$OG3mTdSe@i%1CtWV1)s_cE=A>Pw`P_l+i z{gXEhTEjqo&o)I>T&(dWfMxfa+@YC{r=l}?XFZEpQ1TTI-e{~q}D8vp84f- z)n%0stCy3TD;RIPPL_RQaih>S;!}I!2iwBJg2J_5wmwRj%TxH_;mN))EAL*3D%{{V z&$~2||C*;9yZ!u4pRX>--NAmM@WWe$?m~l~RTAvY#!4SnX3y$LpSAeT+N5KjdXmfP zo78s2R#Z&5>JxQZEdJHMl(6k**0Z0#bFtLdGe3|s^!khC@BBYGo_XUF#wqPnr?BtM z*>mr0Rha$DE_%g%e0=v)XU@MHl@|KDW`^(i`PB9G!VMSw@6LaGc}}@Q&~|V@K~fh| z#6c2WrGKc`-l`E&hxdF>E*`ay1JLWZg02TaQ4t8sTkvn zf3C56|1AA+-!;Gf{-oVzbJMs3rsaR->0O|;uWH@zoqW&ret8uibicKJ%YzqeDs!Da z)eF{nU9DN)`(uUF<2u&rlZoq=OMDRSnVtT@K|FSPX4Gc=gVVee|L*ZUuJiO^WZ|8S zBEUGs;Zz*LmH%olR?YjIvT9!PKED<73vK@F%h=oJ)cgFS@s#KF=AM?V(^ZZ>E}z_^ ze#-6AecxX`U9Y$QuynrUc&$dQ*m&aYxql?DOWqg%yU{UB&i=8-E3uDCnc}{C9QvBS zewW~j{=H65%92m7?!J4J9^bW-!tq}B!|m+mZiz2i9ewFv-lXsc3#%s`KW{OKZ_}sa z)2)C0mB~36_i^dJzjuFrXL|AYpiSMeiC1(Vxn9znRpAKBQrkS}y8o zg-Nq44byd$x*|9WJiY;uPm~3dON+79GK3>Ih==hI9>pVg9FO4%9J1u$Q8t*2f3)P| z5jpt+m2o*)hRT?ntRz@c9i4F}SRV}!DbU49FSsgOO>H^jveh=CLc5q?LkhMHs^_oP zIhisQeVG|Or=s!9=y?_Wz5|_I)Rk6*iSFxbE71q?gruZ&t@qq)_xe2DUL?=qE_K65 zf^+86uw0wh>*@Bjci!28?JobEIbYQ_db~cS?RxudPb(55O(fU?5{5x>hxwE&Mlh5! zi1hPh_>K9XG$?-omO)320Rv>b%r)jf#;6yHbBeG^6AC;TN*89n&EOGF zMl%@%{_A{A5jr&CL!OLe67JNcI^R$XoSMNPPsVpQ2yA=jTZ*t!6AtiXYwcidKF{2Re`?7$p$ z!u%I@KzZEfM>Bn^Bvixgd*2Lu_8`+oWdHwuZlgQ=@dB|y{h&~$P z`j(4ViYo>?Kb#O*Bv6QnL?^k`_(iFi`w?yCdR{FQnF?}@Kbs))n{tf5vUSr7Cga*W MX^M-@VqL?9e|2d8AOHXW delta 1836 zcma)-UuauZ9LLW&H*L}+ZIfoJmk#W?nMhu}kjd ze82a1KHuLx=U!5)v09CNJ4c!M;qr5IFFn5e3Ox`x%UZtqdSh5SL+`#tHjXcU0p>k0 z7le7GYyL*ZjDphg<%H>HSjjYvfxJt0j(Wofj8CAjbbBITUcdCyUlX0}x)w0s)&@)( zAkJ1U6>Wx1aO}&ek!A=-SHT;?(GBnhadd0r*}U^e-gzqTY!@}Y;uxPXZED-@v@)F! zcpI)C@%G|ZJlwAg^^FD|9(;7~<8h+iqhB&7tgE5fbU{DN^J%?GMyIV^q-zfbx{076 z2`ZP2=jSqfq6d~#9;mBHMReuC1nY?&*3$i0FYY|zsb1K@9@ysnU^}dzCF|TDEcx_z zQ!T&o&e_eecr2venTOG0Jf!|DoORw8+aFT@JY;F4MhUNPY~?i4p{oQ(urcp#{W zb*tW(Zp<`_jiae(V=DDeBexORy`#1K|16!+v!hXB($jgde8F-ySEy98z!hB#zK5N|q+HBySw%q)p9IJ81rphys+pDt(QUJ?gkY-$dD0Dgr@`&{HS_Tpq+O z0&@jDHcRLkIae?VFb7=bkJ6V+x{1m|{)*B=ij`@~dd>}ES0G^vHJc_>If{=X5)?=X zy9xWG-%WT7m6tGy(o3*k0Hlr{n<4a=oGOqEkRccOI`{@GU6;9pWghc1N{=bJ{#=5@ zQojrd-=Jg}Lf7OCk30LJpz;E43Tdcbf_(y*q$nPrWeE-9ND)jQFb7>` zT>4#R5|zh1g3?2ZrpvNkH2nqyyo8eF2|Xc3hKdP(NQk%z@5>q8gpW~q39Bf*1p6c~ zzekVhgs#h}qUnA>4!g+9((fX#p+ck~-nrYTJtlN*X^~o#OwpF#Y2~b7ha`M)MZII? z?4)x*x07lJzKC1n{iGBguu{XTo!}(9;J=WJTQQo}#S->&o`yEWXS9!2U2C>$#bOW= yqp#^kw|3gAHQd^n-L;>(e#R^P+O@K~OV7K0-YdQ2TJSG{O<@Pt_Bp1E9sC!a_)u#A diff --git a/cinema/gb/mooneye-gb/acceptance/halt_ime1_timing2-GS/test.sym b/cinema/gb/mooneye-gb/acceptance/halt_ime1_timing2-GS/test.sym index 87bc44d5b..40b96338c 100644 --- a/cinema/gb/mooneye-gb/acceptance/halt_ime1_timing2-GS/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/halt_ime1_timing2-GS/test.sym @@ -1,195 +1,87 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/halt_ime1_timing2-GS.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/halt_ime1_timing2-GS.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0151 main@wait_ly_5 00:0167 test_round1 00:0183 _delay_long_time_0 00:0193 finish_round1 @@ -200,38 +92,65 @@ 00:01f8 finish_round3 00:0207 test_round4 00:0221 finish_round4 -00:0268 fail_halt -00:027c _wait_ly_5 -00:0282 _wait_ly_6 -00:0298 _print_results_halt_1 -00:029b _test_failure_cb_0 -00:02a3 _print_sl_data55 -00:02ae _print_sl_out55 -00:02b1 fail_round1 -00:02c5 _wait_ly_7 -00:02cb _wait_ly_8 -00:02e1 _print_results_halt_2 -00:02e4 _test_failure_cb_1 -00:02ec _print_sl_data56 -00:02fa _print_sl_out56 -00:02fd fail_round2 -00:0311 _wait_ly_9 -00:0317 _wait_ly_10 -00:032d _print_results_halt_3 -00:0330 _test_failure_cb_2 -00:0338 _print_sl_data57 -00:0346 _print_sl_out57 -00:0349 fail_round3 -00:035d _wait_ly_11 -00:0363 _wait_ly_12 -00:0379 _print_results_halt_4 -00:037c _test_failure_cb_3 -00:0384 _print_sl_data58 -00:0392 _print_sl_out58 -00:0395 fail_round4 -00:03a9 _wait_ly_13 -00:03af _wait_ly_14 -00:03c5 _print_results_halt_5 -00:03c8 _test_failure_cb_4 -00:03d0 _print_sl_data59 -00:03de _print_sl_out59 +00:026d fail_halt +00:0274 fail_halt@quit_inline_1 +00:0288 fail_round1 +00:028f fail_round1@quit_inline_2 +00:02a6 fail_round2 +00:02ad fail_round2@quit_inline_3 +00:02c4 fail_round3 +00:02cb fail_round3@quit_inline_4 +00:02e2 fail_round4 +00:02e9 fail_round4@quit_inline_5 + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000017 _sizeof_main +0000001c _sizeof_test_round1 +00000010 _sizeof__delay_long_time_0 +0000000f _sizeof_finish_round1 +0000001b _sizeof_test_round2 +00000011 _sizeof__delay_long_time_1 +0000000f _sizeof_finish_round2 +0000001b _sizeof_test_round3 +0000000f _sizeof_finish_round3 +0000001a _sizeof_test_round4 +0000004c _sizeof_finish_round4 +0000001b _sizeof_fail_halt +0000001e _sizeof_fail_round1 +0000001e _sizeof_fail_round2 +0000001e _sizeof_fail_round3 diff --git a/cinema/gb/mooneye-gb/acceptance/hdma_lcdc/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/hdma_lcdc/baseline_0000.png deleted file mode 100644 index c1dac62b31a1bc8cbfb2644cc07a1f88e28938e1..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1165 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QHlr;B4q#hkZu@0P7r5OCY5 z{r>+cOYxT*byC$%_|K_%Q+xS}kjzb1$7L_S)z}HY_*7iZU?9%Y-JDP;pu^X6)Nz9a zhuHIpLASQ${CX)se2t{F#Mv>-8&@pYev|tl8tU@z28r zU&U4nz20*!dd>u~bn7n?tJ&kT_9aO^?@f>X`tiz@{YLe+J8n4mO^%fn`hI`OtWSRY z+g##S)yw`;-Oe!ng^TVB0NO73~cE!OYBo0s3- z$!W3VuD!r>8>z#e^w<2$%HB3-_U&``H)gE9c~Yn2<&N?Wy`cQ^GUlJ6aaOS(7T#Fo z`XR^gXI{dDyu?&zm+sGJrc@U^y=rySX};(A6+NFtJNKK)UCv9gkC3}|@R7;A=I_`4 zGB+3>`Fj6`+tZIa+xg_Cw!HBP`c?egP1Rc;$lbcH##&lFW9iN_aYglek67J!FUh!m zv&WpTzii&kNqKsDiD&oAzqch%UJ8CJe{`;MNnG^D%H_pf-czHemhfHt*`IXFcTMxt zL|GlbJEa9H{w8S8+vsc9yx{eNfZqqhY~l@f&ogof_lx{2wlQtV`F;Dv?))=WK6m}~ z+=jBtOYSbQm~K^I|KrRq+Z~f;#Yr!`y69+e=Zn`5R!&~?&*HKFrhRX|3$8n46*0%U zc+(oik}JPTfBfAPk@&%VYWXwQVi)%l}eUJje{xp`3PyXqmTXg z=iO~w6MW?Uhnc7RPwjfYQ~14aaOIta`%;XLF6k~Y^fSD7r&+q~1uz|Nn>BAr{*vdR zdu5CGl_VF1&neeoeT|$c(A^BqDM*5gYT`=bt{#ZF-uTlh`0*U~Dd)TO!c4b*vMBUh zTG;XJ^PKi4`g|di-thb8uDfp)XwvlW{*v=ccGP*#v1OT?@-^K^TzF@@u>E7JQ_o$O zTdPGDKAPixVMBt5V|#`KD>P#wS%=82G#5N)->V+{;K+#+rJ!QQ)78&qol`;+0QdMR ACjbBd diff --git a/cinema/gb/mooneye-gb/acceptance/hdma_lcdc/test.sym b/cinema/gb/mooneye-gb/acceptance/hdma_lcdc/test.sym deleted file mode 100644 index 1ff5bc335..000000000 --- a/cinema/gb/mooneye-gb/acceptance/hdma_lcdc/test.sym +++ /dev/null @@ -1,195 +0,0 @@ -; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/hdma_lcdc.gb". - -[labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 -01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0154 test -00:0161 test_finish -00:017f _wait_ly_4 -00:0185 _wait_ly_5 diff --git a/cinema/gb/mooneye-gb/acceptance/if_ie_registers/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/if_ie_registers/baseline_0000.png index 020e83af2dc96bedf32eda6147b0817839b609a8..aabba227471ff785f130f210fa31e9df03922659 100644 GIT binary patch literal 1223 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QH+r;B4q#hkZuZ_iqyz{6I! zzwUo{nSRx@!l?>Q8ISLWnqNLXV;f7a!LBv0XE{u_FIQ(McHCgWA;y02kwSzFOLucZ zVVvgD)W}c8(>GN_ik*6`u;*U=rvACJ?YOr?SMBiW)iG877KzHo{R}LOy?*`r zy06zQqb&ax{9T*0%H*l+`nQwkCa?bfE<^9D?2~g|sp~I_|DP>+_g<#q!OFSyOIUQD zXuT^RCNm?G;-!-*A zeBS35Zx-F(e_YBpOFk*;Um?%Gx|+-bs|^2LwOLyu^Lftk4Dr~Mf_Lr8%MZ^Do-Wro zPi)TY{H22Z30o)a&dA&<_({hoRsPPu?6rmW&!4%FaelL%^3xwxGEI5q4_He#SlGsH zd2jP-<=3UBkFuGY6ZVO{kZ1#JDccblaAV)dv)?<$>!WYD|>@} zhsB)Ue(Up@{_f?syYg8Ry}0{+2KVz^d)=RLuv{+1cddRoYt@;{KJpLF=~YR;oz}dj zPtVHst%7#adZxYr_HN~}*csX>{3j&!f|Z4(tXSpR?>8S``#j^4D}UeS zXW=nMlJfl99(DAyhj(n&t?p$%{?j$QGlJc|)%}V5UcPN&7v(I2V~!-q&N(EX!g}}J z0q$1`g;uWTJP;(sRnMV!LNQcRl}XON;CraoPDA zY6(Im7vafFK!>mCC@k&$;aYdbZclf{Pn(IKi!V-h`(pL%NVp$I_1QV4J>M+8J-*Sq z*|ckY_`cmYzFVK_k5)SxIsg7K|Ns7cKmFFvye}5>hJS6K$m_3O%cJhJUAwfm#!vam z{C8$e?R`v@AB*1~I@PuLpXuXQBGcA}%)it786KcLe{R zEK)T3rNoSWsQURz7GLf?9JgGX#ZQ%Pc>i^d{4H1Q>jzK1kDs(}9p5_P<@?Tj-Szcd!XJ^_ zd0f@^Rn{L`JkN6u&;ef*wCiers@2U~JpGIO8vX9;u{ZX<4q_L740Mv5<7FoOrm~9< kSP|il;u%b*0|Uz}PZ!6KiaBrRUYxaBfv2T# z|Gxj)-(yPnPph*CPO|FzeE-e0Bp=C6m!REy@4r{6__^~IqhL3Snmf~E<;If}4?OWm zC{i)7TtDT~w%nhkGsULgUc0?4^UKQEvfj_TrwN`uzt5Zh`PZMpWl1+3&z{q|ZF2j) zS=86K;%3kjHQn2lA$40jgE8k^rd-*0}wduR_9e>q7n>Wptz4CI?W<|sKp2}~n zm2U`rn)3Jg2lJDw^y_?2)ycd+RWyC#;vNful=(g3KNrc#pIs4Aw#fA4E#774^n8C^ z-0|)6n!nE%ycV-O)r@eX&91w>H7k=hyay{AV=ZDF zVq#dnyedB}uW$c&2G7O$=aY5s_N;%N^M7S;{lEAa*{oakua`gVUp&8XP1_5#$Ipwt zMBd-tZ~3fdrsToOA8c#)M=gG$<>sc_G~d^0-NDE6uSI?T>sNVf$NXvbKT=f|JfHi) zsnWpGSaDapzj3;*#{QC(k0mv~#o4&XOunA5Ug^n&KbJN}?An>X+)TP%az3B`?SuVR z8n0rG`(DpCpZ)azTBXCkbOoH;44%2KjXZNb->_-@oRrpQ(|5DTem1)-zQf36`Zc|o zDZVW)O1687C4~s~Y4EGDoAdk0Sw{RUQoZ}?2IKxv&ROj0%QGj2?{{AxeOypzk@)q< z&tl^K*RD6~T0ePxP`2P)>iVwl>Gw-Ryp`F)phZMWNN9qs$BpEsukJ*Ycp9$1oo_o;)% zuGOFKTHQFHwYN%Ld+U+7^ZNTQ$G>)OylT4G^P1uI6Xm*k>$>}%8MMZ(=|0Bp$|>05 zWMYXLY4G$`zg_G6v~yQ(yI(8+y;@}F!4unE*Ic^$EA{gK_JRWaTfe&2e*ORORlw%L zTK^rvI<+qjd;EU>L3)w-=Q~me(SO9{4lxeVKo1vJEqOIt!oy3+i!QIWqyiGOtZRE$<1Y%Z$mUc<$aKCyEAtJ z*G2z1sJx$ggTe~DWM4f5cpqS diff --git a/cinema/gb/mooneye-gb/acceptance/if_ie_registers/test.gb b/cinema/gb/mooneye-gb/acceptance/if_ie_registers/test.gb index f0e497f6f96c0cdc489bc03a9b7dbfd44791be81..528ab11c401c2e6e478ef8de57d039fcd7945b4a 100644 GIT binary patch delta 1071 zcmZo@U}|V!+Th2?^w4Z_0OLaUj{i@u9{p;_@L>Iejt5;2Iv?~r=zh@mp!dOq2mN*o z4|)_k{-3^P_u@e}h;h%3@j)Mm@yzbQgI*Bh-DkxQ?uR#cZFXeZZ#z+dbCbgd_IkmF z|7Q!l&#v$eN=?r!E=esaW&rVlNZSiYe(2b)p$n9CEG|whD#^^xgG)PkRBhJ~g6IuN zEiO?=OU%qkO<_2>KKw&RJWz{*0>f!%4NZ_{1|VUj!0@5b|3lYK4W6^DAPW^07(^uM zMS(1TkXi|DAWH!P7*2bGHM+qxHu!(&MAe90AH+Ezn}fjyIKd2P_W#g>&479go1?)R zonacA{6BPK(}=DQVRJIr02i16t^ObSa2rsMI~njMV3uG!>UH$#Su5|eYTjp4ycHQ{oK$r9fBN4C zmw){VzkuWfFbQW@Emu%yW9DP67vqrQRTI@ya;P}#>0JrLRX|(~#5F)%3&awl4t7pJ z8VxxxNc>&@!0CbW1Mdf3c7hKa?EXA(KV0n%vbF96#KP12PCj6?Yka`8-j)Ff6n>t3 z#{ZAYg6SChF$1NOiUJLS46Y80AJ`A~d)GdbeF!!x|Uo;E)l u;r;P&gm=Zp6H-dT+!EizfvhSeZiydU%*#(GN&Gx`cA@vtlfWDuWC8#Nxu|~t delta 1380 zcmY+DUr19?9LLYO^UvI-ZeFvCLY}RNMG!`i7C7B>ZgV#m+sKC=Bzow<=p~|1>kjHA zd`Wu9r?6gvAeI?OL3T+JFPBRYXiv!=N@9fw73QefIlr@e(6L?4_j|wR^Znh!ZZ0R~ za?&j0 zesMeIM`b*NVAZ>0-df)5FW)64dc8+V=7NzgL<)U{WMMGmEA)o`7GjIuxOFIQor+sK zNk5ska&bT1SKhsC?1@G^HI9br7UzNb!~2c}kn+!mbUYciJgVYKM`MXhHk!^Li>U0| z#jYi%J|FDFdC0iKnM^dDO{9iID3};$=_*`3a;zvXd$DJRuq~GqhnFv=l+uF$j;t8XUC2 zV>h&MztV67lxXMzDH_c46sdwI^&xzYZ)He{BHcFf3iUO5bQR_V!~}B^q+qhCA94^o z>Wj4D8Az!g;dy?8HB{4v2D{+{_bUaTL5YGNOlpc~Fh?m9CE4RkQG{Kvaxi8UW!Brw z0QW1*4p4&G15zN_&}p7$Ltmu@7eGpJgh$y*Q=p-iHhArZ+k8i*VG5LJm;oso%yG(m z37(`Pyui1zp=&6z(MGOvzk>V%3XmH6&;0}~m~?8x@6Gv8FW#)RHe-gXjDl4Ghq7hF z%ns|QYIZ1Y`bKQD*PxWA&ImQmlwDoYQteVlz>slRWk*;;NSKbnUZXagwXK1QCCju# t#+OyCl8uP0W@r2MW*^vozlc7yt?1t9JKK+o=!$KryQ9X=TtsR;@gIHOtSSHi diff --git a/cinema/gb/mooneye-gb/acceptance/if_ie_registers/test.sym b/cinema/gb/mooneye-gb/acceptance/if_ie_registers/test.sym index 114073a61..1cfb8d468 100644 --- a/cinema/gb/mooneye-gb/acceptance/if_ie_registers/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/if_ie_registers/test.sym @@ -1,192 +1,122 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/if_ie_registers.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/if_ie_registers.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:01ef test_finish + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +0000009f _sizeof_main diff --git a/cinema/gb/mooneye-gb/acceptance/instr/daa/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/instr/daa/baseline_0000.png new file mode 100644 index 0000000000000000000000000000000000000000..f9e5e47b50a4d548ddbc988a8e76364d30f505cf GIT binary patch literal 528 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|VoAPZ!6KiaBquU(7mWz~FE( z<;Va1cWgxt&B%VfEU&=!xnok3TT$lH;@jICuivi!&oIyXfkoqEmOfz%KM+GNxySPP z*F*Dd<=5Z6-dB81|M;InsWNlk%!+)xc*?u&bRJ^RPQs?X}Me%-zI9%Je3zyJQf`=%BR z)X#i1X3W!3g=CVNqY4#O)@+Sqj#cGbPapX4+i$096fFHdSgd4OddUHvKlf(anl>B_4fO)^<1-LvTm(<@#pugN9sk(#xD6_+>%wt z@4_P+cHCCAP>ZvDj3H~iL1)&EI( znbO0wGES*vj8>Mff?O!d{bp5qwxF5HagPVQsC||260gn{tr$IAYm+LSjMdsQa*=5F zyVdDAqBA_lJs$7^k9dh!=ZH~^9-)oNlu5>EV;Q+vjQhiy^jt9+p5q=5c!5W}#H({9 zQH&m`6O*eX8Ltz|$R(1vKW&npCrO6qxW@xt;1MtJ>O8SLVXH@JYrL|_zS`Dqa;aGN zm$m8nVlzC)Js$7^k9dh!=Zh#tkJe&>l4L(EmXXUu+}~Ex3q&$J$2}hK0*`o!R~Lv= zj2@$%DU?h0*UmC>xj3f^mtH6?!*kr@0Wa`~mw0udq>9mFb!wtYlLK^W8M#7Ir)`>E zBx#1{xW@xt;1MtJ>LRIqc{4puXQotHa-hz5!kJttnKL#^FP1FBbKK(rFYt($cy+Pl ziqYeBZYq^06LfAFxk_@E*gU;N@(j;$j|aTKBVOXwCE`_`@_M57hMll2BUg)e*822P z@fqhi=bjzd1s?GduP&9KnyH`<(!sD3wq@iR2~KQCFO!gQo^$TmfnDGcFY)R!Dbxz8 z&mXRB!&Ussx zUM+R>Uq}CS9uIhdN4&(VtECzJH>3Y%W@XhZIaD{ZjNBy6T(Hg3Yor3Y%9uIhd zN4&(VYh(rbUxEHtF!gGMWU5}lGIF!5;0n7!dabNL|0~e{3LX!5fk(W=t7~ON`d^X$ zS2Qivipey+qGjY3Sy<1cx5-MbvMZ%G$V&9T z68*2_@qib2#7n%oL0a%XN-gvux`k<_S|rnT3(Lsu(!$l*7U_-BBExgs;{h-5h?jVE zqpYkLeW+g9tfp2@j?gPxM(&W6T{F9KdXuc2;W_T{fERegOT4;C>J_7>>Uy)fs!wL< zddtY2Qtwu<_36!0pW!*~@qib2#7n%oSz0PaPtz^U8meV-q;6>$xl3BQ6>ZD(7HOH` zIqva*7kI==yt+kJQ4MMpJyWk@*a_P*a<{DFn%h;iwvje-p zBVOXw9kRM=r&iZ<_3DP5uq`9^%j&M)uAbg0t7n|&oO^a)7kI==yt-4?P;06+^gO+W zVJB?M$OE#5YiZX=?~*k#&U4N^JFp8p;w4_)B@Oi7K>rPo^xxX7rCKLP>(-W$horSz)wWLWk=FFzn*LjRJm3W$ z@e;4@kv8<-hW^`_4ysLZjBaBYd05)GR<=!gue726HuT@d;{h-5h?jVEue7EAw)EfD ztgYH6$LhA0kwwzht!CS%_eop&Z%hAeJs$7^k9dh!_eneYZ%6;_Oh?r&IZn5;j65Rk z-0HSndcU-z|914>&f@_u@Q9aqb-%1h|7+6!nr0ofW^%k<(=zg?tm)RUYo-s#n)JUW z{jcfqfERegOT2nO+ABsMrQ4fzRr}-w-QF_tn6!5dwtf1bw9oJy_jteyJmMu@Jt%7_ zMjx%$GV7_ek`wh>mXXJ0E!Wzvl|CeEWq6KzJm3W$@e;2dk`9W|$LJ1bebpg3Nq4Y} zJRu!i8`~j$SUO~Qj(a@d1s?GduO61Q6{C;UYnu(!+R4d!ZOh1FS=+U>Yp083?F`Rx zj|aTKBVOXwBI&3)sg8QS?r7Kv+cNT`bad@($Mg~Dm~ozS?%9D|;1MtJ>JeE-byn-> zQ}jB9ov*`bWx`v&wEhA6Mx~{!l zH+@Xj%{b3F_w2wf@Q9aq^_Z-uHdO2B)AV|VovT-M7t&pG$(z%KBJ zmw5HKtgpJN_4NY1zF{Y9%g8gbzUyGuPoI$WGtP6)Jv*=qJmMu@Js}&YjnoGEbiILL zCv3~ev$BC(+is99mJKq_bIv_GunRomC0;F-PW0c2{yUkCRj1?(-N`cYoOE&>ZKw1} z=|umX=)aT4176?}FY)S0=}iBf>A$ntM0HNi)SWFO&r4^wj_sU2C7tQNGyQk=c)$xh z;w4@^C0*#h3;lO7-Bg$4EZxO2@`7}6>)I~q)6#|hyU>3Zj|aTKBVOXw)3PD`Z%F?e znoZS)$wIxMW#mQK(5+`TOqa-p^uHnfZ|L!W7kI==yjmh%>Ax%ecQxHr*W_&7)iUyu zbam_7uIV$7h1G&ea=RMqZJPT_?M7`kZW>;W_T{fERegOT2nc zHc^Z|Q*UB6SDPf~=}jynugWH_v)v?pUN*__9QSy@3q0Z_UOg|}6r<15-Aqr_EjeFz zvy8kZ-CP&jEqy_{Wq6KzJm3W$@e;3IkWCe%7wS#T7HZSv0==na=bjzd1s?GduU?iOs*mcSFV;N_J7HT!-jW_} zW7{KrMS5hM=bU?XU>A7AOT2nTHdkA!&GjXEbHh&9mXWt*bGM1zJbhI*&p6LH_w2wf z@Q9aq^{Vt#eN|6=sqSgm3EMLAj`VchY|r#H>6vk!bMD!JUEmQf@#;0%LT#nC(3j~g z3_D?4M&6Yz+@^Mm^mW-H<2>iwvje-pBVOXw>(Yz1>u!6c zZ%8lt??wN;JRa}@k9dh!Z%A+Y?@j-`&DN@Sa)s_~8F^27yUlFx^iAna|GnwIx5oos z;1MtJ>P_iG|9$AckLj=aBv3>U)2fV-|UgFi;(wF}G(tlsGjq00Rt@~O= zK9s($r|p}*BYo+=Fa7uRc)$xh;w4_aBU{n`R`kD>*;Z|pT%)(LjC>?pxh?Eg>ASKO z{clD8TX{U-1s?Gduilk@iqV(rer7w>FS%Ctvy6N!{ai2GFI_7AGCapU9`FK>c!^g_ zWoyOgEA-Z8d$o0Po!;6q@`-HidfTnj_hjn~&vB0jyuc$~;?;Z7UorYh-QVn>`X|@x z{+5wXrN8TA`={?q{|wJ@j|aTKBVOXw`!YZ=`YJuZ?5GALH|PPDkiwvje-pBVOXwhqA5O zNo}id(%Tw#!nTZjA=|pG?6&DgvTeqB&bem?c7aE{#H){FJ2gmcr*GEV8Fs?9jC?8E zxqf!L^kdmB<2>iwvje-pBVOXw$FjZJS#7Ux(c2q#!nTZjCEL5L?e^&>vVF#R&bem? zc7aE{#H&wa2epgZLEox(FzkeF8TndvaQ*EL>8G+o#(B=UX9sqHN4&(VPi03nSna59 z(>oe=!nTZjBRjeQcE|KH*)iih=iIXcyTBt};?-v|kp2hK|3I^=8kpR!2U0lJJJ76^uLqYP3@H2p?9*3d@DP-ZS79!7qS!m??nGQ zc|70+9`O>dzK}umKZyPZncdZ(6bEy{s+jAy?_u^)dn6C&JuD-?${ucK zyGQ!H?2+L)?(u*Zc*IM*`d)^pVQPqeP!BQegl!r5O@_E#?2z;a8Ip0HbMD!JUEmQf z@#+WJQw>*p>WB26hMll2Bfra@Zm``m{ZaPJIL|rv?7%MYh?jWvqYPCe)KLAf9%|SL z+cNTp40XHOq3KUDG~+zy+_M9_z$0Gb)lagQ8macui}YTGovKEBZ zjaK{UNA*62ov0y=; z6^FSYc3AqG45R;H^gqnw0Wa`~mw5G?45$C$^grB;Rl}3V^>E9Gmf>zsJ3ReehSUFW z`XBD`fERegOT7ABM$rEV`X6D&sS(K&dW2=f$Ot#oj!6HI5%fQT{zrH`-~}G>60iP{ zk@U|iJ$j@WuSO<|^+?M|A|u^ic4YdejHLgO^gq($0Wa`~mw5H3jH3Th^gqh%t41YH z>QR;vE2G@rc2xS8jH3Th^gqhu0Wa`~mw5G;jHdt5^gr6{r$#4F>Cu)EkoBT(c>(` zix%VD2s$j= z{gOV=uoJdrq?7~QID254$$=T?Ip>}o*aaT(60b6upr)t^`ei-AuoJdrq>>44yq%Ed zG9lwU=iIXcyTBt};#Dpa>3<^qPc(<9iODN^qGhB`Cc1s?#MH|~`kzSu6FnaA0*`o! zS6&XH|AXlNAakfXD0x*MWEp8D2f6+1L1~bK=>H)4Kgi<&FYt($copPe`ahWd4>nWP z!O3g-V9Uq~a60ZuGME{fMf0CJ|CMB=yNtTfnWs*C< zPD-OpqW?+sKgr_(FYt($cok(b{ZFR<$>uOMIe9}*wv05F$?iZqIW1)}{ZFR<$sP}Q zfk(W=t5T-W{}lS4Vh&eRk~j4f%g9PH#Z9nN(n_Y#{}lS4;_-kNc*IM*s^k#G=vVY1 zX1Y2gc}pK+8EGMhxQX_Vv`!Am@ErGezzaO$C0^CZp^DM3>O;*D>d@qEeW+z*WjWLx zWDiZ7$)OpZ;~o!qfk(W=t7bA)G5R$<)yz;+lXvt~%SgRUbqCw2=?XG6!*kr@0Wa`~ zmw2^;OjC@0T~9Mds%go)dYWaVrA%{^?6h=6nU>)>?(u*Zc*IM*T2T&DGu2^wsXolG z6Sie!6*;jK?iC4|#a5YOEuHVy#8+O9BjI1h$yD9eYbR{`F z<2>iwvje-pBVOXwN-|x|R@3$Sdb(jJY|BV1neGm;)6*6*J>xv*+_M9_z$0GbRSP+S ze{A6h{eeEhuoJdrWHmX$9cqtASC%6(&U4N^JFp8p;w4_KEHl(xHA8=>XBc+Ewv4PU zGu%`=BdwPi8Rt3Yo*mc)9`O>d>g7l^PaUa0(nlJ0!nTa8AxFAt_Qusez^jni^Zg@oE*B#cSWQc60cU3*}V2Wo7cW)n`6}M1r~E*S_cQ+V>of2fV-|UgFhiGMCrB z=knV3Tyvb7n|!Y4T1MK*TsOncO;?w>y!Jhp*S_a^Jm3W$@e;3AmwCMQJ&)JE=b7Wx zyyOc#&oZ*6%yUQDdFdK5kJrBE@!I!1j|aTKBVOXw8gi6k^vC)rbAmc5`BEQc8EG#^ zxtaE;v_X!_@ErGezzaO$C0;ei(TdTZ=%dYv>gePveY9m{EjilFvPY+_<>(C0agPVQ zz$0GbRckp$G5S+|j5$dilYFg@v5a((W87?eOxi|{$?zQac)$xh;w4_Skz*C3KhwvW zlhv`wH~Lu1$l7wOn`4hn+sd&Sp5q=5c!5W}#H+S)oSLtW)64X6hMll2BOT>9H`gAQ zwv*#B&U4N^JFp8p;w4_SljGGX>UjOFKHjhswq;};Io{2)$ERz`@fqhi=bjzd1s?Gd zuhx_k)T!zO{hdC+uoJdrWL-JI9c52Q+sg?V=Q-z|9oPjP@e;4v%ZchVb)x=WpJ><# z+cL7Aoam0WC#Gx3i5cfP=bjzd1s?Gduhx>2)B<&q{z0E)*a_P*vc8<;jPIkxIlhd{3pYQR27kI==yy_^Y(Elm)e~LL%os#^l zPqB=2mQ&pE_LOuTIfedDq5o4n9`FK>c!^i*$f@*yD*c~o&Qhl)zvxpfBVFWFcY-}N zT~|(}|5NGzRF4O|z$0Gb)w*&T{hvnvr?XNuClrIo9`FK>c!^i*%jxug zI{lw+&QYf)zw6U2BOA%-?qqv7m~JQwGd#yV9`FK>c!^gV%GpZgXKP|eLM$WQd;@g$G}k9dh! z8_Bs``Quzo3`vM(q=%gA&amgE8_T&FXF2gCkOGf*iB}uTd0hG9JWUKqh-GARInSMG z&r3Iv^D@qI;z=L{9`O>dHj(qW^2hm_7?KdnNKZN6on_BYyUF<(XF2gCkOGf*iC5j^ z0dddrnudF4t?OsTI-h-IX|ThSEhaB$_&ei#{wzv zh?jWPN3P<^D_3b^Dt%Q#EF%NtDtC#!D&119%CMYxERX_^c!^hA%GF%?<7!O|Nr+`+ z8@bwDYOhZF%GDWXIq@Wr0*`o!SAFFguKaP0CWa)$GP12)<1Vw;q+7`~8D}~1B#;7+ zc!^hA$+cYh<62D&Nr+`+JGs_fZm&)I$+a10Iq@Wr0*`o!SN-HVuKaPGCWa)$GP1o~ z=dQ5VrCZB&8D}~1B#;7+c!^hA%k^CO<9baDNr+`+2f5x|X|GTF%k>#&Iq@Wr0*`o! zSN-J%uKaO>CWa)$GP0xG;I6VaqyyxJjI*405=enZyu_;kawGlUNdGsQ7W&47SVjiQ zjqYlDW4evpNdGs||BW6Cq`)Iy;?*{C6aC*r|2LVH^-T$}jO-*gxohlA>9%qc{oh3Y zH+d|O0*`o!SKG?X^nWw`-)!pj%?YuL43eAOwf5$8JGq(uZ>Im7Jr+oTN4&(V?c^5v zzlHv9F)j5i39*dqEVsDp>@Df`atr<6LjSjTERX_^c!^ir%dPZ(EB)VUR?)X6#4@sr z-0H5kx28MDt@M8@{om@bKngtKC0^|yx6%J?^naUKRo|8n%gA84&D~&cOLvsp=>InQ zzs+NT6nMl-yxLK2=gKR$YhqgI+Y@3L*;Q_LH`?3NfpU9><-}uw6nMl-yc#HXaOIUd zG%>5`I}&0U*-h?nH`zPVo#c)T%ZbMVDe#Dwc(s$<$(2{`)Woc=?@WkgWOupK-E8kn z2g#iomJ^Q!Qs5CU@oJFV#g$j?(!{Kx?@EYeWDmK^-D2-bcb2;{EGHfdq`)Iy;?>S_ zw`$OLYhp-3EF(kYZg;D_JKaU@&N$17CxH}r#7n%|Meb3p^*x#xk`T+to^p@7&EAs^ zmU}YJa^guK1s?GduLjG#s*S!^6GIYW85t_~y4&r&>8^5b##v5038cUyUgFiRa-V9e z@6*JPgjh!QlKb2p_P%sCxi8}^C!PdS;1MtJYB#xGwbS=&Vn{+PBYVsJ?oNAuy1U$; zah4NL0x9r_mw2_iJfPOp4`^aYLM$Wu$OG;!`#`#fJdkmg6Hfvu@Q9aqwTC=N{}0mt zgQmTHFd>$aVe+86+dh~Mkq7DjLHd8tV}TTS#7n#yA`j93L-hZUSxY~Z5X;DLdC1*k zA4>O>hv@$y`hUn{ffRVeOT5}s9;W|?>HlHVK|h=j%g6|M*xhR%PKV0F^#3sZKkTtU z3OwQ^UJaE+^uLJy7n!y7qJ&sRM#>_0pIwyhC5z~P5&bXnSRe%+@e;50l1J$O5&D0` zbkvU|#4<8U9&z{EN7B9J5&D0G{vYvJAO#-r60i1_N9q4j`hV1{qaRI(Wn{EG>K?F< zru)dF^#3URKkBhS3OwQ^UhN}~srLMvSH!HVA4`a3WQ;uK9<-08!{o6H%ZbMVDe#Dw zcr{EOS8M6VH8Jby#}i^187q&whwS6&aCtn#a^kT-3OwQ^UJaKgR0saeD`M8yPb9=L zGESaw58Efw5%NTa<-}uw6nMl-yc!{k)!O`t39*dq zCr`OY?NjM!c`D;9C!PdS;1MtJYP3Afl|P==#E^toM)sGd-DCFYbc{Tmah4NL0x9r_ zmv}WsmT={dC7KwL5X;B`vcx@Zm!xB5Nyb@DJPD-0BVOXwSb2ske>|g!AqlaJ94ODY zC+sunIC&=HEGM1>Qs5CU@oJnr%auQ#)x?m5SVktuvu?3{HXSd|W}M~3lRyeQ;w4^< zm*?pJIr@LjY^sh${|ly@ejy>2k%Q$0_q2T>-Ctgy z{}<^01&;+%;1MtJYJYi={$Hg37tN;n#e`T!CdrF#iG49WKwhN(7wP{+j|EcT5ijxT z0C|c2U!wn)On3cKLM$VbH{;1ybMmJ^Q!Qs5CU@oJL1!IeMW(8Q30SVj($H{471jdZfSk#Uw2PXa0Mh?jUZS>EKz zA8%@6NJ12lRyeQ;w4@kB5!l$kGC~3Bq5fOBjj!Os(m{>RNl@w%ZVp}6nMl-ygF3g;mRNH zXkti0EF&}I9rv1jC!H$qWSr&1lRyeQ;w4^9m3O)F$Ge&sk`T+tk@Bv4-M*VnlXo-D za^guK1s?GducpaT`d>=_OHDt$G$EFenX=TqVV9-Q648JR8b zySME7>2!IY{@$T9M%d*6PV&X!LzEGHfdq`)Iy;?->Vj4Q8vris~6f0hu- z$g%R7`@nvd&XLbDEGHfdq`)Iy;?*4aoGX8Pu8AQDv5XuipSut3=jmMeJmV}Uo&-|h z5ijv-u6)6jKfch!kc3!9j+ZaoNA`Qs5CU z@#<*#nk#>Nt%)HCv5cG~U%OB3*Xc3xb;emvJPD-0BVOXwG4c&p{`f`{LlR;cIa$7O zpV@EHW96HSvz&MmNP$PZ#H(Xv8T~J#|7B)Zy(}S?k@>RBeQuYf$H_AKUq=7SJQhfS zN4&(VSRe%+@e;3&m+$ERJNp05 z?5@8{h-Ktd`ObZ5ze`V$@96(K`v1;jffRVeOT0QkzNi21>HmAPhyFexmXXusd-s+7 zK0Q&sr~mKi|9g)GQs5CU@#;kRf&PD>{~yc{{X;@5BMamQ_qF{YJxP9`{~zf82ag3( z;1MtJ>LmG*{(q$ZAI+Zn$Anl$PM06uH}=Q$WciW)f298(Jr+oTN4&(VljSF_yz-MK zW~lxtA(oLddPL*G| z^2)E8n0@rG39*bUlwaNV_Sf_@`8C6G;;}#qJmMu@ohH9=<&WPqF(e_Dk+bDD_k;Z{ zT_C?@oN?{%-#iJVz$0Gb)dKll4cEVGVn{+PBj?EP?nnE3db<3cah4NL0x9r_mw0u$ z{GmqZKQu8UA(oMIV7Xi6?;+c*IM*Iz#?cBlVw}7?Kdn$a(Uo``P}P zo+*E3oaMxmKngtKC0?B=f2mRWFHHd&XT{? zX#KY)h9tx?a)JEqezkw63+3;Ovz&MmNP$PZ#H)oe<3DbS+kf1h(RBa+e|^-xrvG`% z{_Dmi__Nx12X6oAwUg=78&f;avej4b(4kc;?|by9y~VI$3l@wU*P_MRYdcr-R;?Pi zwQSkGean`Ok8gaxwZGSHSyoq9dqiDb<9TgcZng88ckI}zRnMNST6OGLyH~r_KEa+n zYkxN0U;gLvx2WCk(PR1Pzq|4A#x%a~hK63fYF1z0u3aB)?b_AX*Y0OoeSPhHXIZOO zwfjAK^yy=5eSJg2jDNoWm*4Nxr}1Od9^auu|NhgbH@^QFGkW!!KHZq*-lIqDe(fVP zK7PiG|MBD3-d`=tz47lodm8iab7*|e|32U4_Zu5>uD*WQu=@JOzH6Uz?K5rsY-{%# zt@fDOy>8w5_N_f1r5fM5_6+;>J@?!N3x*DDXlT`{o?E+ijh{vB@l&Vv?ORLj&*g7F zlUv`u-MTIJnlAV0(|h%rI<*(K>Ck8k|S z*81<+vv$8#tJ-&iwaXvhw{QRc0|!o=*uQ_@zBR9Xq{dt0Gw$7c%6D zj2JO!&^Fuj>(}`HTeWKQU$@4uZ{zc8d=It9|EC+X{P_XbO4Hz(Z@W_$NKfjtZeizo>zIX37ZJIa#_x=6* z{nGgSx^=7lwA5~m{rBqC__Jee?X#_YegApeJP(atSNA{v{MH^-yEVSQvkx>!)42n%BO!|Etb_e!gq>m;Xd&*~E#pXWp(| zhYp=Ot-EgR@wNBccx&vpb~a|rkRi3!Yk#lZ)?dF%m)aM-@m}L+xcuu=I~zK5#E3q9 zYTv27de!cC?_T?Esr?L^e>z=v-7Z~fAGcoz+qR0O3vk&`!`cLgQygao@ z`Xkqh?No1ic5d_S|C7HjzF}#frCToDcIh@fn=S3t^N*!lFZ%kQ-ySpLiN;?X^VI!| zm+GFgmYN$juRX7ZUl)H|{pGuv$I{0-wOQP{Ze}z7pXIW2kr{u)$7_7OMvr+Do@=+b zHUF%mYPexh82=-`j^?Rx-!6J;+|-+%Sf$O1q5kLH_}gJ^Lj5m3x#Ed7^}jx}r1|(q z7yqC6$1I!POH%_)4Ky{-)Id`MO${_P(9}Rv15FJyHPF;RQv*#6G&RuFKvM%v4Ky{- N)Id`M|DQJS-vCLFaa{la literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/acceptance/instr/daa/test.sym b/cinema/gb/mooneye-gb/acceptance/instr/daa/test.sym new file mode 100644 index 000000000..38db17539 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/instr/daa/test.sym @@ -0,0 +1,59 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/instr/daa.gb". + +[labels] +01:68ee clear_vram +01:68ad disable_lcd_safe +01:68b3 disable_lcd_safe@wait_ly_0 +01:6902 memcpy +01:690b memset +01:6866 print_bin4 +01:68cb print_hex4 +01:68f8 print_hex8 +01:691b print_inline_string +01:68d7 print_load_font +01:68e3 print_newline +01:6914 print_string +01:67f0 quit +01:6805 quit@cb_return +01:680a quit@wait_ly_1 +01:6810 quit@wait_ly_2 +01:6816 quit@wait_ly_3 +01:681c quit@wait_ly_4 +01:6826 quit@success +01:684d quit@failure +01:6862 quit@halt +01:6863 quit@halt_execution_0 +01:6899 reset_screen +01:68bc serial_send_byte +01:6000 font +00:0150 main +00:0163 main@quit_inline_1 +00:0174 run_tests +00:01a9 fail +00:0274 fail@wait_ly_5 +00:027a fail@wait_ly_6 +00:0281 fail@halt_execution_1 +00:0284 testcases1 +01:4000 testcases2 + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000033 _sizeof_print_bin4 +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00002000 _sizeof_testcases1 +00002000 _sizeof_testcases2 +00000024 _sizeof_main +00000035 _sizeof_run_tests diff --git a/cinema/gb/mooneye-gb/acceptance/interrupts/ie_push/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/interrupts/ie_push/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/acceptance/interrupts/ie_push/test.gb b/cinema/gb/mooneye-gb/acceptance/interrupts/ie_push/test.gb index 404d9b0d6deebc701eeb8ee55144a0d597188e0a..2a12ea3cd5eefd98e9bc04a1917a9473ba7c270e 100644 GIT binary patch delta 687 zcmZo@U}|V!n&7CECHNl%4hJ(qXcYknZ2{%y2ux07oI8opkJIS;=d)EFhZ&eAZ)93I ziAg%hQ@~E(!T$&R42oL?)<594<9P7@H-jM~!vp@q69qo-Ka)RnM?g_o5G2J6mSO-& z{Rd0^V?5*~_*pTT>F@{lvr9bAUh)V@EiTzSn<*7>p1JGPF|gbW_O9PsvQnOif`Bb2Mok(EMeUU_0(NotBh zW?o4VT+wVKMaCf8Og<~_M;1fUn4FlGoSFmI`V66LvYwC_(3zZqaHmhM7ZL}G=pu<+ z6q3^YtQdk22{N%#C@;#-O9wh1ZfXfaeshU%kIv=;Oura6IecKRH)MFg$m((QDKI+D zrg@y5;i1Sd69Mny8+VL&e!nk4hk} z0^({Qt^wj&AeInyuyX>^Xvl#<;_vzgP7juni;K;h>}MS%uE1_#Cu?1y)H)IO7cCvVf5e?jG>B0~csgTng5hde4a ro{&-!=9crEm+aZCK*VqShiN#f_hv!^|dZeGX~&%1en@F`6I0xv%D literal 32768 zcmeI4e`s6R702&;R-70Ah@T|Sdr3v|qzR*BZg3ovYDRmNlxJIt#cX6}0ngCHik*hK zvPm4`rJC%}!CLyqIu>Y3!xjdkP#9(~2wfnExReM*EgiI@tQmrhvSr;cbgZkl*}LZ+ z-6y*kDrgI1JqPQ@IrrS}Ip_24Gw2WL&l{i3R*rgwz{;qKuW21$!&Uzu=zq20(+XZuvVtI_doM2+x_0X?EClczx(2?TW2%b-5=b$|K5u~z4hu5 z>&e;K?9_Ls9zHv1&QD#KXXE3Hn{tFb{Kjh^mV=2EhO>WhU4MSc{&sb_(q_3T8~x~J zb&yOBm`~20IX8W7d%-SuT~qhEVQNphr_a2Yy>yySeFkPfzg>@u^-2CfNV?NUJ{{y+ z^(nq96x%`3X%cB}*Jh`uuE`I1U~;|MCa0O1nL54g+?VPTToi)tbnmCnU93;>Euq*B zignDr&s*2ronDx`6+|zcpUs}-2WdNsGxe#>3$?bInmjyT=Knx6I}soPM1Tko0U|&I zhyW2F0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&I zhyW2F0`(HeZ!-86`zAL}{{J5jxTc#;s~TgP2JsNL&Fc`!llYu7dME*`oV)fpJn-c z2M>Y=1`S#kJfkn4k;vsxKcA0Ab2(L&>yZffPyzGv`K|Rq4<2$I-&>Zd)@DHE z+Pu<7LXC}vaq5&|AaCdyI>m0m!!^hOFC4aQn1?ak4HMe-_3Kx!PE44l&u4H82C)ms zUs$khc)+vVzr@Y9!(q7&t8zV;i$)g~qTF&hSg-lW8|p7DUB52(!{qrqJjdgZk5?A> zTNd~}ADjl4OXk~lA~7;DHG@LjV%VbWRNG4<4U_Bn6oJ^;WA0HS%eV;E- zHN3t!A1Xlp=5Ilamt@;Dg~kjq|JAEGr(D`FO{`T_De|Vd#1|taHQNjP>@W zQnuaO>vG{V;V|$C24Nk}b`__%zrmMxq^8Zy!Q{bUDAe8E)dl&Wi-vq5Ha$H)4%Fd2 z*r7u`J#f*{!w%*3f!M^vj6>)6=zeI0Kt~JOjFp_bmKpg({Hm^XYmwH(f{ml9fC$ zaQ$1jX`1X0cJ=h6Qt%2_y=LGq{POPJfVbKB=p=u4InZqU6C$_G9p0}s8-IVK=x0j` zGnZFB9`v(yRf$ zvx4$m0={I`lq<_|M<8n}6Y&#_z=p{D*0lPx3|{Q;sH~)dqexO2DE8iEc24{^MD-ChUYa*r&Fy&{s6(kv#+$AM{ zjq$4FUEw*BzZI?{30xjvJ`@<`1wIz88fQwwaWM=OXy64}WPyh;UM+Aycus+^aGe6B z?{LYKh^fbz@@?D-k}8*MmXcYFS0!`8b0nV=t|JLO{{-`)=L|3K3*o9ZQ*Pn{6xhKF z?3M-I#CWy9ec?F;J`k=`p!5WnWJ55#+Rv0G@vZ?RU0kwNN(L}qmFyOtBl)Os9ZBdp zjrq{?1zzB^aMc7;p1=htu#*?iWr3$LUM=t=;W-6v2-hi4dWuW_O2pI@Q*Pr{kZk0V zZBp_bj8`T9C_G20nRBjX7t^=%nSZBC`1kgE67AmtGOB0vO)01+SpM1Tko0U|&I zhyW2F0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&I QhyW2F0z`la{I3!CFDiJ~1poj5 diff --git a/cinema/gb/mooneye-gb/acceptance/interrupts/ie_push/test.sym b/cinema/gb/mooneye-gb/acceptance/interrupts/ie_push/test.sym index 84a14d360..913ffb513 100644 --- a/cinema/gb/mooneye-gb/acceptance/interrupts/ie_push/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/interrupts/ie_push/test.sym @@ -1,194 +1,30 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/interrupts/ie_push.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/interrupts/ie_push.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48af clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48b9 memcpy +01:48c2 memset +01:48d2 print_inline_string +01:4898 print_load_font +01:48a4 print_newline +01:48cb print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:0150 main 00:0200 round1 00:0214 finish_round1 00:021d round2 @@ -197,86 +33,59 @@ 00:0238 finish_round3 00:023f round4 00:0253 finish_round4 -00:0270 _wait_ly_4 -00:0276 _wait_ly_5 -00:028c _print_results_halt_1 -00:028f _test_ok_cb_0 -00:0297 _print_sl_data55 -00:029f _print_sl_out55 +00:0263 finish_round4@quit_inline_1 00:1000 fail_round1_nointr -00:1017 _wait_ly_6 -00:101d _wait_ly_7 -00:1033 _print_results_halt_2 -00:1036 _test_failure_cb_0 -00:103e _print_sl_data56 -00:104f _print_sl_out56 -00:1052 fail_round1_nocancel -00:1069 _wait_ly_8 -00:106f _wait_ly_9 -00:1085 _print_results_halt_3 -00:1088 _test_failure_cb_1 -00:1090 _print_sl_data57 -00:10a2 _print_sl_out57 -00:10a5 fail_round1_if -00:10bc _wait_ly_10 -00:10c2 _wait_ly_11 -00:10d8 _print_results_halt_4 -00:10db _test_failure_cb_2 -00:10e3 _print_sl_data58 -00:10f3 _print_sl_out58 -00:10f6 fail_round2_intr -00:110d _wait_ly_12 -00:1113 _wait_ly_13 -00:1129 _print_results_halt_5 -00:112c _test_failure_cb_3 -00:1134 _print_sl_data59 -00:1146 _print_sl_out59 -00:1149 fail_round3_nointr -00:1160 _wait_ly_14 -00:1166 _wait_ly_15 -00:117c _print_results_halt_6 -00:117f _test_failure_cb_4 -00:1187 _print_sl_data60 -00:1198 _print_sl_out60 -00:119b fail_round3_cancel -00:11b2 _wait_ly_16 -00:11b8 _wait_ly_17 -00:11ce _print_results_halt_7 -00:11d1 _test_failure_cb_5 -00:11d9 _print_sl_data61 -00:11ed _print_sl_out61 -00:11f0 fail_round3_if -00:1207 _wait_ly_18 -00:120d _wait_ly_19 -00:1223 _print_results_halt_8 -00:1226 _test_failure_cb_6 -00:122e _print_sl_data62 -00:123e _print_sl_out62 -00:1241 fail_round4_nointr -00:1258 _wait_ly_20 -00:125e _wait_ly_21 -00:1274 _print_results_halt_9 -00:1277 _test_failure_cb_7 -00:127f _print_sl_data63 -00:1290 _print_sl_out63 -00:1293 fail_round4_cancel -00:12aa _wait_ly_22 -00:12b0 _wait_ly_23 -00:12c6 _print_results_halt_10 -00:12c9 _test_failure_cb_8 -00:12d1 _print_sl_data64 -00:12e5 _print_sl_out64 -00:12e8 fail_round4_if -00:12ff _wait_ly_24 -00:1305 _wait_ly_25 -00:131b _print_results_halt_11 -00:131e _test_failure_cb_9 -00:1326 _print_sl_data65 -00:1333 _print_sl_out65 -00:1336 fail_round4_vblank -00:134d _wait_ly_26 -00:1353 _wait_ly_27 -00:1369 _print_results_halt_12 -00:136c _test_failure_cb_10 -00:1374 _print_sl_data66 -00:1383 _print_sl_out66 +00:100a fail_round1_nointr@quit_inline_2 +00:1024 fail_round1_nocancel +00:102e fail_round1_nocancel@quit_inline_3 +00:1049 fail_round1_if +00:1053 fail_round1_if@quit_inline_4 +00:106c fail_round2_intr +00:1076 fail_round2_intr@quit_inline_5 +00:1091 fail_round3_nointr +00:109b fail_round3_nointr@quit_inline_6 +00:10b5 fail_round3_cancel +00:10bf fail_round3_cancel@quit_inline_7 +00:10dc fail_round3_if +00:10e6 fail_round3_if@quit_inline_8 +00:10ff fail_round4_nointr +00:1109 fail_round4_nointr@quit_inline_9 +00:1123 fail_round4_cancel +00:112d fail_round4_cancel@quit_inline_10 +00:114a fail_round4_if +00:1154 fail_round4_if@quit_inline_11 +00:116a fail_round4_vblank +00:1174 fail_round4_vblank@quit_inline_12 + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +000000b0 _sizeof_main +00000014 _sizeof_round1 +00000009 _sizeof_finish_round1 +00000007 _sizeof_round2 +00000011 _sizeof_round3 +00000003 _sizeof_target +00000007 _sizeof_finish_round3 +00000014 _sizeof_round4 +00000dad _sizeof_finish_round4 +00000024 _sizeof_fail_round1_nointr +00000025 _sizeof_fail_round1_nocancel +00000023 _sizeof_fail_round1_if +00000025 _sizeof_fail_round2_intr +00000024 _sizeof_fail_round3_nointr +00000027 _sizeof_fail_round3_cancel +00000023 _sizeof_fail_round3_if +00000024 _sizeof_fail_round4_nointr +00000027 _sizeof_fail_round4_cancel +00000020 _sizeof_fail_round4_if diff --git a/cinema/gb/mooneye-gb/acceptance/intr_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/intr_timing/baseline_0000.png index 367742f57ed2db6e9a1bdea0008b76148f60ef69..fdbb8d6910905b6e6f3bb6ceede0be9eab8fc83f 100644 GIT binary patch delta 984 zcmV;}11J2q37ZL!B!6N_L_t(|ob8>_nw%gEMz!C(|0~-ITh=N>giymj=iKb<=w_lv z&$*~22jR2-NIp(( z+T3T?OrcIovqwY2=a%AsIqSAx3n(~Ry@t2e1Qt#c+T%^fkEqlW%x7OHkkK!2d z)9cP2;_0|`9D2LxEOEB;cDS=9$P^+=v|MEETbO9>OOJm$*IwJ1BL5-h;QFmKhL-pD zhwixg*$1WGKK@LSpvN6}K^-hkOBd}mkGfQ+j;LQF*MI9nX*>s)N`>Y)mG3_yTd;P9 z8dR^3qp^!#|8hIqxiU`W`;Rg_T@5woX-q_n+;(?{wBY(}9@>JNKfRLpb{FA`tZP$q z33a{ck;=K|_(K^ot1`%;eH7D~XSUw;I>8SmZf4+uY!?kXZ`Q%bXr)_~LB@mad?I(z zFW14P`hU`EoYiZ;e_b7H(^+2{b!S5+Mm^nM2QPt#8Fq$@CdJuim+|1KdGjKxrqxC` zy+zCC5iRLDPK8-sy~uLRGrK4PlO2!n6zX7c8tY)kNod)w&!yD%Jzrk)oZ@mi;=Jg9 zvlvTt@au`)(mNiUEhRha%l~HAWjwfZ++-~xkkKq-nM1OGE7VLsO&bm*! zekrwon7R&*I4}A-gx+(Vb^18RJiU?}%4EkQJcT-wQ3Mu$oFBmfM@6FLGb8u+qDym* zN~3$}b>&S^iT5z^M zERCYnjINx>9z$E&?2qT}zr_<6qk z{NU0z`5%{dp5u?v!sa=SplN{@LAz-10+XNvHj{4zGZi;TGSdT@V>OQe0000_dZQo^Mzvqw|CO^BZVf9iA`I)~_ne!yM#qs8 z5QH@A`~6-(m!G>6fVm)890ZGlU~v#E4uZu&usE+}S=M#k|4xU+>Gs-7hhg-kLk>Id zuhxRp^0ZTWIIrzTT8L=@6$>lfr?~%NW9^VyklJ~TLyVLj&R}||F|`_esrZWf7zgII z+Vg3N|71QjxL80&kzH*P_jgju{zeV1iM$m5Iea=<`OU9LT8`~SnI6(|mX-u2#TVn1 z{*l*@Vyl=IVy%;Ps7%HoMeNo%&+}^h=fHhS9LAGz1QdS$E-EC=l?01#g##iJ&IYs30`cyja!Cs4yPuD+>;J8?N_IQ0BolW%m zOYI$fHBRI9OBo(|L*03%p$;9c$aQyPN)2wm=BYKf`|ORxx4Q^;vhu3t5-NY_u@C3E z<4>it2HTyNAaCu{#nOZ0b*~%zRN`g^F32{~uyKFqI5>?~dsG=@KG@DDaua>?IJh>x z^qOb&D)+~YgKY-Km&UlWBNJmhJw6Uz0#7q+OqorJbImUE!C%dtovfBx8{zgAEuTyD zr0cj8X1TSK<(Oyjr3if4`w_0fI9Qy{aj@eev|`ieGSqgwUmE!YU$PT%U39cnjJGE+ z!st+BL+#a;63Khc+n@ij3CIg=N%rv+AIh82in^X)nUTR*2K0D8O-1)spr$JnrhvMgz_g4qwFR|?|VZS%Y>!Y4_CUNqd zN6=2zw|t^Eex5gff3W@e-SPhmVD|^(aki+28DMcE6wR@3%9IqOgj> zE_O2&-`+8WX|V*QcZDS;!Or$F^|Jw{@H}}{u_?S^)WuFc0QI-9wYj6Kk@v{Ay4`#O zsCH_l-d&-b%^*d0Ok_Jha+xAN)y8f%#L{bDlUoe{B~T2FqcJpzCeSpRLNh2X0yHhe z(y4WkK~qMuu_@p-(#3~)*4Okp;C(OQ;%KFkHoNlp@An5o{=pzH=H$L$w2NcQj*Fz{ z=3vl280sH*l=M?SJU+16sn1V?KiLJV?15=L{H-p^*o8M8@ME z9Y^(1V;KYr1Gi-`D&y&c4Wj@2^8*UDSl|m8PaO`bodjZm+HdLI+!35j76T$Lm`$#dT=0q%DKIgtxN)G1aXN&JP{)Ce@H zK3z2nraozi5l0Z4XaeNoceM42z0zy!O7Y4iyCxi0DnX0H;9@lnhu3R2YOjwDd^w{D zKw$u%Q0L%Q>Z;xYzpFiPXlb>^ZY$%qy(A0U%eWt<1q-WoZs)T;50e@>(Vi=R021uP AyZ`_I delta 1543 zcma)+UuauZ9LLY^UTEyr+uZi$$+jHrT4S z1;%vG?e65dmstnzpRmsIH5LyChC`!~Cx)Iray&)!zu`OZ;-)^lvIa+jZ%_pcS&sqF z(fQmn!d2LIA8np3-abc{PJc1IGhn@cYkMrE#q_-eTrHgFi02Hh*;qSKHUEI2;2>)*_vt1w#uzDnPh7^^H-~|IZ`|@xkm9n4r)C% zx+JmTN|7HnTFn8Z|I0ZiA<^p!I2rra)uK~u0JDZ+@ypS|Ypdvpw#YhM2N+)W6l};iQUYEYX z$YFilf_H@sRmw=vN8n>2BTT-CTSn%p@aP z0ZbV26F!nV`U#&3r4rVJR0-}yWPT|;Y7*FxTY1xAL?(RXUFr9cKM5s}7XQxe3ayyf zwPTDll4Kfo2E3hu6YY|8Fcr}EoPs;yJ!`rXdJKONkH*8K5+8IjiM4KYl5P!bO{5$R zvL+v4n6WIj!GA`_pzd39eM{3YM1wa?t6w{#YAwHZ_F(O2zMoU2*L^F0u=E?>FRIcz TzJ>puqAAgV)4N@zW6%EsJ*48k diff --git a/cinema/gb/mooneye-gb/acceptance/intr_timing/test.sym b/cinema/gb/mooneye-gb/acceptance/intr_timing/test.sym index 78f547ba7..378f26caa 100644 --- a/cinema/gb/mooneye-gb/acceptance/intr_timing/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/intr_timing/test.sym @@ -1,208 +1,132 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/intr_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/intr_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:0157 test_round1 -00:01a7 _wait_ly_4 -00:01ad _wait_ly_5 -00:01c3 _print_results_halt_1 -00:01c6 _test_failure_cb_0 -00:01ce _print_sl_data55 -00:01dc _print_sl_out55 -00:01df finish_round1 -00:01e1 test_round2 -00:0232 _wait_ly_6 -00:0238 _wait_ly_7 -00:024e _print_results_halt_2 -00:0251 _test_failure_cb_1 -00:0259 _print_sl_data56 -00:0267 _print_sl_out56 -00:026a finish_round2 -00:026f test_finish +00:019a test_round1@quit_inline_1 +00:01b1 finish_round1 +00:01b3 test_round2 +00:01f7 test_round2@quit_inline_2 +00:020e finish_round2 +00:0213 test_finish + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000007 _sizeof_main +0000005a _sizeof_test_round1 +00000002 _sizeof_finish_round1 +0000005b _sizeof_test_round2 +00000005 _sizeof_finish_round2 diff --git a/cinema/gb/mooneye-gb/acceptance/jp_cc_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/jp_cc_timing/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/acceptance/jp_cc_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/jp_cc_timing/test.gb index ccd0466aa54a19e7ffccd326ec2d6e2816a813cb..87240e73152c6b835ec0b0ace888b65bb4bbf958 100644 GIT binary patch delta 431 zcmZo@U}|V!+Th1n|Mbb{4=(@u6@CH92@1ay85#uVF)|7;oZac6`0uaa92mRdzhHwr zV**J0aKr!4irtKdKe(S=;&JwpM@VXMiGsg3gBZifTMSa46_+8T+#Ef9tQ3O$L;YM7 z3>n0nPJUKAf+D*)oT*r1qCgkZ;rW}-NbO@`?4R5%uK*<1$m=uhW!zlI6e+Q}f$0?c zCWjB~^@a=&7+F1zK0RCIaW>84>R{&tq|uNAgT&wU51bx2Kk$Cwm1!sVz`^d%1NX!0 zJwUeBoqz<|>3t_3FxoXfU|Mg>00as@PbvyD2r@V@eqcYm)1&s8{5yG@*8B@9CxM~M y$e^(P@F9j delta 1611 zcma)+L5LGq7{}lDvb%{%+|4+4J6)l9i6SY2ZZCDa&~>w$Y!WkUAc7jcnOD~1evTajX+QW9}g6udBLa7#nN-QF}iUbtYP?LV|z0AYV9t_Fw z{{Q*j@Bhs=ld)}T+w}W+us-?YK`Yle&)RtWl(kdD)-C}gh~FxtI#0EW!P@R>b`nl- zf5Yzjdy4++MZa54v1NY^Qqx_p^DJiZYZf004G)e+Uf#aH!h8> z55W1)my!&R-zE>xmuTY#+%Xz0m<<0o-3nXp|FAih)?>z_1zatrW5#3dtg}IVcg%Qr z(8U=7VXGTY3MtZo6(UwRp$|8o9g(;0t~O_yv(0kz@RZh^p8BU**hm!nuE8$;&pfRE zj8-EKEEV}oqSbt%RIBH!HR3aqe<%2{9dXt&2Vqsz#Im(ozFIF;=2cOqw78ae5ewmW zQ4$w7iO)BmBkq>we6Y2{Ik%-dygN(Yc(UBqorU%e=lG&OYM#a482mgyA6Jvh;fae+i`m?r~`u zD#1I2Oj72TPxAz#Vin@d0c36um}%+vnBzhz<{=>!k~dwI^}OkKG2ksBX_3GwzOoFF z5XOW=knoY*(M$MDD3!1xq)PD4BJ(HVQIo*B+{&9CLgYw*yej=3@}^J%Y4K<7fzXPH zUAw7-t&wSHh4B^XMmr=kkPaD-+=4gm?=!t|BZmKo`^h0viEneKMpin}33?%XVLa{X zkTv-ThZxIZ8~ksy3+jP2*RymTLv%Q8TD{sCRci&cv;DPS1b$AHeiK;v{?gw9zo<&D Z1QxzzMN^^!x7+v|Zu7U{HGVh>{{npg07w7; diff --git a/cinema/gb/mooneye-gb/acceptance/jp_cc_timing/test.sym b/cinema/gb/mooneye-gb/acceptance/jp_cc_timing/test.sym index d91d4810d..7cd29900a 100644 --- a/cinema/gb/mooneye-gb/acceptance/jp_cc_timing/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/jp_cc_timing/test.sym @@ -1,223 +1,66 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/jp_cc_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/jp_cc_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48af clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48b9 memcpy +01:48c2 memset +01:48d2 print_inline_string +01:4898 print_load_font +01:48a4 print_newline +01:48cb print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 -00:0157 _wait_ly_5 +00:0150 main +00:0151 main@wait_ly_5 +00:0157 main@wait_ly_6 00:0184 test_finish -00:0198 _wait_ly_6 -00:019e _wait_ly_7 -00:01b4 _print_results_halt_1 -00:01b7 _test_ok_cb_0 -00:01bf _print_sl_data55 -00:01c7 _print_sl_out55 -00:01ca wram_test -00:01cd fail_round1 -00:01e1 _wait_ly_8 -00:01e7 _wait_ly_9 -00:01fd _print_results_halt_2 -00:0200 _test_failure_cb_0 -00:0208 _print_sl_data56 -00:0216 _print_sl_out56 -00:0219 fail_round2 -00:022d _wait_ly_10 -00:0233 _wait_ly_11 -00:0249 _print_results_halt_3 -00:024c _test_failure_cb_1 -00:0254 _print_sl_data57 -00:0262 _print_sl_out57 +00:018b test_finish@quit_inline_1 +00:019c wram_test +00:019f fail_round1 +00:01a6 fail_round1@quit_inline_2 +00:01bd fail_round2 +00:01c4 fail_round2@quit_inline_3 00:1f80 hiram_test -00:1f87 _wait_ly_12 -00:1f8d _wait_ly_13 +00:1f87 hiram_test@wait_ly_7 +00:1f8d hiram_test@wait_ly_8 00:1fa1 test_round2 -00:1fa8 _wait_ly_14 -00:1fae _wait_ly_15 +00:1fa8 test_round2@wait_ly_9 +00:1fae test_round2@wait_ly_10 00:1fca finish_round1 00:1ada finish_round2 + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000034 _sizeof_main +00000018 _sizeof_test_finish +00000003 _sizeof_wram_test +0000001e _sizeof_fail_round1 +0000191d _sizeof_fail_round2 +000004a6 _sizeof_finish_round2 +00000021 _sizeof_hiram_test +00000029 _sizeof_test_round2 diff --git a/cinema/gb/mooneye-gb/acceptance/jp_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/jp_timing/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/acceptance/jp_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/jp_timing/test.gb index 671a7bbcf64be7e2043b5fff054eef3e77ccc8de..ca092b922f61e397bdf39680ad926de551284df4 100644 GIT binary patch delta 431 zcmZo@U}|V!+Th1n|1|#d2bX{S3crBl1chIU3=M+w7#Rf^&hGS3{P$OI4vgLKU$8-* zF##lgxZ(e2#csyKAKcF_@i=?QBP6xBM8V&iL5$(#VFszsipvmEZjPQlRtiD>p?)q3 zh74j(CqFA5L6O}Y&QvThQJ{&gz;udz zlfwu0dP9Z>jI16L(=~4Sk{++x{YyJh5lfckr yWKdXt_>f1%#uHLX!rT(y!-1?SC2olyT+GW)C`tT0c=oi%(UUNLdx1RP$_4bT`wf>$nB;5~V~6b-mc_g4@k*vPqg@14(oR4^=$$(9(-2 zvaQa5UdlpIdgz|Y(u*LupJsGJDm=NLKOrhiimDS0$ZpXY~uIc%RCzN(2xx8 z|DW&u{@;8v8QZ3|O}|q2Fxo$H=w9Xx)*Iw@jnw*eBwZx>SCN7}7mZTB=g32$=0 zY4`l+i~iA~-z%rss=ooL*`C*Z9JBlxi;sjxhsPt&?mhU_;WRNG!FBNCrV**Z%w52nDKB4SIg;`@i%ui*|7dx%y@9b z#Tf!&>&@LligaO(h!sxg!>z|hRD*v0>uhxMP) zYQ%w+BA-dLnlF@U^?bEPd}i|R6hC$%&PL`4tc#jhwpPnm>!r$~D$10WH!@FSA>0)u zadDIQeDgWtZfnj5+xwhz+q%QMv*e8@s~z20>g;n)Ec@f;S^Q1lPw!~XE15CA<+o&a zKf8}m<0o+y_zbKsVJ9cxAmM=Y`w1@yr4puuR0-Z2h%|*q=Lx(fw{j#!WGq0Q zLEpmB^_k~HnPRR8shGU$%M!##{Wd0iDJ0Di*pMf9!Z0R`1_^hh-w*gvC>8K0mzJRt zyi>>|Wq$cIParB*AC1n(>|uL_Tv1UBVX-t-6}#{%Sc((faG6-pp2{><$Nt(e%g zn@ZRknT2*3Uy*LKOEN?0knzwhc$5Ai)0;G6_>cH2IYKJ&J?_ldS~ogHZ-#G9rd=Jf zCLiGlV_9s2|BVhnJ+Kz~mab!n4yR44UpuF2t)O;(u=Y~m=TzzEft4RDy%G3DReCS5 X@Fgpn5*@g`#xL+Ye;fY553j?&xY7Te diff --git a/cinema/gb/mooneye-gb/acceptance/jp_timing/test.sym b/cinema/gb/mooneye-gb/acceptance/jp_timing/test.sym index d30786137..84bce7a55 100644 --- a/cinema/gb/mooneye-gb/acceptance/jp_timing/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/jp_timing/test.sym @@ -1,223 +1,66 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/jp_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/jp_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48af clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48b9 memcpy +01:48c2 memset +01:48d2 print_inline_string +01:4898 print_load_font +01:48a4 print_newline +01:48cb print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 -00:0157 _wait_ly_5 +00:0150 main +00:0151 main@wait_ly_5 +00:0157 main@wait_ly_6 00:0184 test_finish -00:0198 _wait_ly_6 -00:019e _wait_ly_7 -00:01b4 _print_results_halt_1 -00:01b7 _test_ok_cb_0 -00:01bf _print_sl_data55 -00:01c7 _print_sl_out55 -00:01ca wram_test -00:01cd fail_round1 -00:01e1 _wait_ly_8 -00:01e7 _wait_ly_9 -00:01fd _print_results_halt_2 -00:0200 _test_failure_cb_0 -00:0208 _print_sl_data56 -00:0216 _print_sl_out56 -00:0219 fail_round2 -00:022d _wait_ly_10 -00:0233 _wait_ly_11 -00:0249 _print_results_halt_3 -00:024c _test_failure_cb_1 -00:0254 _print_sl_data57 -00:0262 _print_sl_out57 +00:018b test_finish@quit_inline_1 +00:019c wram_test +00:019f fail_round1 +00:01a6 fail_round1@quit_inline_2 +00:01bd fail_round2 +00:01c4 fail_round2@quit_inline_3 00:1f80 hiram_test -00:1f87 _wait_ly_12 -00:1f8d _wait_ly_13 +00:1f87 hiram_test@wait_ly_7 +00:1f8d hiram_test@wait_ly_8 00:1fa1 test_round2 -00:1fa8 _wait_ly_14 -00:1fae _wait_ly_15 +00:1fa8 test_round2@wait_ly_9 +00:1fae test_round2@wait_ly_10 00:1fca finish_round1 00:1ada finish_round2 + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000034 _sizeof_main +00000018 _sizeof_test_finish +00000003 _sizeof_wram_test +0000001e _sizeof_fail_round1 +0000191d _sizeof_fail_round2 +000004a6 _sizeof_finish_round2 +00000021 _sizeof_hiram_test +00000029 _sizeof_test_round2 diff --git a/cinema/gb/mooneye-gb/acceptance/ld_hl_sp_e_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/ld_hl_sp_e_timing/baseline_0000.png index be0ce56b75d4b4ae2b671c5bd6008b6ad6b0b57a..a1f08eb3bead378b2cea0bfa2b2ffd766f8fd3c1 100644 GIT binary patch literal 1210 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QH=r;B4q#hkZuFBYvf;9)&G z_s@U*V)+*qJR4bW7txz*f{^s#xzO#QnvMye6_R^#63lsNl{h^;e>-o-YruC`o z_p_g#on6%z;UhZnTUGHPw^b8nC zc<0^j)~z%8q%Uu>zwyz(dYfF0*~$A4ax3LLb(TH8r?=}w;qJxe7xH#qE-z)wv^){z zlhQZ6g@03@RD#zaKmf{TroUb(W_$IBZ%?*3#EA%7m|~R7$XSU%upOeQvRy zpG<+w{#`ykE1o{KJ16J(*lvf}5=+;@2fI7(Hw*sP+4{d%v()$W@iNJHsrQ916|IUb zCiVXoRaBO^)b!i_t?BL8KceQ{ZpyblajR!y8{abbBlTR)X`yC4&F&_xcYpj%SAX>V zQcv^IL>ZlPa~~&I`>m)dSo`X!XuV8%Uvsa;!dC~~u4*s4V(Pr>#X0A&$4oog0=Ty> zb#J<1nxI_A(iSrLQO$bU*9W)0o_$+rcTWd<9FMH(HrE}RM zuisI6q*?jxLbaOq)D-)r=Wb1S{y55jJ@U~VOZ{I=Zys+oFS!`#b3oz6qN9!*(4&s8 z>F7@`J_~DuC_Dd@|1n=yUf#fKTJX4KL;lWxbJbI~e?HBB?wZEFyg%hA^q`+H)E zMRJkr$Dqv?sr|cuYH>E?)-E|#k%S5^Jm@4O{zRJGG&wjh!zMYZr!J?9H>BjDJ-#yozo%QbYEB%h?lS1}qW)=Ur)wM|Q z%TCYhF$nqYeV^PTeb-+xYeuJ-l0<*eIsx!x(~nUirCra@Y6R8#<+u?Bb7)gQPAq={J>Ke8Ad7f=99Xo=CxS_3G}9ho$o$ Q7l6tnPgg&ebxsLQ0L`3MEC2ui literal 1231 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|U!6PZ!6KiaBrR-Yr|Bz|*=h z``-Vl)q2maBx-VcOft;-R(|=~e2JT^ot?Y>{`)7^bo%^Vz6lW;1{NX`GF&`-tZeN} z&CZPnE2jo+%f0=7-Qh=7JGZDeVMah7(VKj>Zm$kbpS6Bx@21C*YYXe$-mE{foZVd7BXiSg=STnMn{3*9 zsaaJ~|7Lvqd6m~SAG3qDKduPAw!23r^+=<_?}RAg$zwzT{Sx-yHJevN2*;^zymWW?nAq)cowh%=d0ta=SM$f|p7oBfil z%5Gm|HYC|IE8bjU^Z$C^&j-&`mCw)gN|}?AdU~_my!LZ<;?LiaWY;d+^J&f9$~lJl zbLap5&CaR%Sio0iW>53o)pFhrH7`s5#u?6jax{38$=yArZ6_0iU#oaWWzR{eecr3( z|M7CuSHG~#&c9P^UboEee|>OHN@H<)>=*G1&$G38E=EpKa4hJ6rYU$#!IIkZ;?+S~ z6D9Y1n@_rbb+gECwo|&to)vyQbbQ(W?h8A`b#0Th|K2;xXKHSDUwB&ABKI1Jn{~4P z_%GhR-(7qzcKJ=_B~OFqe%NQTqI2n|moJ{*{!}cp=)4DO-`S^L{C)2nE-CKeGLb*! zA9%kybUI7FPPl>HVuSJyPWyu|Vw%<4UR2FqwsqpX5b=H2m+f+Xx3jJCqhi(3%Hu)6 zD1~GK3U7>-x#NU<-A2+UHq1NZVQin{vmnliNMr?W?igr)l|LE5?|J!rd*49s&di=b_q+PCi zJgi)V^(Q<|_-osC`Pw{F7vbP0l+XkKM~q2^ diff --git a/cinema/gb/mooneye-gb/acceptance/ld_hl_sp_e_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/ld_hl_sp_e_timing/test.gb index 4091efade426f8e98bd4f070bdd1232760cc74cd..b2402905197bffe5de9d40471e40ba6d3861ad08 100644 GIT binary patch delta 1162 zcmai!OH30%7{_Nzpay)fR?G$y*=-Ee_=rt38lvmcmWLhUCTIeQ2Q^YnqY*+mU;%eg z(E@#NnLU-sv?9L za>z7ju?*gbczizt^8Msz^_yU;1-=$>Vn5K}ly2xSH?4teZZ+A}6XvLCd*pDCrR4;k zB7rwAkSv9-NYR*ASb~-!L2IEvB`1eU`BO_;J=AKU)(JT

l$r&K918!aO|5)|HhU zE|rcSIC-eH>bz6v({8|LB*G;6Neqw}B*9b(yobDZGyyPMN#sFZ1d*Sok-+~!%}PHs zsy?5~T>;GDb(*%dUHl7_ C=-C4R delta 1451 zcmY+EPiPcZ9LL|Ab^l~{lk7Ow4pEvnYmqI5l2E9r;3k`7v%Bu-LUw5m9&G8M2TL!d zv_#t(XfNWW;-NW}(2F3*+A0J+grT95VLHSXq8F7FRB&4)5R2|ocm2KJn|Z`#XZU@; z^LwA~?>%|nURK1`c?{64(U;T^H zkNKlDyT3i2a2{>`@!xo_-!u}=*T#TD6U6V7@*C~61CDn)-)pC^x}U$*9>VHzezHA? z)zh_ODj9t8qc54M1Pywid*0Ox;~QCQu^}+s1~y+{RMYc zSyVfa(w`l2VOmO9bFEV{NRKWPtfu_o#6Lw!db~3qD|~c73%fke4|o3E}L?d#g*Kf&`AHrmUN?7Z?L&S#VpPex2-zg zws$*c+M2_sv&490sjE2)-QCW~MSrh(8mf;j=~AIk`_@a1ww1$!C^+a)Twoo&h?xMQ2Lqh4Mz6pqZa)NWwcfWf}Wv2 zpiD6FAzl@jOXw+cg#IGdawY-hK*+oye8Hsas3h_ZN{Qqr(-!@VS;VVDLI<@nO=#pO zZigpCAR!$l>=S;F@D3`OFo9Agcqag9qNmId`jJ@5kqRJFA@U3GEjYS>c?R1g^BhXa zVmbg@nr}m03bp!~>oXg@mCnVMF*qz&%tl;9o8+T_$*^fJv%+`%00}Bvuj5 z+y%_RkeL;Jz#Ky*nUg3bk`FyE`uWgbLck{|l`^5HcxCCB5Ql_JnDD(=5hR>PB@>oW z$^`E;Ft4Gfn1rs1rF`fZAcsTbZQ%#Vho}%~@!#AwYRQDDT_abqWJ>cetmwU+x. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/ld_hl_sp_e_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/ld_hl_sp_e_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 -00:0157 _wait_ly_5 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0151 main@wait_ly_5 +00:0157 main@wait_ly_6 00:0187 test_finish -00:01cb wram_test -00:01d1 hiram_test -00:01d3 _wait_ly_6 -00:01d9 _wait_ly_7 -00:01ee finish_round1 -00:01f0 _wait_ly_8 -00:01f6 _wait_ly_9 -00:020c finish_round2 +00:01d0 wram_test +00:01d6 hiram_test +00:01d8 hiram_test@wait_ly_7 +00:01de hiram_test@wait_ly_8 +00:01f3 finish_round1 +00:01f5 finish_round1@wait_ly_9 +00:01fb finish_round1@wait_ly_10 +00:0211 finish_round2 + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000037 _sizeof_main +00000049 _sizeof_test_finish +00000006 _sizeof_wram_test +0000001d _sizeof_hiram_test +0000001e _sizeof_finish_round1 diff --git a/cinema/gb/mooneye-gb/acceptance/oam_dma/basic/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/oam_dma/basic/baseline_0000.png new file mode 100644 index 0000000000000000000000000000000000000000..f9e5e47b50a4d548ddbc988a8e76364d30f505cf GIT binary patch literal 528 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|VoAPZ!6KiaBquU(7mWz~FE( z<;Va1cWgxt&B%VfEU&=!xnok3TT$lH;@jICuivi!&oIyXfkoqEmOfz%KM+GNxySPP z*F*Dd<=5Z6-dB81|M;InsWNlk%!+)xc7m&0UvMoWBL~CT=N@)KXB+-2G6)GW z{9|0eaCU~rrKyay4;nrzHZUIk;C`0D(=9PG$4WuP&6VLp!`ZtYVooPNE6xGS?ehRi zholylDENCbh%uae;KruGs_^&Ze-yCUpUGCB{(`D)^reL4!+Lc=Mo%XnPeNnLW zdeNGlu0E%B6c7=4SgCK(g;|KP`&pm3N$-k4gY0bZ&a#9f-$LkM&0D7r`kwF2(`g+>@>@ts!hnIPP mj8hWkmXP=!4rEp-aZCK*VqShiN#f_hvp+qKo&<)_FEarA_!K?> delta 1589 zcmai!U1$?o6vywK+BTnU;;; zJoutM?8>s>%Ytvh!cspF5n;KkSR98@U;KDc`(htPk!ta4(8->AZf3N0*&UMM{Qvjd z-~Y@dlX_jL*Oha5sy7-$UMu@f2D^yT_RW_g|PJjK8dC(Rx`$cmiNSae;yO$TBZ@6dk#wmy1cXue(VNvYu<&$GA2 z#8gTY?~Ej=Q^KaiBZeMK>KXk06l^lD8T zuM$hGh|fB4cLMx!`WyN)Hifg*sy1FLjg9(Et4dRs(<`BoUci<}O{><}NVZhb^2D&? z{D{4r|75HDKL;kK9hFZw`f@%wWd$pT;oAdW)rs>>=}tkJ>vg->Q^-j?LK2+!^aKny zN&8A-{uaiFIh-D(8&E1)LUVFqBO?ywV@`-)Nyh<7cSt|UNLQklev7JgtPB7>5u=At z2bjEwSqA1w^pp`of0KI!lK?a5G5?f)lX(@DWCHRgN*^f>>!IuyLsuc-8A?UZ5&BxL zh=dkMhh6U?2!97InUCbT5C3Zw$au!r0u{U&n%W=n^I^qEH& zGsV=Wf|{KJzP-K2r>>$$l~PK^VG*QYjL;OD>3jb_j^^E4uuF{2&*aQy)X+ zC;W=iPcRPy^DKHwh0ybIt6;VPv(p>ekbV<+AC-@sLkUP7e{|ygGm^1-oD9+Vc5A+1 zgj|wdmTF17F$!kCwYp;VC&KVXJnwBIW09bd={)0xHYhXgGyN$;rC(RX0ktufg)ziy zw2BryYouwZDuk$X((`lZ>!SC7=M69JJ>mIzAN#v!X^UGgd4ADvz2RAvPh0=@fAP5T E59kq1EC2ui diff --git a/cinema/gb/mooneye-gb/acceptance/oam_dma/basic/test.sym b/cinema/gb/mooneye-gb/acceptance/oam_dma/basic/test.sym new file mode 100644 index 000000000..dc17e1bde --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/oam_dma/basic/test.sym @@ -0,0 +1,63 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/oam_dma/basic.gb". + +[labels] +01:48c9 clear_oam +01:48d3 clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:4898 memcmp +01:48e7 memcpy +01:48f0 memset +01:48a6 print_hex4 +01:48dd print_hex8 +01:4900 print_inline_string +01:48b2 print_load_font +01:48be print_newline +01:48f9 print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte +01:4000 font +00:0150 main +00:0176 fail +00:0180 fail@quit_inline_1 +00:0195 finish +00:019c finish@quit_inline_2 +00:01ad hiram_proc +00:01b5 hiram_proc_end +00:1200 random_data +00:ff80 fail_offset + +[definitions] +0000000a _sizeof_clear_oam +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +0000000e _sizeof_memcmp +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000001 _sizeof_fail_offset +00000026 _sizeof_main +0000001f _sizeof_fail +00000018 _sizeof_finish +00000008 _sizeof_hiram_proc +0000104b _sizeof_hiram_proc_end diff --git a/cinema/gb/mooneye-gb/acceptance/oam_dma/reg_read/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/oam_dma/reg_read/baseline_0000.png new file mode 100644 index 0000000000000000000000000000000000000000..f9e5e47b50a4d548ddbc988a8e76364d30f505cf GIT binary patch literal 528 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|VoAPZ!6KiaBquU(7mWz~FE( z<;Va1cWgxt&B%VfEU&=!xnok3TT$lH;@jICuivi!&oIyXfkoqEmOfz%KM+GNxySPP z*F*Dd<=5Z6-dB81|M;InsWNlk%!+)xcjhB&)y(=|k^YuYYhold61I?+IbGzcMwbc3rxt7-KR zlq!zW2*(+RjH0&pmnk_~%>q z?wy`ExAW=4$B%B^zIXSq`^ow9=T2QZwf}U%xp?ZrMQwCcQx-d{?f>Sj>U5Z>thJxj zV}@3}8@jivm9>@p>g|P}Vy-WBf8l8iF`w$OmW>z{(WKWSR{e!89r|TG)>_wZNWbd~ z@9M56_4gKr^=FBN*y763>Q`a)$M8e75a)yAT8FmuEb&XDJ^#_!kNcg^4rv{}5}s`l zG9t9;8zZgvI4r^&TZBFl+%3Y}BAnbJyaS<@Z%#KkFVuTwqjn@}e6@3syC(q>AOR8} z0TLhq5+DH*AOR8}0TLhq5+DH*AOR8}0TLhq5+DH*AOR8}0TLhq5+DH*AOR8}0TLhq z5+DH*AOR8}0TLhq5+DH*AOR8}0TLhq5+DH*AOR34Z!-KB`zE(c|NqAWXS&&pb<;G% zKzmx*W*sf1k`%NXMpsulZQCs^xg2_okI&AYIn&XxZ(nmWblY~6b#``lcXmp=jEg$V zFiaB>rYY@s$CaTSdQXpSyRL2b^uU8*fv$_E_|Y@!0Y8_ES{rYP*L4}&aXb&2Wu;QS zvQ)~l;2VZzVQj;&ZTPvI@5keoy16g$c_C*z7T3|wyg1S%M#vLGgd0Ag(n(f;AOKxfcoANyrjysDwkC$sd7aXYqzIyMMFHl1v>{%qNH=RwkX{#|uByuZY6 zcO*apBtQZrKmsH{0wh2JBtQZrKmsH{0wh2JBtQZrKmsH{0wh2JBtQZrKmsH{0wh2J kBtQZrKmsH{0wh2JBtQZrKmsH{0wh2JBtQZr@LwkI4?iQk3;+NC literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/acceptance/oam_dma/reg_read/test.sym b/cinema/gb/mooneye-gb/acceptance/oam_dma/reg_read/test.sym new file mode 100644 index 000000000..277379b83 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/oam_dma/reg_read/test.sym @@ -0,0 +1,92 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/oam_dma/reg_read.gb". + +[labels] +01:48af clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48b9 memcpy +01:48c2 memset +01:48d2 print_inline_string +01:4898 print_load_font +01:48a4 print_newline +01:48cb print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte +01:4000 font +00:0150 main +00:0153 prepare_part1 +00:015f round1 +00:016b round2 +00:0177 prepare_part2 +00:0183 round3 +00:018d round4 +00:0197 prepare_part3 +00:01a3 round5 +00:01af round6 +00:01bb finish +00:01c2 finish@quit_inline_1 +00:01d3 fail_round1 +00:01da fail_round1@quit_inline_2 +00:01ec fail_round2 +00:01f3 fail_round2@quit_inline_3 +00:0205 fail_round3 +00:020c fail_round3@quit_inline_4 +00:021e fail_round4 +00:0225 fail_round4@quit_inline_5 +00:0237 fail_round5 +00:023e fail_round5@quit_inline_6 +00:0250 fail_round6 +00:0257 fail_round6@quit_inline_7 +00:0269 hiram_proc1 +00:0271 hiram_proc1_end +00:0271 hiram_proc2 +00:027b hiram_proc2_end +00:027b hiram_proc3 +00:0286 hiram_proc3_end + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000003 _sizeof_main +0000000c _sizeof_prepare_part1 +0000000c _sizeof_round1 +0000000c _sizeof_round2 +0000000c _sizeof_prepare_part2 +0000000a _sizeof_round3 +0000000a _sizeof_round4 +0000000c _sizeof_prepare_part3 +0000000c _sizeof_round5 +0000000c _sizeof_round6 +00000018 _sizeof_finish +00000019 _sizeof_fail_round1 +00000019 _sizeof_fail_round2 +00000019 _sizeof_fail_round3 +00000019 _sizeof_fail_round4 +00000019 _sizeof_fail_round5 +00000019 _sizeof_fail_round6 +00000008 _sizeof_hiram_proc1 +00000000 _sizeof_hiram_proc1_end +0000000a _sizeof_hiram_proc2 +00000000 _sizeof_hiram_proc2_end +0000000b _sizeof_hiram_proc3 diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/lcdon_write_timing-GS/manifest.yml b/cinema/gb/mooneye-gb/acceptance/oam_dma/sources-dmgABCmgbS/manifest.yml similarity index 100% rename from cinema/gb/mooneye-gb/acceptance/gpu/lcdon_write_timing-GS/manifest.yml rename to cinema/gb/mooneye-gb/acceptance/oam_dma/sources-dmgABCmgbS/manifest.yml diff --git a/cinema/gb/mooneye-gb/acceptance/boot_hwio-dmgABCXmgb/test.gb b/cinema/gb/mooneye-gb/acceptance/oam_dma/sources-dmgABCmgbS/test.gb similarity index 91% rename from cinema/gb/mooneye-gb/acceptance/boot_hwio-dmgABCXmgb/test.gb rename to cinema/gb/mooneye-gb/acceptance/oam_dma/sources-dmgABCmgbS/test.gb index 320b1be89568eed0d95618df80d1f0956ea3e316..41f684aa5e80e675b400d6ba58bf8911a8b9ac7e 100644 GIT binary patch delta 1986 zcmZXU3piA17{|}dxQtvf)a*2E%)uJUU2=&r8Kya+luNm^ZV4$`Nenupa;Z?HTvm8c z!Y(yRS{Z~gtCMavNlXf9<+>{6vS%jNvz+I=-+7{k!sEVw7c88 ztE{Dy zXe&Md00`t`07?aN3PLlHWu4G6f6=l6)yZC_vt_}u?z^S1xR)r|BqZVgZK>6~WrfJD zUS!fO8heCR^@~<(a1)>yZt34K7OZ*}tr#e&vy8N!cYpFlibV zlo>wAnIrV!FnFLb3L;>|gp*Owy>{~8HyKWXO^L*_Iyn=D!Qtc9dt~h_l2_PY^`^#35Bzy8_=Z0#VNkxmNO4ZfC$t2Q&-rpJ zrP}S4KFxAVIl0=<|B|+J`P;*Rv-@tXd*|2PypQc67v8EHdG*@9EN3_0feMM5#KG0Q z&q}99Q?vdeR7nnVT`fK`k&}I;zq=`W>C+MkW%HH3BEBI3ra^sRLD|>N!L`YmtByTL zgOi9#db9n9nXvX)^t-0F+>u_LHlh;ue$|kE9RHl*%WE9%hAbD0TZ$=xadq;$e@x*v z`DElhFWVaq=9jxVaHI_V)SOC!#|}CSJQ2G$kdvg$FmW$&{&`ELOpI05ZxD6h+L+Wo zDd|VK#Pv`;U$^#4zhmZmug|!IAlH@GKgmdvM$$TF9CE#@Rxv9HxLc-h!$a2@>m8wv zu}KBCA0hT>f0cXuvmdp-ynt;KL*~Jv91Wrzz zh*y$TU#+7;k3ck`NHo}JM4=IlMhqIH)pVK_`d#wU0n$u`z)HXnY!leRG=hLmn-*+s z^oNA5$6LM|w(|G_3@uiGt*`*lhcd;FxY0u9QN$HhrAhx7^FetIA)k&Jl|=7XOuzE5 zvUyy{V>Lb~x{wu(!Uo6@wn9->Kc5LDR1~F2pLe4fTSc1mWrYl`xJ89D)qo^J&3yE5 z?KgsVMv|Io?$W;MBUB}VAzwT0$Qh4 z@A7)3>P_`ZZQb6OJ356_n*T(&sbH2xzMT}?nGvRo+YDuepSH8}QD-RlMpri1N?XRN zF+#bC=1At*clP(K^e0L>p=I|(c(Ya#y#%2{=J>Oj(F$R!?awlbMXhd Pdeyt~#DM}3JzW0+;@W8a delta 1772 zcmZvbZ)h839LImpW!H8|`X{?CJu(woQ|3k|r}-64p&$%qb!=5k$n< zZM_41qkH3gV_#`eL=Z-h3Y~k=9vzGxM;Hj|D!M>-dB$MgL@ zzvuIP?)ThTmSS1Tm&aA|3CWuPKn}xGuii-li(OL^6>TZ+zL!=L*EV%UJBZ?~Uh#Ub zINK{u_lgs}qSz}kfwf!xk z>MedvqkW+vH9qjz;N$zBPJ#X}8C06lvOZ8ZYIRyEK^&ZR+&qd@(7w^uJujEv| zQm5hv-WZ>X&pPZDEU~Kq_ZVaIcro@Hvo?0v2Ac-PHca+84jBX3cz5S-J}rMZ_t1b{ zu>iur9-t4fdO~d+U42Q-hE`W*w)@TV-)<#RT13CQfTP7!M8C(Kb*gFyBlcbb9dcov}Rk`R;e{V6>H5*J!s``j1+ct)hayVsLcPJRSax$ zxxkMrTs88=THUDDKsK^D$=m4-*lXz{q#DOj=*M92zxuEnL-!gWWZu)*9DE-m5 O%DtryTdk^z!~X%&0Zl6a diff --git a/cinema/gb/mooneye-gb/acceptance/oam_dma/sources-dmgABCmgbS/test.sym b/cinema/gb/mooneye-gb/acceptance/oam_dma/sources-dmgABCmgbS/test.sym new file mode 100644 index 000000000..41fdbe3f1 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/oam_dma/sources-dmgABCmgbS/test.sym @@ -0,0 +1,113 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/oam_dma/sources-dmgABCmgbS.gb". + +[labels] +01:495d clear_oam +01:4967 clear_vram +01:4971 clear_wram +01:491a disable_lcd_safe +01:4920 disable_lcd_safe@wait_ly_0 +01:4938 memcmp +01:497b memcpy +01:4984 memset +01:4994 print_inline_string +01:4946 print_load_font +01:4952 print_newline +01:498d print_string +01:4890 quit +01:48a5 quit@cb_return +01:48aa quit@wait_ly_1 +01:48b0 quit@wait_ly_2 +01:48b6 quit@wait_ly_3 +01:48bc quit@wait_ly_4 +01:48c6 quit@success +01:48ed quit@failure +01:4902 quit@halt +01:4903 quit@halt_execution_0 +01:4906 reset_screen +01:4929 serial_send_byte +01:40a0 font +00:0150 main +00:015c prepare_part1 +00:015f test_0000 +00:0174 test_0000@quit_inline_1 +00:0189 test_3f00 +00:019e test_3f00@quit_inline_2 +00:01b3 test_4000 +00:01c8 test_4000@quit_inline_3 +00:01dd test_7f00 +00:01f2 test_7f00@quit_inline_4 +00:0207 prepare_part2 +00:0213 test_8000 +00:0228 test_8000@quit_inline_5 +00:023d test_9f00 +00:0252 test_9f00@quit_inline_6 +00:0267 prepare_part3 +00:0285 test_a000 +00:029a test_a000@quit_inline_7 +00:02af test_bf00 +00:02c4 test_bf00@quit_inline_8 +00:02d9 prepare_part4 +00:02ef test_c000 +00:0304 test_c000@quit_inline_9 +00:0319 test_df00 +00:032e test_df00@quit_inline_10 +00:0343 test_e000 +00:0358 test_e000@quit_inline_11 +00:036d test_fe00 +00:0385 test_fe00@quit_inline_12 +00:039a test_ff00 +00:03af test_ff00@quit_inline_13 +00:03c4 test_finish +00:03cb test_finish@quit_inline_14 +00:03dc check_oam +00:03e5 dma_proc +00:03ed dma_proc_end +00:03ed copy_dma_proc +00:03f9 copy_ram_pattern_1 +00:0402 ram_pattern_1 +00:04a2 copy_ram_pattern_2 +00:04ab ram_pattern_2 + +[definitions] +0000000a _sizeof_clear_oam +0000000a _sizeof_clear_vram +0000000a _sizeof_clear_wram +0000000f _sizeof_disable_lcd_safe +0000000e _sizeof_memcmp +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +0000000c _sizeof_main +00000003 _sizeof_prepare_part1 +0000002a _sizeof_test_0000 +0000002a _sizeof_test_3f00 +0000002a _sizeof_test_4000 +0000002a _sizeof_test_7f00 +0000000c _sizeof_prepare_part2 +0000002a _sizeof_test_8000 +0000002a _sizeof_test_9f00 +0000001e _sizeof_prepare_part3 +0000002a _sizeof_test_a000 +0000002a _sizeof_test_bf00 +00000016 _sizeof_prepare_part4 +0000002a _sizeof_test_c000 +0000002a _sizeof_test_df00 +0000002a _sizeof_test_e000 +0000002d _sizeof_test_fe00 +0000002a _sizeof_test_ff00 +00000018 _sizeof_test_finish +00000009 _sizeof_check_oam +00000008 _sizeof_dma_proc +00000000 _sizeof_dma_proc_end +0000000c _sizeof_copy_dma_proc +00000009 _sizeof_copy_ram_pattern_1 +000000a0 _sizeof_ram_pattern_1 +00000009 _sizeof_copy_ram_pattern_2 diff --git a/cinema/gb/mooneye-gb/acceptance/oam_dma_restart/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/oam_dma_restart/baseline_0000.png index b1b0446c43a653076edb07f1bf35ff8d448c5a2d..0f28c2cd93b6ec3c62c1a5a509be589157f01b07 100644 GIT binary patch delta 1003 zcmVGDo4T`$|uOg zO5v>0R{opmJ>F?C&iPz_BnK^K6=;9ra3@O~1dD@UaS$vHg2h3wI0zP}@kU2DC6qdA zP$;MKHd%6?e1Aw$R$j#I?Syv0L&&Cv;-dcYhmT*dQkiaV**133$M#s+q)Io1#6}qB z=D=EdtCC5r%Jp|bZx@}#&#`=&?)^SOj7k}M9;N+N?5l_#!>>p0!IoOH| z?_$M~L*mOq{CXGbyFR6!Y1!<{7F@YEE2Xx%srgoYJ>zszvFvF`^p6j;Y zCoi(BIC4mQS%_a>#gtK%{c-S+__7ec-mT}l=x^c6Ar2PDZyX#v<%5G!PyZLvPUGO< zDIXk+dVdZH=Vmjdi&n}92fLofbi|?EFe#hlXH%!uPk8l^_U~wAb;2{?mv-7ND&zDp4*7JCHT=XhgnyGo~sq`ir ztfiG(Yh6hV8HrJ|_PcrO{q&p~YrZRb?_`CX>?Bq4tPXt)hl{Lhrsl0@^YFOnLJ4tt zUcSLe-g+udk2@FzU9^)R1Qvh4f(xS$pTb*xR^<9#^sS6u!#(7}4dGEEX9t$H9BFE^ zaG zVPVHvLsGKy3;Xdbbxhrj^0V__+mtWP!M9Gp$D2a`Vp zD}N&{xcs!)&Z4YoS3LZjtf_pD+nrRD=MjCfEx2a5=ctzL)@~3MTtmMYw>@)2R`C8O z?@ikGegAq^y(?UIFa4CqMK?SzIvBr;aobTltrmx-0~{{Y(-3hWK(7oL*%4k1toj%Mts7vqiamPX0o$`^0hDMZ+kQE(BJSFa#48 Z{sXdQ-r{j{P_O_1002ovPDHLkV1oN<2=xE} delta 1007 zcmV_mZKmL1$9sU|Ch55*>yNdw+Qs4y;i+U#wfN_ zK(UEg-|zPVy8QWe01yj;#X+z*2o?vy;viTY1dH=pmStVn?f-IETrRiX+6|*GZL(W= zd)F$&iqjA2;k-V7%1SINs9IU&I@R@e3$0D8LahBdn>ZmooPTxKVyqT?srstxI2#^q zwa3#^{*(D>!PN?Ks_bf)xP6jZ)^}R4CGt}F&*A4H>v;03Qr2U8RhFBy?4>1upz_6d zmH!;uN3~ZhE77{h+BGI;lPZ31e2nvI`Oks#mN<-q#X+z*2o?vy;viTY1dD@UaS$vH zg2j2AuVOIk&VRmB&R~MbNltecW#ysM-Vp2;JcUhRHHAE0{*-!mlFd&1N$BjNKgVOG zZW`T`mEug~7-9X7_3ou0cTxHACt_?I(&NzBn@YZ|>^RMN$X}h@H0q*jc z`Qr~c2e%)sGY#XjJhb8(3wM&u`KOU2{oKJU7zc~f(|<+#^J)4@3mRWena9&IPkV3| zade)8XH7!3#*tITmlG#TpU%@xOV44Sw&2FvY?RvPrhEQ&b+zqv`#kL=gtXwaN4ujv z&il6DZ(d|sKnLln-7a z;|wL~IDdG_ln-9wE{k+K^HBPFa#BU&d;sNt5Z^r%UklhewJce!MVj)-LI3MPClh3nv;9c)>mw;*QeQ` z>dMD^!pOTe-8h;=+$`cmG%8CYq>QKd0QS-#mC6~IG@A5i#~EGk>a%A=muo% zB7edsls}96+^el>8kak?ui4FU7aehmadHms=%UMYs--m)&XOr#RCDara&{u=qMvx( z@hBJvlRpG2ef-y zd*%&U!PSY}5qn8K<2rTsGLAnf`cm)ef9Wl4N1Ze*n1yT?4Ii@nZqjnMuJ0~n`Q4;y zQP>^lo4=cMS_pQ>2@(8+@#S4edXbfXe0dkL{C;q?4ya#vE`U5#pEyaoXqW|)F$7VQ dE(8}A&R-(#Ak?!-GlKvC002ovPDHLkV1h&11i%0Q diff --git a/cinema/gb/mooneye-gb/acceptance/oam_dma_restart/test.gb b/cinema/gb/mooneye-gb/acceptance/oam_dma_restart/test.gb index 9f3d5fad70f03ee250587f9b6fd48b2889105085..431bbc0b04879154434cc8df2ae6a2b67c27fc95 100644 GIT binary patch delta 1095 zcmZo@U}|V!+Th2SY^(M8gUi2ugXrFr4l8KHTvCvth^o zr&o`DHDq|O{z1ost_PhDdLDE?=zGxnV8VlbyZ;Zm6+8Z)zGuhypbx}&_F3_R`{4~< ziVXkQG(cugUd1TS*uVJ{qrTlHhY#%af(`%A7I>ds;T@Eko>^RyT2#yc;scSk7m)nW zv0XzKDC<~UoLW?pnV$!jcJip&t|0``82 zAk7Rw!b*YRL!+a*>cIGc{cyi`?KAmz@;0sc z7gSCvGBhwUD6Bs`!~5%L^Rp4&9}h=(S8O~Xr6kNP@jV>Ks#4;X_`$`z{DhLk&x2=v3v#-)uT2#?mD)0^VP=kmwBBugDD36@gelX?Zm zQX8!mYv_m1Yh&+}fZsMC4R%InzI+}$>F-=wi%pu4j-{K>v!2R}^` z?L>a3}A@3@tL5%@xX(>|~jE)L`Esc5j63#nd2Fc}+A^E@vkzh0=s9N)=`nQ-`n+ z{^2FDO14~~nTIKq+xYQ)eN|rIH~~5)ZzhqycuR5wZVBB@hbN zgs)R_Kl(_@2u!6(8ajkvY#jWt_l0(aV?wnO#2fPvHwDtZ*ffFSwLQ zb~1HQPpL`VGA8VBt&9)|oa5VJ2?0!q`3Z-G-%dErl}s4oQYN?;5NU8v86|LDv@)cE z$f%F}8hsOwuFag|Ws-S^OUYzY|13c4sIOweZ(J&41Qx{ume7d_-G0Jf!fywxaU}!Z zFllNs!JS4XDYES=SppHh3NU5|GWYq+r10C!0j?zTESD0=hMpAlZ0K(=;0l*Yp1?F) znHo=|2R&hNm3ojfVS=A+yU=|;SOj~d?ViW2T3W`<)nKSnvo&pS?Jk7 z(orE}up. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/oam_dma_restart.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/oam_dma_restart.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 -00:0157 _wait_ly_5 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0151 main@wait_ly_5 +00:0157 main@wait_ly_6 00:0171 test_finish -00:01a1 hiram_test -00:01a6 _wait_ly_6 -00:01ac _wait_ly_7 -00:01c6 _wait_ly_8 -00:01cc _wait_ly_9 +00:01a8 hiram_test +00:01ad hiram_test@wait_ly_7 +00:01b3 hiram_test@wait_ly_8 +00:01cd hiram_test@wait_ly_9 +00:01d3 hiram_test@wait_ly_10 + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000021 _sizeof_main +00000037 _sizeof_test_finish diff --git a/cinema/gb/mooneye-gb/acceptance/oam_dma_start/test.gb b/cinema/gb/mooneye-gb/acceptance/oam_dma_start/test.gb index 88687e9c468007878e31da3ac49658ecd5bca8c0..d4ba64b11b250337fd0452d883f52a5c9d28ff3a 100644 GIT binary patch delta 1278 zcmai!Pe>F|9LL{`rJ?1&P1%fcW(eDeA|*&9ALFk7a)b#BG(1%37E+|Ng0`FOSXt}e zbrHowhoXbsHtQf=f?8G_mVpkHo#I{e&_PBPDJA#y-fYvl{>fo}Gru?Q`}zLn&Eq$U z!YT?on$HGsK;#11sq7e@7BiXVZ=a)DnZyHyc@E&bHYxD|44;)ih9AT5qW~F!2QfOg zhtA=3*ww|0I1SH{l68z&3;%PE5%)uE!rj9bUL40YYZF+G7W?qRm+(q4Ktbd~1E?Pj zp+Pi)hS4bU!+A8s`*7qdWY8c@zLO^-G+BfI4bx;P%Ih`6`t35CRUWw3@z=XY#@WkGS0{JldfRPh zD^P=ty6-AMI1WS{wi6Tv8=}{B>yMONN2nGwz|CBua*JV5X&Us&`pC`( z-VJNMWq?&C_*mA5cLoz&qO!{{s5K3q%KGST24wx@V|fg)-UOe>x_>v2a-j~%Vr*Ik z+1vuMtA~wI_1}@jLS8K{uqO!|34zyCR3<5^5(-mLn8!QLp;8xYetXO&}JDWCpMo{@|B?nZA zjGh+qOFfH)ONHnA+CLpr>2C^f!O*0%5;>RfLEo4}KrKe2I R3D(sQ+6yVHl8$aT`v+Q6i}cb}!99p9UPM7ct+41}dAL}17=}Wj-IFB;+e4HRSfzF_6aV*KW@uD2WQO;B z^S$r;-akpRNt#V^IYXw|W}a@Qq9ntv-GuGC$eBbfAOa2GcgZpLbMUm0emiv4C9$2~0m)(9Mt37;x-K42zKKc?rW~uB#=O{bw_jxI3l0RV(-sEH5AVW=j zXrljD8GpFUdGh~d)Lsm45LqTmvQ?FpyrZmkcs$1L-2Cx(Xw}kUY)uYhXjIJcq`>U{8*Awa=oY|$L z%CUs{+ew?h3Pf9bFl{k-v4V-eyZ`XWon5=tUT812tL-yJx}7)vY?t;@<)QgE%l~p@ z>u)bW?WGaJm&*Lq@s(n!Qg0Mj>d2)g|IYKf7h^lQlei@`i9)?zTxnElFNLC9Wql|2 zCK$Qc*WHY{0oM#%ikD`m za#MWE-K;-Ne*shVwm1b+d#zPyauz>V;aww?B4;so8W#m51%zwz!3z|5nAN;E`!1IT zQ~bK*HHxOytcBkeaI{th2Q`J?7cfTU2RT*n+!7pFM)-5NmwO`c91lFdm%Q}E`vQfQ z2Lgtcd@>!Wr_@4D9TFZ0OcoH1oDs+22@yz01_`s0A0#{_P?#_;V3^>%0+y!W$Rffo z%dOm!fMp`Ed<%FBMmO-hC}g4MB>_WE-ug3X#7F%aBz!F(SweV6KHv$XkT4k}T$lVH z;3t8?fL}SZ)G)z02cD?Pk57sS$HgkbJx9QEBJk8DKk%FrDD*rnU}(upuSh*FeI5c{ z6_At>KF3#O zfrO>Se{+Wdhn~>d)>6$h%H!^s+b!8~ALT~$h8%4F`xNS^r z`|){lZS2~dZY#K8@)1TUEkF(aH=4zbfLb0. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/oam_dma_start.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/oam_dma_start.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:015f test_round1 -00:0186 _wait_ly_4 -00:018c _wait_ly_5 +00:0186 test_round1@wait_ly_5 +00:018c test_round1@wait_ly_6 00:019c fail_round1 -00:01b0 _wait_ly_6 -00:01b6 _wait_ly_7 -00:01cc _print_results_halt_1 -00:01cf _test_failure_cb_0 -00:01d7 _print_sl_data55 -00:01ed _print_sl_out55 -00:01f0 finish_round1 -00:01fd test_round2 -00:022a _wait_ly_8 -00:0230 _wait_ly_9 -00:0240 fail_round2 -00:0254 _wait_ly_10 -00:025a _wait_ly_11 -00:0270 _print_results_halt_2 -00:0273 _test_failure_cb_1 -00:027b _print_sl_data56 -00:0291 _print_sl_out56 -00:0294 finish_round2 -00:0299 test_finish -00:c014 vector_10 -00:c016 vector_38 -00:c018 round1_oam -00:c019 round1_b +00:01a3 fail_round1@quit_inline_1 +00:01c2 finish_round1 +00:01cf test_round2 +00:01fc test_round2@wait_ly_7 +00:0202 test_round2@wait_ly_8 +00:0212 fail_round2 +00:0219 fail_round2@quit_inline_2 +00:0238 finish_round2 +00:023d test_finish +00:ff91 vector_10 +00:ff93 vector_38 +00:ff95 round1_oam +00:ff96 round1_b + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000002 _sizeof_vector_10 +00000002 _sizeof_vector_38 +00000001 _sizeof_round1_oam +00000001 _sizeof_round1_b +0000000f _sizeof_main +0000003d _sizeof_test_round1 +00000026 _sizeof_fail_round1 +0000000d _sizeof_finish_round1 +00000043 _sizeof_test_round2 +00000026 _sizeof_fail_round2 +00000005 _sizeof_finish_round2 diff --git a/cinema/gb/mooneye-gb/acceptance/oam_dma_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/oam_dma_timing/baseline_0000.png index b1b0446c43a653076edb07f1bf35ff8d448c5a2d..0f28c2cd93b6ec3c62c1a5a509be589157f01b07 100644 GIT binary patch delta 1003 zcmVGDo4T`$|uOg zO5v>0R{opmJ>F?C&iPz_BnK^K6=;9ra3@O~1dD@UaS$vHg2h3wI0zP}@kU2DC6qdA zP$;MKHd%6?e1Aw$R$j#I?Syv0L&&Cv;-dcYhmT*dQkiaV**133$M#s+q)Io1#6}qB z=D=EdtCC5r%Jp|bZx@}#&#`=&?)^SOj7k}M9;N+N?5l_#!>>p0!IoOH| z?_$M~L*mOq{CXGbyFR6!Y1!<{7F@YEE2Xx%srgoYJ>zszvFvF`^p6j;Y zCoi(BIC4mQS%_a>#gtK%{c-S+__7ec-mT}l=x^c6Ar2PDZyX#v<%5G!PyZLvPUGO< zDIXk+dVdZH=Vmjdi&n}92fLofbi|?EFe#hlXH%!uPk8l^_U~wAb;2{?mv-7ND&zDp4*7JCHT=XhgnyGo~sq`ir ztfiG(Yh6hV8HrJ|_PcrO{q&p~YrZRb?_`CX>?Bq4tPXt)hl{Lhrsl0@^YFOnLJ4tt zUcSLe-g+udk2@FzU9^)R1Qvh4f(xS$pTb*xR^<9#^sS6u!#(7}4dGEEX9t$H9BFE^ zaG zVPVHvLsGKy3;Xdbbxhrj^0V__+mtWP!M9Gp$D2a`Vp zD}N&{xcs!)&Z4YoS3LZjtf_pD+nrRD=MjCfEx2a5=ctzL)@~3MTtmMYw>@)2R`C8O z?@ikGegAq^y(?UIFa4CqMK?SzIvBr;aobTltrmx-0~{{Y(-3hWK(7oL*%4k1toj%Mts7vqiamPX0o$`^0hDMZ+kQE(BJSFa#48 Z{sXdQ-r{j{P_O_1002ovPDHLkV1oN<2=xE} delta 1007 zcmV_mZKmL1$9sU|Ch55*>yNdw+Qs4y;i+U#wfN_ zK(UEg-|zPVy8QWe01yj;#X+z*2o?vy;viTY1dH=pmStVn?f-IETrRiX+6|*GZL(W= zd)F$&iqjA2;k-V7%1SINs9IU&I@R@e3$0D8LahBdn>ZmooPTxKVyqT?srstxI2#^q zwa3#^{*(D>!PN?Ks_bf)xP6jZ)^}R4CGt}F&*A4H>v;03Qr2U8RhFBy?4>1upz_6d zmH!;uN3~ZhE77{h+BGI;lPZ31e2nvI`Oks#mN<-q#X+z*2o?vy;viTY1dD@UaS$vH zg2j2AuVOIk&VRmB&R~MbNltecW#ysM-Vp2;JcUhRHHAE0{*-!mlFd&1N$BjNKgVOG zZW`T`mEug~7-9X7_3ou0cTxHACt_?I(&NzBn@YZ|>^RMN$X}h@H0q*jc z`Qr~c2e%)sGY#XjJhb8(3wM&u`KOU2{oKJU7zc~f(|<+#^J)4@3mRWena9&IPkV3| zade)8XH7!3#*tITmlG#TpU%@xOV44Sw&2FvY?RvPrhEQ&b+zqv`#kL=gtXwaN4ujv z&il6DZ(d|sKnLln-7a z;|wL~IDdG_ln-9wE{k+K^HBPFa#BU&d;sNt5Z^r%UklhewJce!MVj)-LI3MPClh3nv;9c)>mw;*QeQ` z>dMD^!pOTe-8h;=+$`cmG%8CYq>QKd0QS-#mC6~IG@A5i#~EGk>a%A=muo% zB7edsls}96+^el>8kak?ui4FU7aehmadHms=%UMYs--m)&XOr#RCDara&{u=qMvx( z@hBJvlRpG2ef-y zd*%&U!PSY}5qn8K<2rTsGLAnf`cm)ef9Wl4N1Ze*n1yT?4Ii@nZqjnMuJ0~n`Q4;y zQP>^lo4=cMS_pQ>2@(8+@#S4edXbfXe0dkL{C;q?4ya#vE`U5#pEyaoXqW|)F$7VQ dE(8}A&R-(#Ak?!-GlKvC002ovPDHLkV1h&11i%0Q diff --git a/cinema/gb/mooneye-gb/acceptance/oam_dma_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/oam_dma_timing/test.gb index af20b3fbfb73ac4e8b9a92422450e192a0da39df..73939fa9e62edd384ed06cc4f070691aba1425c1 100644 GIT binary patch delta 1117 zcmaizO=uHA7=~w4+DhYJjFF{+oefeWqF5A^qRTdE)0hb^RG|eADmF?`Z0Y7u6WiUY z)$}(x_Ufsj(^dK#&UvEG(4);{Mp+5pbt6rRKrcp6XP zSv-R?IL#Y)ic1;!FFb>1&7`o-k#2P{%zBD_52*gOF|TN+g-R4CwdMpOv)0hz-6JNqR5P9&R%| z)#KJI_;==Z)2)>R{whJBERbzQXO*I>tgr>4DnX=DpwTPB$qho>6q4%W-Z_MJG;>N)2XhV^Uc35^7eB#oyuMrg1ef%ntrjxGRpJB$4| zfDsP!E-diBakrX8X4TQv(yh+F*D%A6VMq2Vpbc(ng+s-r%Z`=CmGfSWJFK`sm%xxl zHH}6JE#F(Nj1PP|sc}GI0L-d$Xd{0~??XS-J~aGhwb|=-vOjximhd{+UrlxMt6p~V OgZ>)jw56|1&&5BgYr%v7 delta 1405 zcmY+EPiPZC6vpRmY?3CiOB7#%|t%9*>n3{@De+ zh!@3!JxTQ<2onE6(L-4*N|$931ofl@Q4dk1P(>Rw@y$$js3E(|_w9SX@6C{nWhs`W zJlF>Zsktye(!4?&c)vy)X{ZxRw_1tY0EdY;pPRK>3tPhW=Ql5YZfUlvde}arciIpp z-eNA@sz+^f+z;5+#aCZu_vUrd45k?L#zW|VE05=3AbmX^dNep6GS5Do>rJXr?bkT2 zCX!L@H*;oahq^AR{n+m4!~#OAvx_;Tz!c%D!Ipb*Zt0Znj8m-*)rM=u+MaZxHkkfX z%gx5~-uk?^Bk#3}I-T^aypDa%rEL>;O&SXZx;lEoYnN|WwK++&zX@W))w~xow8&UC zS14DqV`bt|gMA0sy%DyjQ`@1+YoeKQIXhMRY&uhnMFPhADZxbjB|MP;-xkc_O4VnYx&aGTuHwoRQtep zfrD1Zagsx@t-xjtP)gk4)NaUfsbmP0#DkrbG{7!3BKFf%0-1e27~_<|Ox&Q37{FFJls9cKXa`!WT@K<4PjmaVe4PWa^@xQj@r4OjzVv z86pta!?(i{0+~)Q6G5{eG`wa%{pxtVxc~qF diff --git a/cinema/gb/mooneye-gb/acceptance/oam_dma_timing/test.sym b/cinema/gb/mooneye-gb/acceptance/oam_dma_timing/test.sym index bcd8a4683..5c38cd42c 100644 --- a/cinema/gb/mooneye-gb/acceptance/oam_dma_timing/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/oam_dma_timing/test.sym @@ -1,199 +1,130 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/oam_dma_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/oam_dma_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 -00:0157 _wait_ly_5 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0151 main@wait_ly_5 +00:0157 main@wait_ly_6 00:0171 test_finish -00:01a1 hiram_test -00:01a6 _wait_ly_6 -00:01ac _wait_ly_7 -00:01bd _wait_ly_8 -00:01c3 _wait_ly_9 +00:01a8 hiram_test +00:01ad hiram_test@wait_ly_7 +00:01b3 hiram_test@wait_ly_8 +00:01c4 hiram_test@wait_ly_9 +00:01ca hiram_test@wait_ly_10 + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000021 _sizeof_main +00000037 _sizeof_test_finish diff --git a/cinema/gb/mooneye-gb/acceptance/pop_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/pop_timing/baseline_0000.png index ed95678637482a10e6d8c1fd6e3b2edadecf7e18..32f724934ecec8184aeb6b9be2587ca57d9c5d4d 100644 GIT binary patch literal 1230 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|U!cPZ!6KiaBrRUYxX9OMvZT z$i4qlZN-0fZxwNCQS6(4*L-&;r(cdEn?~%lQr`uq>&w|0iXAstaEP%Ve54Q|!_wWH zP-v&QG&S;5_Vg_kkz$u#E7a_(-_$>Mw%zxm{?8VbMR%t=AFs=Px_?e;?Dbn0ZBE^r z$9|vx`j;&cKB5!9)fFFbTQTA1>VwNoGk-t(KKbZc*RHU2@4oN&{^w}a&kra6i}r7= z-BY&p{-E$vDy}lb5`-c0;xvs*iFSP%k?V0!f%8Um!=j?-; zq&|zRsDETINtLhZD2iJzTV9xGChXNLDDjksZ}Qt?CwF&mI?ZW!@}mBY)<;(Y?wQ2x zyI#0{YVr~JmUC*qephF0_Uz5;>Fj;7ecKc7+}9qKWq%wcau;WLL~fdB9Y;!NPW~&i&FWTWv0> z?k|a%VW1yB-z!~z*R~^HwZLLF>$aEn8~eUf?YTUkU3zZ!L7N+@`)%}|6!%}&u;dHQ zD)?}JPNmlz3*Pjw*b5s`SW!2dI=&jt~JLmozQ~5tJDW4PE7ac9; zd}{M!i>@kv+i_<(9lvzB7@th5Q#beBSr&KnyY;E^ocZ^rvR4OM>s{=-Ui|sN#b}Ew z+svd^eGRC)T%6hS`NrYgf00_j%8KZ~Jppm;K$be(~uOml^gyT+b$c`|u*s z$F++Cb>}(n{#h*j`^oKT^-|BPe|&%A^!UKlX{$u;oA*5qTjl>|>Zk7a`?qP$k7?GA zZMgpWy!EN2TWfYK{xdzkLHP5*Prz^lrf@W;0o{99|3>z|9~H`TZvDUDIOVz8(o;_q zlvg(2`FUr_wAh~MpNpF8%sZ#u?6!V?G4aDE&lvYbHs&i|82z{_D90G;BJ(MsaM2xo ztI%mqd~t2E)8F{?7Rv>`6OYx&%6eG%XwIp*=Y6g2woad9^6kzNZ|g3%3(wX5F8lmv ziiJDJt&>J=CvSQGI5^{5#hlHZMf+crxT|aX&H2nBB~~H0rISs6%I61nmlhgaX*aug zs#2-$2*JV91k<;H1ceu!ajY1ke3v{hVyRrRzW~sGRb2^>bP0 Hl+XkKlYnOD literal 1255 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|U!CPZ!6KiaBrRo}RYYfXBsm z{-6K)>0&b#<#JByuM~W`YxX+`$6YllWqVIF@JhA7em#){#{Bl8U`qcCJs>+k*@A97g`PZM5(uVm9vXY;^4!OQx zXNuXx9*^IlW`Qxc<~+WXyhP6CO3l^MDZJiWfBk*Aali3>xtLsqr6=8-A62S-U9xz&5S8m`W*J$mjD%S0o~+zj;}JjeGOP@5wZwtT|% zx6xaxix(NcNqL&m@lU4Tr1bJi-+LNfipRN*+b_uvfAiuWd!ngJcxSQR>v>;(OFr*# zoB8r!`uEs5^=G&9N?-9c&u>xf`6v?_RkwW zPwY8lBO&v|=0@3$(>4`s*KI6r#)@x0-CU~l)Y)w^mA?Mtk=rOm(1DQkMh+pl+QDuNRJ zuK0C6BeUg`weoa7`_qE|p4$1R^oGArSvu>+-&J>RH($?>bL%!yl}Xte`02rCv&b8M zZ;E*PinCrn-dbnx-@7{1p|Eee%DVI;ENvN(bOekUvP@B70u^1H6}$D1Z|Pm9(q{Iu}S z(U$oMChHCgD_X@b&sw|LOYQ&jAVcMw{;kJ&E?W0lZ)>UqrFcx20yDyACT;)qGdBd^ zd!hGVUD%~EKPc<$ze$$wYVw25>s@=B<9Fe^nxRp2;d5gvktLI4jl8COS9^I>B1Ni9 zumG4cgr8Pk+^KmuD*SMjY`Fd3j!%1DtkMjBT==Kt>ACM}rsavMo>A5LmoD@z68y5) zbH8y#UDteV7TJ`w;YQ)yJI{8;7s>)nc-iL|CS(7XFoov_pX#fo*Zw(w zYqOI{k=z`ad$Xt1{Q2_u*-5s$9i9~dTKH0+Js(wrl7DWgUx)Q;SM6^Yh@+P99a;HH08~ zLsE-N6w(qib5c_nPOcCC&=C*RqM*QV+F3&rq?rLoSSc`kX!QTkwNr!VY%9n@MFj>C ziF#2W%O9jxf*Z(EfB=Tm-e8SxFpUlVA39MrV%G<84#?(UumMgm1DgFm^k6ff9>eBn zutsN?#wPy{-Pkmu>qFR_3^u?8W~fi@^qX zzzk^j|1g1&0YLu)1FIUW(Fdln&HqC`A&nq?hYP%g!I9<&j9e*TtV)A{}#eR|f)`>dMx*%WU@h8ZUn9sZyG z_rc{~zrrsdIRQ+<*;UIG)Y+K%SnI_&7=4SgCK*e1LFtw!~Nd1&*b09+qC9iP&ui{(7?!`u>SB2@2{uL w&qjEEJRIR&vGIhIk}$W#_i!MqN{L(I2N(156G{?451w7+NAV|~-MGs}MSh_5WAhez=IjDyyQc$T4n)v2TcCaB?-uLZ$zwhmkEf$qx zQF%5(m0z=SXXrT9edgztx4#b8>ZOR!ydG&WsgF3DsW`3pO>pd`IH?4&S_LnF)f#wh zSbYJn6|3)yr_*!PQ$H~k^1kR_Z#Hf`U+##i0c~Rps)=Yo`^}vN)}-zYXg_nRrzP-FYRJ+HjaDBk4_JUO^50nSX+48A)xZEHAQ%)_0($2oLb1d!D zvk^A!6w?uytNlMV@z`KNucxhPmv2w&{+)-SMEe^iCcU3_g1Y7(O{OyWLUJ@u9H#Sc zFTYlO=6tM&mar#~$mf%zg-mWlHpMa%^ReB~NZ(^iu#n6b*l;4FCx?ht37fYn+s(;} zYVz$2u^ySOs^(aAyE#7L?9y+-uLFK+HEf=YweyiLU9}zTD?qh1dTZZJi!AA zK{ugO_>F`EsANJfN||7v1Eh|gGDzrIG0Kq&AOkM)3it*bU4uD^ZIXE(rDXE09|;gY z>I;zY6s0mm=)AbW6Ph5Q%}sbG{6@e>R5IWjmxd-2>`TBTS^oG+l2AWZ9?skb%vP5f z6@G)+jY=~6P)a0UdQ|lDrLRK3d6Y_;&`Z2BG)!oQgpiwXM@%#lrclX*8I&@?z6s2i z=qWm(3u2Tn?FD4Ji(D0c1NjLRA`SkZ`+-_AVQVWADuzivU2k^QQ. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/pop_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/pop_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:02ad test_finish + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +0000015d _sizeof_main diff --git a/cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCXmgb/manifest.yml b/cinema/gb/mooneye-gb/acceptance/ppu/hblank_ly_scx_timing-GS/manifest.yml similarity index 100% rename from cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCXmgb/manifest.yml rename to cinema/gb/mooneye-gb/acceptance/ppu/hblank_ly_scx_timing-GS/manifest.yml diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_0_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/ppu/hblank_ly_scx_timing-GS/test.gb similarity index 95% rename from cinema/gb/mooneye-gb/acceptance/gpu/intr_2_0_timing/test.gb rename to cinema/gb/mooneye-gb/acceptance/ppu/hblank_ly_scx_timing-GS/test.gb index aa8bd6e1310fb12ed9754983d399882e70a6bee0..f5109ff84a9be60b783bd1166d0e31fb5c3a6281 100644 GIT binary patch delta 1181 zcmZo@U}|V!+Th1nuf_WLgUi2ugO!gBTxGXq22 zu0zY1VH}3K-9Vn0lbkb51dFsC;{#_T6Hrtj>8}Tyk0}du05RHe>1HNYcRe$z-@s0@ zVMR^6<~x{R{&tq|uNAgT&wU51i^BI6v@y;AJQHz`^d%1NXxYo*-N6PC$x<)B8?7V6u20;b~#t-a=Lp*Dr$-k4gY0bZ&a#E3@fssLB{oz>8 yucyt=%6fi0EbCdZ@r0C;Ft^0_a3HHniCf|a7xVHHN)kU=51vi)JPM4CJ~IGF_SCTe delta 1508 zcmZvbOK1~89L8rhX_F@DBW~5Df}M?`5kV?~R>jz~O_P|_XcDa8p^66&iWl)geQZE4 z;zdvPB*lv;NYn~N4`s0^UDibqR6Hnq&>o^lp^9y^iT|0&4lTOmG2fSOe&2tGY_TX6 zi_*h=SpRllcBa32ja1N&mz>t$XVK&b983DS zDkZ(jg1t6nZ%^5^j7moAkfiq1tm@+7hVPP4qo<`|g@1MPy5*Z9NLj$`k{!~N;Mh*@ zi=AUfyz8aMJu^Q2{G+Lkh#XXY4Z>)1>GeH{UH9_UaHd94Kj7Vv6KB=NA9z|>g zb(g0W_gNEW$?0|aoQ$(47Iu1Kf1KoGTWZOe#ngYs)c=_?j0}7|MMn+f63KMFkjUkc zO*H!Irk@qRF&^E9ODq$N=ktkNA)VbPLecc_cyuKM@f#Ki6%zRZ8HlH~L_adiVdGMH znQ^f!8+1CIpCTHm$i`r0nK3kMuh1^Qy93^GC2Z`9w$d%roz-^o6`;x|b{BAwHJ7*ePIxml(K6Q(xRwqh9d;2EDilQaWW z6!k_t$}cl%b=ey=t4j&O6Y;&X5oJS7W~_Cz8t9f@`d)TLOc}>DdW4OH#9<8j7_Gtu z*BYo>vJ53MKB?*TY_G`bZnke}_Ll4Si|BpVN-T{&cm0%zzI82aan!7h<-8qR{sP|E B;`RUl diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/hblank_ly_scx_timing-GS/test.sym b/cinema/gb/mooneye-gb/acceptance/ppu/hblank_ly_scx_timing-GS/test.sym new file mode 100644 index 000000000..d8b8c49b7 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/ppu/hblank_ly_scx_timing-GS/test.sym @@ -0,0 +1,100 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/ppu/hblank_ly_scx_timing-GS.gb". + +[labels] +01:4940 clear_vram +01:48ff disable_lcd_safe +01:4905 disable_lcd_safe@wait_ly_0 +01:4954 memcpy +01:495d memset +01:491d print_hex4 +01:494a print_hex8 +01:496d print_inline_string +01:4929 print_load_font +01:4935 print_newline +01:47f0 print_reg_dump +01:4966 print_string +01:4875 quit +01:488a quit@cb_return +01:488f quit@wait_ly_1 +01:4895 quit@wait_ly_2 +01:489b quit@wait_ly_3 +01:48a1 quit@wait_ly_4 +01:48ab quit@success +01:48d2 quit@failure +01:48e7 quit@halt +01:48e8 quit@halt_execution_0 +01:48eb reset_screen +01:490e serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0151 main@wait_ly_5 +00:0157 main@wait_ly_6 +00:0395 main@quit_inline_1 +00:03a6 test_fail +00:03ce test_fail@quit_inline_2 +00:03fc standard_delay +00:0414 setup_and_wait +00:0414 setup_and_wait@wait_ly_7 +00:041a setup_and_wait@wait_ly_8 +00:042e fail_halt +00:0435 fail_halt@quit_inline_3 + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000256 _sizeof_main +00000056 _sizeof_test_fail +00000018 _sizeof_standard_delay +0000001a _sizeof_setup_and_wait diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/intr_1_2_timing-GS/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/ppu/intr_1_2_timing-GS/baseline_0000.png new file mode 100644 index 0000000000000000000000000000000000000000..be650fa9ce32cdd5c050ca0db86ea4e159f26f1d GIT binary patch literal 1171 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QHxr;B4q#hkZu?`~SGAi!3t z{r>-{cdg5NQWIQebUvQ`ZuZ>_KEDjdpMlR(Bh@ZEy?>X{L5D+({oo^o2pN{{=7d54 zopaf7PhEXnCs+IXaMZ64xBi8n z$+q6lxAgwA%covWe;a!=K=TxP+;4vN<6Cd-UcBRm_=#rG$Ez+*|EF(UwJ$hn(r2sx zUYuTMf*1VhboQTSf#y`dbob+1qywaS7EC)=@vFV=(?`4ANlGW#Eq}4@4v>*D+7^FQ z`~Kp`J&QMY#nt=gnyf7BSZTH)k*A{M$j+eKvsKPnxUGJnRC(^{<%j3iyB3Mts#a+4 zb5qP)xYQ(N#jkln=@Tbp7yMqoHNC1P@B35D!oCS#_Au*buyCerowd8a!=m@)-pUu9FTZTr`z!dZ(4Fbox`sT*EGJ#L z&Y^j*+5YQhDV|f->#GiFujDYgm$I{jQ&#GQ;9Z~Dw^sKv)=d7r`o*K#3D?h_Ui$Nf ztmo7HC%vkkGUywHU3}nitn9C`*BxgS41m>MutSD-ahCn>6sFH zX}K(qq-T_Cv-sS%3DXldMTx$;T35RNHD}iP_M*>wUPSFvIkW!4wkC%A%{2+x zefZPd&P18Lw&!mBxwyr6QMg<6rez!Dc2|3UP~Cm;Aj?7DFya1;>Eb&p<4R1v{f$bV zQ+E8fn%zl%y9p*bADXnHV5yC->8RrdSiH{J{-7n8dGpcFF6VwP((ipydM41Qs!(?R zzt3K83uW#rka`uO%+#iZ+_b%4m zdaUr~>X-k2uvR45M9AGj&JHLJ#Oi7+f_L`kP5SHc;DoX3zSn9;k4m08`�rOCYP zxS4XY=`!Ef&rVT!6l7bmc6N%4(%QS4&v$uFzJFTU>ALT%c^@WqE-{Zhy-B5h@-MG{ z7Vhyc?RR*%e%#C5zBkTWy?4!Q5ugd4hne&z0TTl&a`0hs2qIgP;Db6Mw<&;$S_z(A1z literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/intr_2_mode3_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/ppu/intr_1_2_timing-GS/test.gb similarity index 95% rename from cinema/gb/mooneye-gb/acceptance/gpu/intr_2_mode3_timing/test.gb rename to cinema/gb/mooneye-gb/acceptance/ppu/intr_1_2_timing-GS/test.gb index c7b2b105288c4c5b3c86a482d6489971af04b759..8fa1403c24d9961c63554c4fb3d5ccf741d3cbf3 100644 GIT binary patch delta 1138 zcmaizUq}=|9LHzZ%Fs&B^I|c`*(2;CiUgsMT=xF>Cr8@IK%s|-yy7TQJPA9~U8}3} z@7bHLJ=xouK1eS?EGI65-jtKXlJ5d#{LyH*e<0HP z_}}M1TWrZ!WwW=!(E)h>Zsbw82k2@SN!+0bgdiRCoikxTheimLKIa~V7Y z)tv01nPh6Ya+*QAfi$wf76()$GFA-k&DqN_D|cE30mtBlL?-t#kpHWE+X90Q_*^0r zdx5*TeC2zVLC7(POJsU~1G!+&4=u3S0bfdFYJV`#WKdbl<8R8Lv6mYtc~O_yd10!4ygULZS)P?4fJuW$ryMS_k( zfljXrlWI?`8jZ-PLq-qc!K}`UxpcPh>J{d(Ie7L+$%(`A$)l%_*Lf~_#X;j5dP*Zk zV~EBx8pAX=k0=D_b5|Dux2@s;4q}Ac1s4{DKe$yJLT1&G75lEIKkAqfMlq{4nRgv- z>T4C*vMcOz>GCD7&Q~ff5E2YtsIrp=RW-)I$_p7XAZpF)Oelp&o)FNa%8~y^!WyNv; delta 1502 zcmZvbO=ufe6ou~_*|IFjKguNO;6VLGEk$jhI0O>65XG`BONypZutXi`B9tz=NXaIo z3C_<5+D*x(UDc~%vIzu&^3!74g&ArZJPbpjkhYt)vq-&A+F;_A*h(wqzWX#UHm%S| z?;M@?ojVUry{^^k+O6Zve)!tP`gHpf-onpMdCSaovRcsbzhVFog`O*Gk#>Y{o*?77 zKDluq=KOyDyT1>#I}J1DoHzR&76X5)kY&w52OV!Mt2GB`^=Rd-BGM$NIrOI&?%9Q4pGB03|{XmgqEnltinOw=rPlMY` zIhUKeoJ&pJ5!2c70AZn}J9DjF&Z&8SuXPcx5xn$P$~lr55?j_r+q?Nggc`rnUEo`+O}8sQwgsmxK9C#mItRpbwEa%eH9(uzA@XHp1d?@Qn0u-h25**TKEl`;~H zVfHb}7?&^b%E(+GPn!XDP3{#;KxTi){6_kc$yP}zAf% zqM;WX2E&H$rQa?1g_J7zLrB|D4c=*FLRs9tmIoH6 zRYWj*kU0=C)6(xU$4DvWQIZNNhMtvqG4xq1c$cJB1a?}iY=av5uwgiC_(<;PHhe}( zH7t@;4cF5EnUYFoqb^0-Rz{w+F^ETXZG{ZpH|Tup_Shm{WkQADtbS(tnE>^bN4YDIrt1_ C8{p3X diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/intr_1_2_timing-GS/test.sym b/cinema/gb/mooneye-gb/acceptance/ppu/intr_1_2_timing-GS/test.sym new file mode 100644 index 000000000..f7af1ea3d --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/ppu/intr_1_2_timing-GS/test.sym @@ -0,0 +1,130 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/ppu/intr_1_2_timing-GS.gb". + +[labels] +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0151 main@wait_ly_5 +00:0157 main@wait_ly_6 +00:01b2 setup_and_wait_mode1 +00:01b2 setup_and_wait_mode1@wait_ly_7 +00:01c5 setup_and_wait_mode2 +00:01d2 fail_halt +00:01d9 fail_halt@quit_inline_1 + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000062 _sizeof_main +00000013 _sizeof_setup_and_wait_mode1 +0000000d _sizeof_setup_and_wait_mode2 diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_0_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_0_timing/baseline_0000.png new file mode 100644 index 0000000000000000000000000000000000000000..63c6fe09d4e74bd8e635742aa792a20761712056 GIT binary patch literal 1176 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QIEr;B4q#hkZu?{1o-Ai!q0 z_5J@-&kl)XD=s+XBeVbQzLSyHAL!^R*uUDeE}JR#pN%ZTkEVn|0Uf@kqmCOaIKM~N@JsUR!-S# z&%bSMbk({DAKr<7A3tlbUg-2Jy2;=BQr+Wi>0fVag=&}gSKCzm>tFlj;pG3To|W3~ z@49sVdB)R{=l{a5256pQo&UG}P~qxtavFMn**0yslxceG(*M-7^W|PX1$NJOUs-Tu z59_J<7CkAQ&1eqg;VW5kx8+g_%i5A>m-UaGe181Rs!o>qPb9>1oJzA+Z2qek_Vbx>$F&l8*JOB?YOt}R{tBF*|Od>cIQG~n?@XcdCJ3Q`SQ0%=U44|x2w2gcPIb* z;==zk$|eVMZi_wfe0q7<*KMIeayFF{pWf=%v3enQ*e5bKFZB$+;rYp-U+lKJ>uq9t zq%*0jexm4>rwrOJ*t>-{%GczaY13cwTv#(`v3yPcwY5#hWz`{xp-vZuh(^Z z-qf`0zQ8Y*zCk|6bnf>55p%t~ghS_7R^Rk8C_4P-!>$)$`&iDbKe_K(@EN;93%|Z~ zbzXat;r3LCxr^ibH*c-mvelMjvvOo+UdqRtLN%w?l^ggKOf2oRkrCUuA*`|@c8mGn z*IT;_zp>xj{6oQhr$R&34OA=nYC2 zxn7ofEuZhywAVZJ*Imot-Ch3fdu;Z3?U(ZfjxXNwP5)W;+G|g_KjpM>S=GTee<&md+%eoB>w#WoItzG=6urwum66R zeR@Uj-06G1|Bp*QI8w90=1Vg?N1!_poJ|M|c7D3IUpe#mORp*4 z)j}uFI&Zq#=X>Afe)apaOJ;R=e!Wmxm;iDEdJBw V#<$f5I?kXH$J5o%Wt~$(699P*Jv#sZ literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/intr_1_2_timing-GS/test.gb b/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_0_timing/test.gb similarity index 95% rename from cinema/gb/mooneye-gb/acceptance/gpu/intr_1_2_timing-GS/test.gb rename to cinema/gb/mooneye-gb/acceptance/ppu/intr_2_0_timing/test.gb index ee87fd9e14b170cfad0e8d524165aa95e3521a61..2e0e224b63fe8b6ce2579d797b541386425f7775 100644 GIT binary patch delta 1153 zcmaizUq}=|9LHz($`h^Bu8YkeXOFOpC=!B1a@o7{Uyih5fkF=vd4&`y-Vt_YyH?iu z_w3Erp6qQcAEcKcmJ^p_A&B1R#p_Kb4#_`x*X(ZF-I?ODznS0cem~#e><&LgVHJg4 zxWUNvOolXN6L5=;vv7+Ki6V&9l$D%;|V;Dr|=}6 z!P9saCj>X1;p4efS}4WSX0n#yNvpQdPK|@qK9F{00o<@=7u*ma4yd>SZa)DUW+-E> zw$;`{+)jr7!BEZ^K*oEtSi){KzO6j1VWGs`Olj$phE)$WK<#( zpZrIRF>@O{1SdGzOEbyTa^*CG_61VN0$UtVk;r&4xHo5S$E~A0!eDgyKY<9p`5}Do~%yaq55zC;>F?b`9 z*@Fz|_tT#>Y=IpP_*x=~gFuth29U=(v;aNaYI>@ttyRn4mB&N3W($Hvf>2%{JBp?v zMRQ)^2-=DS9fbm&whxnRPp%pb$f!j|FXF+R&WpKJwy+Tk^VmE*SK>N$SUy>L=4h?= zl205muA`?kVl;+nJfkr}gY$|)kj}eq5pX*y4&o3-xLv5iqVOBHYQxB^`h3Oi{M2Wi z_TeaI)kd@R;ijIh$d=W!%kJgNKAo>rsz9^I5Vw{<=jS@YktMYZGJJ{p`^aZvt3vI0O^v>A^-pY delta 1489 zcmZvbOK1~89L8rhZJH)&o48e%3U)S%LSF_X z5ifeOCn;V8MdAyJ9_nIIx-5$zs3&C)>LETTR;gVz@jo-WLq$V&neW?ge&2tGq*9S8 z73t0}*1tZUpBt=SBre=96IV?)Qj*iKZ(&3~_B7t(tzo%uepASJ|MKbgP4z}q4H+lZ zRs)BSy_ijP*4hnltPiQ>wKlf;GP64e%zomgVotj1bo@MlW-Oc{TvW47%5Qt^www*$ zMnNSLb{(sI4XeI%obekZ8Vs~IuL!MfTeo~;0x7?7P_m<%61o2wyF2dn&9&&K?#^~4 z;u$>?m8$~y4JWR#`iVtyLC8$&B*70#Bn~Mb?C^3A2$q?ZmWEFrp!8~aQ;p==a zWg=j<`pie%=S)1ylt8{_QXuKc)Oel{9a$x4SY%r2M>w#Hy$)>%Ktt4TSjBy>VLel# zp_fU~VC@H_#yn{N;k|q-MM{8-_{gK+>u_`)^9+j#<|QTtlTLk&gXmEogofKpN`nYb z@dvb_85-LChUeV(3f?d!3O-S(E264*3beCF~8wF-{Cb}VM;ViGASCY)4+VdJV`@%ns22; z2LajPBVTdfL%w5*A$9tjn`c@uVQN#2RpO`*&$ZZdSu. +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/ppu/intr_2_0_timing.gb". + +[labels] +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0151 main@wait_ly_5 +00:0157 main@wait_ly_6 +00:01b0 setup_and_wait_mode2 +00:01b0 setup_and_wait_mode2@wait_ly_7 +00:01d3 setup_and_wait_mode0 +00:01e0 fail_halt +00:01e7 fail_halt@quit_inline_1 + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000060 _sizeof_main +00000023 _sizeof_setup_and_wait_mode2 +0000000d _sizeof_setup_and_wait_mode0 diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode0_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode0_timing/baseline_0000.png new file mode 100644 index 0000000000000000000000000000000000000000..5c81925448af4ad18ca3d0e5f9ee04a1a2eb6679 GIT binary patch literal 1189 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QHrr;B4q#hkZu?`~SGAi!3r z{r>-{cdpwyT6vUsUO(~ve%AAfu~1Y%ozS-0`@%0iJ%7n^AWA@ouj#1c1`7@`_JfZU zBIbm9W!~QQ=ibuDJ-O0nUn}gnSHG$M(AgQkUrn?O*|@#RlxNQMuK$m7e(#IkSvjqC z58plZ=&C9mHRqJydn^z3E^&Gm+@$Y)sqpdd6R+-Rg=&|duePiH=dNwH=hNz}xb2@; zYy8bU7pBLb_kNYy)I~8LtoCWjL~s4>P?&jNfm^$G_pyjS@oC?xmLFkxURvwH>vd+k z!%yM%c{+vY?mXDnS0WKG%coH^-LCGUzuo=xa9*LB3CS@VxUVi;csDl@U_L zdTq{YS1j7Q>g;JrwZ7*?=_hS>{J*>{y=u<(-$wbW|9mDbxGr1aXdN+UqSmc)xzep& zpRHQoA8C1&bMcQ=TC7C{|F&g2?k)W_;n7!t>m8P2YX$E=715Tc={mQ*TJ56gqnNY_ z-FIguTlM#6n(JyEjQhGUT%$YR^Er>dT}tHM@Skr})Kf3MHjz1{w0iGv(}w>iCx?D9 zj7r>Yk+y98V!=d(xhMUy&N#_@ImZ}xflo|5!`k9Kmz|u<{;s|oeCKwz9ZuV0RGV2{ ztLeS!#mSEk_8e7J{rvb~nAPLkzTIw!4b1S%Jp1ZP&wvH_FD$N!=%y zbF}kvT)g|8B4$0HvFRIR-NbJ5c0(mUUE z?=xLwZXmelV)tu{*B7;KT@O6>{N0?j7eB||`z-VE+n%lSJPWUVJX*2#`kop_JJlVw zvtm;wZ`~WXGHm_AyAkFqWf%V4wu7VTe01E|{ad-ECDUuSF4?trV!!)JyG-*(;oJY` z1n%3xet#F^`|sDSPhGS+p8EdS|BuoINj4F3w?H`q-F4vXLad-mq`9VKJm;LBeiyq+ zCtqqR(NjIO%kyf$=bg`{zFd8IXP^3Y-(5V9f^5&MpIuVfwV^EdM(N}|b$b%O?(+Ot zpQ7}_`C7H%q8~TK?dNW`e`&wd!}V*qc-P*^-+v@;+3+&P{X$BkxZ~=K4@?xhlt_<0 Z*EgDV?9*j8UuRJ9vd$@?2>_Q8J5>Mx literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode0_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode0_timing/test.gb new file mode 100644 index 0000000000000000000000000000000000000000..c6109d9e8e54f473bc9628168c7b662d7412f35a GIT binary patch literal 32768 zcmeI4Uq~EB7{JH%YBp+;wI;IKCD}U;d$A@MBlM8#vbS!`=?N!kB*6-`8cjkQl_64=D(xPwAWOQwV`VISe^2SNhV2LIV2|=|dZ?NNAF_Ugz7->1jgX3L((& zeYm^x&G%=%`OS>rgOkg>82Lp?y_iHVISWg67X9$s;NYDNtgLvHonhr{1CuMZO`l^M z@7@_&ym#;CFK*sE+&{GO*E{#_e(~ka8@r8T!^1-ZCkA#L?$gHxM#orpH{(*Yo9%Fp zEoJTH8T|==U(ug&IRYPbIG~l%os(^W$$z@y~wM(1dRtv-t6AwH|@M^ix(eWEM8{%BllaZKQeSD zJnwA!^JA9WB`tY_68FrEL^EGUTf=P~&3Yu>Y5g-CYfCvx) zB0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3;cpiboDuI7cU!^8UfAx4geF=fQ zB8;I6lxX%Uibw0-9D@8VW%~Z}05vkt0=A+qajLfL+scF4fhwwbj+= zk9naDBFl;b9*Tnf@bz$kez4coX_{eZT3sDzAW)!Tz#Db(77?I_LZUbSMSn@c+`4X> zU{h7U-{Ru;t19TStg4V(mNgCZP{^`89#z%#guDNRZdo`6_y+=!NIZ`D6A9Cd$0bSF zLm|*%1oTfN){YPP;1PCg8-^t1=YW~>^A$Q0Dk)Lb-dkw|Cf$Ven&+hB*0P;kcKaDRVS zS6f?{3)n5IuW#SJ_V(6R%&%#_6~Xnz`C$g|Uu~E8H63X0>=fgHT~W%*eLjpoeHv;- z!SQe|Vm+s(K=*UO{RMTkwRLs%_lx?#g1Zpn!(pFq^X7cM{C>gt1%q%}K#;#_;@RjQl~J$-$a1v}L=L2qt`-2!J& za+%iGH#Wk!V8hv~D%6g;qJ%wz8oVwdpf=)m!@qr*f0nytvh^}y>GyPw~BqYr*?^rL}8EH!^1 zJN-Tn;k?o2H=4Z+xvv-nyZ7%TAv;o@tAo;LikqPVy(tpHuu%x0r^-zfb*`O#OS_ zv78ns>a-gbj%obm>`k7G!k~%Uc+pe(yOdL8OgYm0J8;PK$En3l%cVi-*1B5_zLZy) ztYBtQc3pBNdTMdogKeR+!$0~{UN%|8^!en~=)?5enS;^alLw>Y-`=kARhFrL9N?`9 zUzz%-wD{U>pZfUw%vaF`x?$;gf5uQh5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F z0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW3I HB?. +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/ppu/intr_2_mode0_timing.gb". + +[labels] +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0151 main@wait_ly_5 +00:0157 main@wait_ly_6 +00:020e setup_and_wait_mode2 +00:020e setup_and_wait_mode2@wait_ly_7 +00:0231 fail_halt +00:0238 fail_halt@quit_inline_1 + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +000000be _sizeof_main +00000023 _sizeof_setup_and_wait_mode2 diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode0_timing_sprites/manifest.yml b/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode0_timing_sprites/manifest.yml new file mode 100644 index 000000000..a697ada66 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode0_timing_sprites/manifest.yml @@ -0,0 +1 @@ +fail: true diff --git a/cinema/gb/mooneye-gb/acceptance/gpu/hblank_ly_scx_timing-GS/test.gb b/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode0_timing_sprites/test.gb similarity index 88% rename from cinema/gb/mooneye-gb/acceptance/gpu/hblank_ly_scx_timing-GS/test.gb rename to cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode0_timing_sprites/test.gb index b6b9da4de2babcb47b98d1d80282cf791de1c82a..430310ca3659e1bc4f7ff4d17d99f0ecfa457730 100644 GIT binary patch literal 32768 zcmeI4Yiu0V8HQ(PFP`1?Wt_`oY?jUJX5*|KCpfl~Y|Q4%?t0^_6GPGv6KYIx?Z!}5 zB|(W=6O3_G0Yz0srA94LBNa#>ptcIA>JJnN3Rcos$wH}wR0L5?tE3lNloBCGAaUp2 z!_1sS{fUrTzE7UZdEYbVobQ=4It8*BHjiy6ojf! z5b_zH(GhQlTotOw3WcD5=rcOw9niHZp(|7cqgFLm#aF@zYo8ekX>ii2u{ypAP9*F& z3WZ^HtHzpm239oUS_(zr-6?rKHz*44e$~jtSBvXZH>eukPbJUq2Gzj(wd4idpjvpZ zOJ2|os)P5QYe2p~cD|ygjc(+JiWy)9bpeA@bgC6V3l&|DL zOW^%L@+wpQ5Q5V1js(5jD^vb3f|}t?NnT~jKaHRkcz=?-%9MWwK}+F%B6*c5U*Sfr z@D_x;{Bj79-!ga|l9xw_{FcMp9P;ujAVhvQ!26cubt6Q6ZSWomdHEF)BEJ>z4oTj6 zgvhTQ-pi8LgAn<3zOkZzTvAaz0drX+>vMo8n5R7F`xk4epIv=-7+k`yL_^czWv&^kybB`Hcd zNN-EcS5qF+`;t^c1xP;48+|QxLz*W^byS43MDyV2v>sBIB-K+7q?;t^3EBW@NRpnU z5~SUd^c3|%dRUSU(MCuIq(K~}O^|*mNl#NBq?aY>8M+D5A0+7r-3;lh=KLqM|GR3m z8QMij^Mz>(w3@K@Us#RMSD+;%%^#($&{l?x*7#D~alaaLXrmbqnZg&=yC$@#!Yr32jZpD8{=#djo2^X{FmTxe^V*>yH?P zcwTtEaD79fdBvK1FMS=}y%A$woP?)F<}@Z-+PexHX&BxQBgWczR(SsC-0K!C?YOaf z6OF)oF5g89;W!ln~scQ<|4R2-C%da=TW<_(Np+4-pkk}BN zI=`X(e5w3FX`B6P(AvC7F_h^y&z>({dCaf^RX*xM=51?QV!*1=0VtrgW`mK-2n#muXsr%$R%2adpg+#O( zIoJuTzh#@XNVzmQTYeo0Sv~pQzV$`LC`?~Sv{foq5{2AlmGXVtV12NfC(@GCcp%k025#WOn?b60Vco%m;e)C0!)AjFaajO1egF5U;<2l2`~XBzyz28 z6JP>NfC(@GCcp%k025#WOn?b60VeRJAuu5Y)^SV42`>Nt@$lB_i!*0wyP{~7#s6tL zuC9|#kB^HDx~9eB>2xd>iDa|5VrXdp{=4rsjOON0H15U8hY= z({#>Ykb6BD`I__(S%em09T zdJy#|Ca&%u?O}6#aZaSFUJjyVFJGrD2!%qXIW%ONf;YyDk&4lxBs|nXDU&G{k&mK? ztC3-`c<|u<{ey#+6^og6q*7uOs6RGVEMmjnxqi})Vlk6(e7KH3KAy{sjbX9)_&9v8 zEO?{;$;pEUo$HbL#02(*0_ux9i#tGsax7L^=^k+E7mKCRmMyz>l}g1TeDowjWSq~B zjP&>S_F_po{6b-Pc|N^vk>=JXMAwPEX4Ksd@?z2o@f(gZ@!59G8sHA z2*E#>6VFZ{fYIXqR;~?)qr%tqYoA}#LWuU9=T2zYXS1qG)YH?|g%ZeM{tgch4x)?@ z&$P%N-!C946rB3viNRCg%wN;g^-Knzln_@dN@r(ZU$NNP83>4MG8ynmrQn02$ljUd zct#y%*Dhq9N~P0nZLO`S?|!O67kr_Ojt&ffI?fTxm$$d$ri+pop>uzr4GsGQi&1#}qpzl>#zx^|4tnnwX#4CK7#JP( ze9Qs4Earf&i)R*ZR`i1Uv6!y6*`e!#ze7eG#r?S zVCnc-?=v;Z2q~gA{q5W)rq#`bV8r3S8~4dRa0-39yqt~{e{_wcK$v!Z7+KEJ)s<(`g19vO!^cH zXCIzgU4Fdu@2SU2V=tU+OwNs(A8ohK_9mm|#}WULlS%X9E9Lh}$9c{2m*y8PC&~nv z025#WOn?b60Vco%m;e)C0!)AjFaajO1egF5U;<2l2`~XBzyz286JP>NfC(@GCcp%k k025#WOn?b60Vco%m;e)C0!)AjFaajO1egF5_}?V(9|4H582|tP literal 32768 zcmeI4Z)hB48o=L~oopxBZ98#$xoI8J*>wrqT1$-OT*KbDJDDWA&0<25T8IH_LQ}!J zTBx3}uG&hP)~!i7&?IemKH?EZD%p1<(fE3ch?`!46Nk3PD8?~{A)*f(Q8w)fy; zY-);eQSM@Q+;jNSlDG1lz09vK+RIUI)zNDiN3E@PWxCz!L9P0L##r&xyB`Lm!iuN4 z*5!5&NXxId9i=wVRG}r}%KTqCdH?Il4qR8Zc3s(R&DqT>yJFS9a5=$i&RlcNnR;{P zwLIr)JX^gdTU{NA+Q+Kz1fuEH%1ZNwI`oDe4hGh>b?Mz}d;YLJ#?1dI>Y z5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y z5g-CYfCvx)B0vOg5P@Qoz#r>2sYTL%e>|@IgKWJnjOjY~5?oqi5{W_qKVaAO?(Rgw zvN}3aDahEf=jhRgAMWbfvLzSwRJ0KATXfgz!i0Ql^LL?QqtP^#&}i5+P0legU>YMahFRxZknL$x@kgfUAHXI zQz_TgG}E;0qS*gZcU|lO@rgt>TPR@tVlkaA6jW9EQz_7)1I8DNt^J`Me54=m9Y<9g zYrx8l^-3KH1%sx!XOC$jZ%#r0tYh;R0*s$BornCu6B!w83CG0Z=F7-mJmez+F-JdYd!Jb-1hbm`VHgC^9xZRSWlii zw81r%QdP$p8tU%{4amU$otc@Q1|0;?G_GIe;yA7=@=_ z^Pab3ho<3bl1bnbkAolfb{(fU-=NDAsp|(0z{=zCM54EM+ct=Yx+usOY;$u{Q$QW= zLAG!2>w|}m8crym57?%sXJ%X%c4|5edVfFc7C3{dV7hHvUmx@ZAFkdsVRqCFBb9;) z8vUVHPtT@J=!ZSn_DyLgs(Ka>j0p+!iu_xVs!>3ktIr z&t4vmvK8e76Lx#gfbHogX5FA(fj;2kR)=4PA2{cZz1_WgtWYcq_@x^md|?7ghG5J!-QJ=4Rz_p|y>U@B*fx z{9ULz>@_Z|GQvw96E<~-DX(KHlw`bQyDWJM?e&u9gyxt0M5umA;Bpb;p}_=ia9OCT z%ap)Qu^4C&;0?mE!L4YoH`pRHzd=%{euK&bykuV3)B&d4kEu{n5uY0vthA4wB` z7m%1q3_z~~x>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F w0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpH=V%$0X?)p^#A|> diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode0_timing_sprites/test.sym b/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode0_timing_sprites/test.sym new file mode 100644 index 000000000..8f8e251f1 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode0_timing_sprites/test.sym @@ -0,0 +1,499 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/ppu/intr_2_mode0_timing_sprites.gb". + +[labels] +01:48bb clear_oam +01:48c5 clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48d9 memcpy +01:48e2 memset +01:4898 print_hex4 +01:48cf print_hex8 +01:48f2 print_inline_string +01:48a4 print_load_font +01:48b0 print_newline +01:48eb print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte +01:4000 font +00:0150 main +00:0174 _testcase_data_0 +00:0176 _testcase_end_0 +00:0187 _testcase_data_1 +00:018a _testcase_end_1 +00:019b _testcase_data_2 +00:019f _testcase_end_2 +00:01b0 _testcase_data_3 +00:01b5 _testcase_end_3 +00:01c6 _testcase_data_4 +00:01cc _testcase_end_4 +00:01dd _testcase_data_5 +00:01e4 _testcase_end_5 +00:01f5 _testcase_data_6 +00:01fd _testcase_end_6 +00:020e _testcase_data_7 +00:0217 _testcase_end_7 +00:0228 _testcase_data_8 +00:0232 _testcase_end_8 +00:0243 _testcase_data_9 +00:024e _testcase_end_9 +00:025f _testcase_data_10 +00:026a _testcase_end_10 +00:027b _testcase_data_11 +00:0286 _testcase_end_11 +00:0297 _testcase_data_12 +00:02a2 _testcase_end_12 +00:02b3 _testcase_data_13 +00:02be _testcase_end_13 +00:02cf _testcase_data_14 +00:02da _testcase_end_14 +00:02eb _testcase_data_15 +00:02f6 _testcase_end_15 +00:0307 _testcase_data_16 +00:0312 _testcase_end_16 +00:0323 _testcase_data_17 +00:032e _testcase_end_17 +00:033f _testcase_data_18 +00:034a _testcase_end_18 +00:035b _testcase_data_19 +00:0366 _testcase_end_19 +00:0377 _testcase_data_20 +00:0382 _testcase_end_20 +00:0393 _testcase_data_21 +00:039e _testcase_end_21 +00:03af _testcase_data_22 +00:03ba _testcase_end_22 +00:03cb _testcase_data_23 +00:03d6 _testcase_end_23 +00:03e7 _testcase_data_24 +00:03f2 _testcase_end_24 +00:0403 _testcase_data_25 +00:040e _testcase_end_25 +00:041f _testcase_data_26 +00:042a _testcase_end_26 +00:043b _testcase_data_27 +00:0446 _testcase_end_27 +00:0457 _testcase_data_28 +00:0462 _testcase_end_28 +00:0473 _testcase_data_29 +00:047e _testcase_end_29 +00:048f _testcase_data_30 +00:049a _testcase_end_30 +00:04ab _testcase_data_31 +00:04b6 _testcase_end_31 +00:04c7 _testcase_data_32 +00:04d2 _testcase_end_32 +00:04e3 _testcase_data_33 +00:04ee _testcase_end_33 +00:04ff _testcase_data_34 +00:050a _testcase_end_34 +00:051b _testcase_data_35 +00:0526 _testcase_end_35 +00:0537 _testcase_data_36 +00:0542 _testcase_end_36 +00:0553 _testcase_data_37 +00:055e _testcase_end_37 +00:056f _testcase_data_38 +00:057a _testcase_end_38 +00:058b _testcase_data_39 +00:0596 _testcase_end_39 +00:05a7 _testcase_data_40 +00:05b2 _testcase_end_40 +00:05c3 _testcase_data_41 +00:05ce _testcase_end_41 +00:05df _testcase_data_42 +00:05ea _testcase_end_42 +00:05fb _testcase_data_43 +00:0606 _testcase_end_43 +00:0617 _testcase_data_44 +00:0622 _testcase_end_44 +00:0633 _testcase_data_45 +00:063e _testcase_end_45 +00:064f _testcase_data_46 +00:065a _testcase_end_46 +00:066b _testcase_data_47 +00:0676 _testcase_end_47 +00:0687 _testcase_data_48 +00:0692 _testcase_end_48 +00:06a3 _testcase_data_49 +00:06ae _testcase_end_49 +00:06bf _testcase_data_50 +00:06ca _testcase_end_50 +00:06db _testcase_data_51 +00:06e6 _testcase_end_51 +00:06f7 _testcase_data_52 +00:06f9 _testcase_end_52 +00:070a _testcase_data_53 +00:070c _testcase_end_53 +00:071d _testcase_data_54 +00:071f _testcase_end_54 +00:0730 _testcase_data_55 +00:0732 _testcase_end_55 +00:0743 _testcase_data_56 +00:0745 _testcase_end_56 +00:0756 _testcase_data_57 +00:0758 _testcase_end_57 +00:0769 _testcase_data_58 +00:076b _testcase_end_58 +00:077c _testcase_data_59 +00:077e _testcase_end_59 +00:078f _testcase_data_60 +00:0791 _testcase_end_60 +00:07a2 _testcase_data_61 +00:07a4 _testcase_end_61 +00:07b5 _testcase_data_62 +00:07b7 _testcase_end_62 +00:07c8 _testcase_data_63 +00:07ca _testcase_end_63 +00:07db _testcase_data_64 +00:07dd _testcase_end_64 +00:07ee _testcase_data_65 +00:07f0 _testcase_end_65 +00:0801 _testcase_data_66 +00:0803 _testcase_end_66 +00:0814 _testcase_data_67 +00:0816 _testcase_end_67 +00:0827 _testcase_data_68 +00:0829 _testcase_end_68 +00:083a _testcase_data_69 +00:083c _testcase_end_69 +00:084d _testcase_data_70 +00:084f _testcase_end_70 +00:0860 _testcase_data_71 +00:0862 _testcase_end_71 +00:0873 _testcase_data_72 +00:0875 _testcase_end_72 +00:0886 _testcase_data_73 +00:0888 _testcase_end_73 +00:0899 _testcase_data_74 +00:089b _testcase_end_74 +00:08ac _testcase_data_75 +00:08ae _testcase_end_75 +00:08bf _testcase_data_76 +00:08c1 _testcase_end_76 +00:08d2 _testcase_data_77 +00:08d4 _testcase_end_77 +00:08e5 _testcase_data_78 +00:08e8 _testcase_end_78 +00:08f9 _testcase_data_79 +00:08fc _testcase_end_79 +00:090d _testcase_data_80 +00:0910 _testcase_end_80 +00:0921 _testcase_data_81 +00:0924 _testcase_end_81 +00:0935 _testcase_data_82 +00:0938 _testcase_end_82 +00:0949 _testcase_data_83 +00:094c _testcase_end_83 +00:095d _testcase_data_84 +00:0960 _testcase_end_84 +00:0971 _testcase_data_85 +00:0974 _testcase_end_85 +00:0985 _testcase_data_86 +00:0988 _testcase_end_86 +00:0999 _testcase_data_87 +00:099c _testcase_end_87 +00:09ad _testcase_data_88 +00:09b0 _testcase_end_88 +00:09c1 _testcase_data_89 +00:09c4 _testcase_end_89 +00:09d5 _testcase_data_90 +00:09d8 _testcase_end_90 +00:09e9 _testcase_data_91 +00:09ec _testcase_end_91 +00:09fd _testcase_data_92 +00:0a00 _testcase_end_92 +00:0a11 _testcase_data_93 +00:0a14 _testcase_end_93 +00:0a25 _testcase_data_94 +00:0a28 _testcase_end_94 +00:0a39 _testcase_data_95 +00:0a44 _testcase_end_95 +00:0a55 _testcase_data_96 +00:0a60 _testcase_end_96 +00:0a71 _testcase_data_97 +00:0a7c _testcase_end_97 +00:0a8d _testcase_data_98 +00:0a98 _testcase_end_98 +00:0aa9 _testcase_data_99 +00:0ab4 _testcase_end_99 +00:0ac5 _testcase_data_100 +00:0ad0 _testcase_end_100 +00:0ae1 _testcase_data_101 +00:0aec _testcase_end_101 +00:0afd _testcase_data_102 +00:0b08 _testcase_end_102 +00:0b19 _testcase_data_103 +00:0b24 _testcase_end_103 +00:0b35 _testcase_data_104 +00:0b40 _testcase_end_104 +00:0b47 _testcase_end_104@quit_inline_1 +00:0b58 run_testcase +00:0b5a run_testcase@wait_ly_5 +00:0b60 run_testcase@wait_ly_6 +00:0b8b testcase_round_a +00:0b96 testcase_round_a_ret +00:0ba6 testcase_round_b +00:0bb1 testcase_round_b_ret +00:0bc2 prepare_sprites +00:0bd8 prepare_nop_area +00:0be1 setup_and_wait_mode2 +00:0be1 setup_and_wait_mode2@wait_ly_7 +00:0c04 test_fail +00:0c0b test_fail@quit_inline_2 +00:0c29 fail_halt +00:0c30 fail_halt@quit_inline_3 +00:c000 nop_area_a +00:c060 nop_area_b +00:ff80 testcase_id + +[definitions] +0000000a _sizeof_clear_oam +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000060 _sizeof_nop_area_a +00000060 _sizeof_nop_area_b +00000002 _sizeof_testcase_id +00000024 _sizeof_main +00000002 _sizeof__testcase_data_0 +00000011 _sizeof__testcase_end_0 +00000003 _sizeof__testcase_data_1 +00000011 _sizeof__testcase_end_1 +00000004 _sizeof__testcase_data_2 +00000011 _sizeof__testcase_end_2 +00000005 _sizeof__testcase_data_3 +00000011 _sizeof__testcase_end_3 +00000006 _sizeof__testcase_data_4 +00000011 _sizeof__testcase_end_4 +00000007 _sizeof__testcase_data_5 +00000011 _sizeof__testcase_end_5 +00000008 _sizeof__testcase_data_6 +00000011 _sizeof__testcase_end_6 +00000009 _sizeof__testcase_data_7 +00000011 _sizeof__testcase_end_7 +0000000a _sizeof__testcase_data_8 +00000011 _sizeof__testcase_end_8 +0000000b _sizeof__testcase_data_9 +00000011 _sizeof__testcase_end_9 +0000000b _sizeof__testcase_data_10 +00000011 _sizeof__testcase_end_10 +0000000b _sizeof__testcase_data_11 +00000011 _sizeof__testcase_end_11 +0000000b _sizeof__testcase_data_12 +00000011 _sizeof__testcase_end_12 +0000000b _sizeof__testcase_data_13 +00000011 _sizeof__testcase_end_13 +0000000b _sizeof__testcase_data_14 +00000011 _sizeof__testcase_end_14 +0000000b _sizeof__testcase_data_15 +00000011 _sizeof__testcase_end_15 +0000000b _sizeof__testcase_data_16 +00000011 _sizeof__testcase_end_16 +0000000b _sizeof__testcase_data_17 +00000011 _sizeof__testcase_end_17 +0000000b _sizeof__testcase_data_18 +00000011 _sizeof__testcase_end_18 +0000000b _sizeof__testcase_data_19 +00000011 _sizeof__testcase_end_19 +0000000b _sizeof__testcase_data_20 +00000011 _sizeof__testcase_end_20 +0000000b _sizeof__testcase_data_21 +00000011 _sizeof__testcase_end_21 +0000000b _sizeof__testcase_data_22 +00000011 _sizeof__testcase_end_22 +0000000b _sizeof__testcase_data_23 +00000011 _sizeof__testcase_end_23 +0000000b _sizeof__testcase_data_24 +00000011 _sizeof__testcase_end_24 +0000000b _sizeof__testcase_data_25 +00000011 _sizeof__testcase_end_25 +0000000b _sizeof__testcase_data_26 +00000011 _sizeof__testcase_end_26 +0000000b _sizeof__testcase_data_27 +00000011 _sizeof__testcase_end_27 +0000000b _sizeof__testcase_data_28 +00000011 _sizeof__testcase_end_28 +0000000b _sizeof__testcase_data_29 +00000011 _sizeof__testcase_end_29 +0000000b _sizeof__testcase_data_30 +00000011 _sizeof__testcase_end_30 +0000000b _sizeof__testcase_data_31 +00000011 _sizeof__testcase_end_31 +0000000b _sizeof__testcase_data_32 +00000011 _sizeof__testcase_end_32 +0000000b _sizeof__testcase_data_33 +00000011 _sizeof__testcase_end_33 +0000000b _sizeof__testcase_data_34 +00000011 _sizeof__testcase_end_34 +0000000b _sizeof__testcase_data_35 +00000011 _sizeof__testcase_end_35 +0000000b _sizeof__testcase_data_36 +00000011 _sizeof__testcase_end_36 +0000000b _sizeof__testcase_data_37 +00000011 _sizeof__testcase_end_37 +0000000b _sizeof__testcase_data_38 +00000011 _sizeof__testcase_end_38 +0000000b _sizeof__testcase_data_39 +00000011 _sizeof__testcase_end_39 +0000000b _sizeof__testcase_data_40 +00000011 _sizeof__testcase_end_40 +0000000b _sizeof__testcase_data_41 +00000011 _sizeof__testcase_end_41 +0000000b _sizeof__testcase_data_42 +00000011 _sizeof__testcase_end_42 +0000000b _sizeof__testcase_data_43 +00000011 _sizeof__testcase_end_43 +0000000b _sizeof__testcase_data_44 +00000011 _sizeof__testcase_end_44 +0000000b _sizeof__testcase_data_45 +00000011 _sizeof__testcase_end_45 +0000000b _sizeof__testcase_data_46 +00000011 _sizeof__testcase_end_46 +0000000b _sizeof__testcase_data_47 +00000011 _sizeof__testcase_end_47 +0000000b _sizeof__testcase_data_48 +00000011 _sizeof__testcase_end_48 +0000000b _sizeof__testcase_data_49 +00000011 _sizeof__testcase_end_49 +0000000b _sizeof__testcase_data_50 +00000011 _sizeof__testcase_end_50 +0000000b _sizeof__testcase_data_51 +00000011 _sizeof__testcase_end_51 +00000002 _sizeof__testcase_data_52 +00000011 _sizeof__testcase_end_52 +00000002 _sizeof__testcase_data_53 +00000011 _sizeof__testcase_end_53 +00000002 _sizeof__testcase_data_54 +00000011 _sizeof__testcase_end_54 +00000002 _sizeof__testcase_data_55 +00000011 _sizeof__testcase_end_55 +00000002 _sizeof__testcase_data_56 +00000011 _sizeof__testcase_end_56 +00000002 _sizeof__testcase_data_57 +00000011 _sizeof__testcase_end_57 +00000002 _sizeof__testcase_data_58 +00000011 _sizeof__testcase_end_58 +00000002 _sizeof__testcase_data_59 +00000011 _sizeof__testcase_end_59 +00000002 _sizeof__testcase_data_60 +00000011 _sizeof__testcase_end_60 +00000002 _sizeof__testcase_data_61 +00000011 _sizeof__testcase_end_61 +00000002 _sizeof__testcase_data_62 +00000011 _sizeof__testcase_end_62 +00000002 _sizeof__testcase_data_63 +00000011 _sizeof__testcase_end_63 +00000002 _sizeof__testcase_data_64 +00000011 _sizeof__testcase_end_64 +00000002 _sizeof__testcase_data_65 +00000011 _sizeof__testcase_end_65 +00000002 _sizeof__testcase_data_66 +00000011 _sizeof__testcase_end_66 +00000002 _sizeof__testcase_data_67 +00000011 _sizeof__testcase_end_67 +00000002 _sizeof__testcase_data_68 +00000011 _sizeof__testcase_end_68 +00000002 _sizeof__testcase_data_69 +00000011 _sizeof__testcase_end_69 +00000002 _sizeof__testcase_data_70 +00000011 _sizeof__testcase_end_70 +00000002 _sizeof__testcase_data_71 +00000011 _sizeof__testcase_end_71 +00000002 _sizeof__testcase_data_72 +00000011 _sizeof__testcase_end_72 +00000002 _sizeof__testcase_data_73 +00000011 _sizeof__testcase_end_73 +00000002 _sizeof__testcase_data_74 +00000011 _sizeof__testcase_end_74 +00000002 _sizeof__testcase_data_75 +00000011 _sizeof__testcase_end_75 +00000002 _sizeof__testcase_data_76 +00000011 _sizeof__testcase_end_76 +00000002 _sizeof__testcase_data_77 +00000011 _sizeof__testcase_end_77 +00000003 _sizeof__testcase_data_78 +00000011 _sizeof__testcase_end_78 +00000003 _sizeof__testcase_data_79 +00000011 _sizeof__testcase_end_79 +00000003 _sizeof__testcase_data_80 +00000011 _sizeof__testcase_end_80 +00000003 _sizeof__testcase_data_81 +00000011 _sizeof__testcase_end_81 +00000003 _sizeof__testcase_data_82 +00000011 _sizeof__testcase_end_82 +00000003 _sizeof__testcase_data_83 +00000011 _sizeof__testcase_end_83 +00000003 _sizeof__testcase_data_84 +00000011 _sizeof__testcase_end_84 +00000003 _sizeof__testcase_data_85 +00000011 _sizeof__testcase_end_85 +00000003 _sizeof__testcase_data_86 +00000011 _sizeof__testcase_end_86 +00000003 _sizeof__testcase_data_87 +00000011 _sizeof__testcase_end_87 +00000003 _sizeof__testcase_data_88 +00000011 _sizeof__testcase_end_88 +00000003 _sizeof__testcase_data_89 +00000011 _sizeof__testcase_end_89 +00000003 _sizeof__testcase_data_90 +00000011 _sizeof__testcase_end_90 +00000003 _sizeof__testcase_data_91 +00000011 _sizeof__testcase_end_91 +00000003 _sizeof__testcase_data_92 +00000011 _sizeof__testcase_end_92 +00000003 _sizeof__testcase_data_93 +00000011 _sizeof__testcase_end_93 +00000003 _sizeof__testcase_data_94 +00000011 _sizeof__testcase_end_94 +0000000b _sizeof__testcase_data_95 +00000011 _sizeof__testcase_end_95 +0000000b _sizeof__testcase_data_96 +00000011 _sizeof__testcase_end_96 +0000000b _sizeof__testcase_data_97 +00000011 _sizeof__testcase_end_97 +0000000b _sizeof__testcase_data_98 +00000011 _sizeof__testcase_end_98 +0000000b _sizeof__testcase_data_99 +00000011 _sizeof__testcase_end_99 +0000000b _sizeof__testcase_data_100 +00000011 _sizeof__testcase_end_100 +0000000b _sizeof__testcase_data_101 +00000011 _sizeof__testcase_end_101 +0000000b _sizeof__testcase_data_102 +00000011 _sizeof__testcase_end_102 +0000000b _sizeof__testcase_data_103 +00000011 _sizeof__testcase_end_103 +0000000b _sizeof__testcase_data_104 +00000018 _sizeof__testcase_end_104 +00000033 _sizeof_run_testcase +0000000b _sizeof_testcase_round_a +00000010 _sizeof_testcase_round_a_ret +0000000b _sizeof_testcase_round_b +00000011 _sizeof_testcase_round_b_ret +00000016 _sizeof_prepare_sprites +00000009 _sizeof_prepare_nop_area +00000023 _sizeof_setup_and_wait_mode2 +00000025 _sizeof_test_fail diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode3_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode3_timing/baseline_0000.png new file mode 100644 index 0000000000000000000000000000000000000000..3683ae7dd1d22e044d77ae8c5c5a09d7c95d3f36 GIT binary patch literal 1186 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QH@r;B4q#hkZuFHW0nz{Be6 z|L_0w%k5iqj&E$;xYTv$%*ssWHG({BEps;5&Ogtz>(5SWh7Q()j}#(gSh|}N3I%ld znvPaZ3EGx>+kW?wqqnzBj8lL3@mKoyz@0OT@5dD7ubOq+MoR74?d<=jZ_YcPo}a(( zw4EIL`qt_yH=SvH9@TrR54f$^@cDAHfAyupN7*Nz-BI(^4!{0;-?zW~)o%|c|Bo+@ zzx{jltG{ON!~DdzrJFi0)eg7mlh-=Fck_3b@{RfvriwmZWqAFc`R1xUmy;)bwuoQC zYWpmB!T-*~lXW2ObKGFTA;u1J^qiCIvQGm7qIwqG?DOv2Rpqx&Xw}CA^~#CKaT~bL zUYZc7x2Nm(kJh-HO!=FB^A^S5zPwtEciN1qR^H=I@4wBzcgNdNYGbU{n!jqRm%mVp z`jL1UXSGu`taY|z5ZgSyT!lU;vFZhCb9~KNJre2F?sCodcw4#CVTeMr=3+F zWF9Z(uQHGP={`xt_T2&QPYH!-ei!#WKfl9f$Bdt^W3n9!j~Q0-zI)ml&Uv=E*X((e z@vZVmR~BQ#xpLc@XIpJ*j(M|A$9PAL-)_|v?9Wd&=h~^B6MeVmq|v7nwpYtC_Z(5V zyz%vRg>=ll3I)0aID&{|(#InD@bMlGi^@&%4 zW8X#YDXS{EYt=U)_)C&)#r#J?CzEV<{P6;bWChLh{o7h)P+2g&f5q}?4{B^@^;8yY zo%U5_$92DXHMV_w{<6g=@QbAz@qg2LE^8l_yy@O@|1IyU>t318_{sL@S>eUKepqJr-}p3Mus=#jgCpV=oTxJ|T8qz389L zuOQd_B!wLxMXncKSsb1%?`}J3;n?92PN zY0r;o){kwNzj=SYY25U^xBg9!Z{Yr#PE7%R zrbj%gr>iH=@?HDhbp2d8*>sumedaH>2u{Cz_*eC0zwn9I@;ravQ&}&c-%*zz^iO`K zN7dx7Rg!`K?oPKqcXj@k_!>{w&*kE)c6ML?k({0RxJNlN;(_a>V3UeQXcnf>y@a)Y Z7I(_O^n9+@oG+lV$J5o%Wt~$(69ChYJB|PV literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode3_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_mode3_timing/test.gb new file mode 100644 index 0000000000000000000000000000000000000000..7cab4e1825033fcf23154459ca090cedbafd9899 GIT binary patch literal 32768 zcmeI4UrZE77{KS2E3SaL6eSDY=-%Z*Pl^VSv=?&S>@Dkgup~#UL_Me;QP2-B@0rd&_+jzU9%9ei)Aj}X zynV^OXkW1}+gI%w&1GNlOy@I8G}mQlJY4qV_NTt=q(ux`Dnzpq^|AA%*)`P;&D&f4 z_>iQ2axHt7T+}l=YGuE$!l90?HZ>CJI!J1b|K@V7^X|ZMNB{{S0VIF~kN^@u0!RP} zAOR$R1dsp{Kmter2_OL^fCP{L50@y1O}*S@Mb!H^9ay`LEc;VGJio}xm8uy!6wT- zpFzdvlV#9FQI;XMC@Ko*!JuKd-LkBzNoW6a-7r`U@b~*8kwk*!PbPIekq`uK4+cSp z3d}#5Tw5RV!NcvWt!aW#m;=jPm@n5Eq4IKB?(dgn#v8^ABW0rnjoH8lv_QZ#VLpVg zXqcgC&dtrv_VuZ%qR3QyJ~j&QA0IbOc;LIVSqndS>Uf}peqXO2Dh90n`R`^-90)QiI^tXp%N1|<4|aDu&1Y^ zBSZ!4hA}X3;6P_*ILz`Zig#7m`m*`44B%gE7X&{4?rvTW?2=Sf<@K`oGiP9|OjtcO z7rvfTQ=t2(u>A$&>ged{864!}0}I=Q5FZM8y<4{y@)hLC~~txUCH|AOrh%V4$xLbP#r?+5816nr0Z> zpPd*u1$_U?vLpop5)~FrNNa0Xmua@Py4`FxfdKIF`M?f)dljd1zCq_FQWQr=Vdg%c z-{0Ka)CB&JmkHwweX&??FHnaz$nM=OEwJcJV~Z)=0y0%uTg zm^L-Fv_M_3vDwQqjGgI{6b!-$3iY8@LqmN%v%?-N{Ct97h6#4ids->l?3%;=G1p&Q!GS4o9IWTneczkT= zM4W(5e_n%IVsg_r{k!N@F`;;T=)~CZk>P*LMr7iq|78|?kluQu#@;>t{?HMUop8 zA4hYSONlEKjynk=Ji({Y+|^PNWKKD8T|DlSXl|yIxYVds=DaDuBAPCKC@DM z@ltVn;)eQadD-TdYQ^oF8n*5B>f_lC>m+?9=yQrb3HqF-kGxIS4ElZMM. +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/ppu/intr_2_mode3_timing.gb". + +[labels] +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0151 main@wait_ly_5 +00:0157 main@wait_ly_6 +00:01bc setup_and_wait_mode2 +00:01bc setup_and_wait_mode2@wait_ly_7 +00:01df fail_halt +00:01e6 fail_halt@quit_inline_1 + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +0000006c _sizeof_main +00000023 _sizeof_setup_and_wait_mode2 diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_oam_ok_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_oam_ok_timing/baseline_0000.png new file mode 100644 index 0000000000000000000000000000000000000000..eb517a93c9dd65b666333502897090b53f3a13f6 GIT binary patch literal 1162 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QH-r;B4q#hkZu?{1oHz{9q1 z^7s1Gs)>Eh2dDMw@;^%czD(Vr^-xlCJ=5!Lx!f;4J%7iNpvNJ`e(;e(gbYh}b3&nj z&bjo+X{E83)2F9>+_lbRee;K(|0dVS-1)NeeBMka*=uR%+xq@ad$fN}>FsToF4~;F zH=q4}uXk0Hjvnj8Z*{?k+*VEaG4(-~=Pms|c{5{Yt7boaRd>GH|Nll2dApbE-)!90 ze|_PX+jG{2m~RVD4PL4t|Kp9ljLh_`_kE9&;uZMAdRDu||1meN+83PE^m%3eq-LSd zA{zCNE=*SCYdY$e8V<{%~<28WPkk&b@}(3PqT5_ow%rfqxH>&2^;@t zZSLP4KJW93HH-G&Uv4t%ip7x-sT&4tHddeh1V!DJd;X_Z_Vb+M8KQGl&+UwneV4;8 zdO3dTyso1&3NOlLxrx3F%?(SRVe#(tT+QnbzU611|6-y4J@t;)pP4F-=dC|9m2I%F z4c+qI=2ed9^R3*+J2~HHu}@#NBTlt?@}pAW^dluFFGt9=pWFT7OZjOPD`mgXCEa%? z=JwdgMhkzQ5!AF-NKeqHIaauNIS z=F39UeU2S(_O3j(eYcO4Z`bEgSs;&Pe>dMPKE9(@zWvHk+SbfpEt$_U{n3%k_2-rI zb~1`*uyIA`WQ-mZJs z)AHPr4d3fZZ7OctE?>6AMr5&VO z)mOJHcrIJvD5{Gdi;y(uzrpbL2fam4KfAoDy*SEK^kdxWJ8=8!ciE*Gy3*xG>VL9UB-%vC-9pX+ zSlviS(4{i}QqT|22Pg8o()O5V&YbW(WYHdTP3f#ZD=KBb+^jtJ_}q83(B>T>{Ey%J zu6n1m=C10S>dAZL?j@uPsh_W8*?aQVwp{DI+`0-MKg-lEssGI^w<%@*?t+NdU-!J2 z=I(N5>T{c>Wvp>5YZo2lhUQg5ZbIa0GF8smUoZCO;(47}<)AXg)78&qol`;+0Fh}a AC;$Ke literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_oam_ok_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_oam_ok_timing/test.gb new file mode 100644 index 0000000000000000000000000000000000000000..b511ce0d19defe0690a0513034b89b2dc7f4a565 GIT binary patch literal 32768 zcmeI4Pe>eB7{K3-TQgCUj5U$b4#~JIc4JL2M(ARp%7s%ksjKxMM9Ibb^E^gd|gd)*g^<2 zd>_ut``-8Geed_)6Fm5`*=HlaNXciD=s9O$bM2lVe(UeQy@3@M471a$gl%AQ>9)zU zY~!8V1B(j_KVP|V<8bf5#$RtQ+`01kjqAIO4+aMZ`i}SQINYO;^bL=&&Q8X~vzzT$ zSX|23%TxLz{=Td~N}q^Uv1LPYvguL@eDaq<=1nYS^+)ahHBtl~T-r66z5CPr{awtN zbtav2&ROSzbKbe+Ty!owQ-;U6R5h7RE%NFvLgU_2Rc7zp*R8yAi`O4sELdjx1NU2? zKQMGBJnL-w^Fub*AT3qBA#u<2P&EB*v^m_;)~H9qZTnfd_5a)h&w0zya72Iz5CI}U z1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U z1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpM1Tkofu|BktP=R|^i^tt^cRoE z<2Mkitxq5jkK+UVvb=R`AfRbQMWGNxbazirA30K9zI}UPA=oud=TcEo zU0qRu{+JiqAhN6|;Grnk4__}A=m&dEjiwofrq$Gd1_A{d2E0)hZxI1{C?tAwU-XwG z%&qID2{u*r`zR%c=^wWm(fe4}~nt>s3`e6*hQ@Qy4SOxfxj@mXn@D}moTx>fS6n3x*dpvHMqoXF5 zcpU6G9eKm}lOaC9f`EJ4-G{kwheX|2?b{y z4)^wUbhNaDxq#iWdV2QlYi(_A#{8P*TM=AeoF8TY|J8Ph-_e2g_I5EI*cGLu#OK5K zQ>UO-6dVudBGz+a0(3tY++R>vOG`&bZ?C8iEVv6HJ{

HgC@5%k3AOUoZ%#1qAt< zCY~Ly7pjHzbz|4BFGjnfJbr$`3k36tbBBHK4uvGiFq)ei8$kmyuz!1cy1GCI!848X zm$(>)WeI;gF>ngR{#8{)2?iA|7|mEiLtC3|H#B&?IGbP)`1t)`hrPXm(>>pyixVl! zLqjlgzdsPDtE;UAf5?l1e4($uzq1plLmOo0&iZ;-bkwjyu|Ck()z#BuS+G-06ZFPL z*e!4dC6{S!ZGAnA3pSj+szU9kD@rH?739W;v8t;pE71;nF!%cf`X;z^cJ}w@?63z` z>$nFL1U|5BD7#IXXD-ui1)>T?@R7vHSV0H+uiON8j%| z#FDcIGL!G{5Y8*r6xa^IjK3OnmYIlU&Rq|bq^IDbm@1uZR=4m*3|!S>-U7&6SSsqq zHH*0MSmta#aaau`c*{*-i3F!(nG5+ONWJaGHHo;7Vwv;##N`I=braYk!I@a*Qa%Y% z@40b%MBK-*%*A}-asv;$2_hoFr?JfCd=jKixN&VF?vq$%DxbKyp=g=AVqw0pm3&2C zakb_Zt*ne!h7Q&mho&bT>@^O1o^*(;ap1QLxdXaGB>8Pdp83}KyXnSgx;mOZ#4lL- zELmk{Q_HI_URvEAyQ;rhSg`S>a(U~9>Mc8c=4iSldYnIF{5ip&IDby^N8Mr?7XLo> zV>0#cS;umkoT$@klscyIm$P^7OcVx9+`@~VQr{&Vk1^p$vv0y7(;p@mH!T+hrJL(+ z*7=fE%6KU=J(+cLSE45ux82(oIy3mAKgq9#@_fN&=f31~822z8TK7}0rw>MdpF0>G z{pMDsudG=8;{b1s`HIyCMFm%H`P7Hsr@xBM(?v^9{cDCgi2xBG0z`la5CI}U1c(3; zAOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3; TAOb{y2oM1xKm>@ui$&lcX|U#n literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_oam_ok_timing/test.sym b/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_oam_ok_timing/test.sym new file mode 100644 index 000000000..0c7957cd7 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/ppu/intr_2_oam_ok_timing/test.sym @@ -0,0 +1,130 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/ppu/intr_2_oam_ok_timing.gb". + +[labels] +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_oam +01:4b85 clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b99 memcpy +01:4ba2 memset +01:4b58 print_hex4 +01:4b8f print_hex8 +01:4bb2 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4bab print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0151 main@wait_ly_5 +00:0157 main@wait_ly_6 +00:0211 setup_and_wait_mode2 +00:0211 setup_and_wait_mode2@wait_ly_7 +00:0234 fail_halt +00:023b fail_halt@quit_inline_1 + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_oam +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +000000c1 _sizeof_main +00000023 _sizeof_setup_and_wait_mode2 diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/lcdon_timing-dmgABCmgbS/manifest.yml b/cinema/gb/mooneye-gb/acceptance/ppu/lcdon_timing-dmgABCmgbS/manifest.yml new file mode 100644 index 000000000..a697ada66 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/ppu/lcdon_timing-dmgABCmgbS/manifest.yml @@ -0,0 +1 @@ +fail: true diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/lcdon_timing-dmgABCmgbS/test.gb b/cinema/gb/mooneye-gb/acceptance/ppu/lcdon_timing-dmgABCmgbS/test.gb new file mode 100644 index 0000000000000000000000000000000000000000..565b4a0e4f6521aff6838ad2b3dae28d354ca171 GIT binary patch literal 32768 zcmeI4U1$_n6oBt;wsFjlovoTq!eC~%OBzEAF$TIU>o7Zx`JE-fnifMIVzwJC*d&k? z61%ROAFV#shddY!)Q3XfO#9X%6f`IsPi;I2M(nr*s$bLjq^JHO3c zx^yTqwCTakJGbY)zVzcR^|RsOq3A?($DsjbEIK;IdV3ic$1b+xg!ggkikT`8r;5UE z!%97Db>Hnso$g#n?{$YV>T^(4M^3Nq>Y5g-CY zfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CY zfC#*n1mdd%{ulcyHBS2L#{>3swFp^ZOc20c%Vo76EU_3qU>AgK+iGiNxuhf*gc1Gy zv$KZ}S5$1@UR(@*Sys4IR@T&1R$@Hng+7QNh$2LYBHE#KaREE{>*{1#Rb{!Z4m1#0 zpsKW$B`!W6t^(r6#|;A> zc-!L>TnxkSxBcL?{jr#)jgMt26Cld4X_IRi~9*4KCLp<&*@K;sPWf@L` z%VozKMq68V_sB?Fn_++-WDI=#0C7iJ}|IvUq?qv3+9()Z&q-Bu|CWI z@vHq#r(J({w>=;DMX{{R>&5ZMkHcC~a6YWX-p|QN(0yF+e8IZf+k1K<5qo{$!BYt1 zLm{ts%a(k;{CUCp{C>DCAjn_S@b0)=uv*yP%-D?^OVKZiYws^afnYxS-k}ZN!JyNr zsx2*n0BAr4&hNlLUmxfoc&D*`Cl^)Kbvqt!4BP_y{7RB2`u!po9L-pBvuPSebF<5Z z)%g9u$L9k-ob4>m%>4%4zLA13G6I$Re6_WWjrH{q4|!3LFW3eLdwYR8^g$XLnwntK zQNtD5`vbPVzJUQkGfeC2o0?!=@L~0m1ZziK6oWxnL4JOitEQ%^ z3jJ^f^S>`(o8;2lJ2;s4!x>nu;~5Y|ytDAj3bR1GEQ?|z7g0q1HY@wY!2XwU5d?dE zFsiA^G@*rE&kN|Dgr!cVwW=H(FtRmj#`epjjUub#7RBPAxs<52BFf*2X21{O>uP{89>BY{v1GB>l;|nb> z&XCvEABkfM-6zh?>d4G@zyA$`91aIuY-n<=d4SE# zd^s~UotWZHVk(hoL7o0^e`vpA9@w+HktGt-iIY5vH;I!Fg=#)zC(mm!i~nVtT-y~2 zD+eQy=;&xBgu5XU|FZ2z`|>frZi2fRZ>{>_%7xC&@0CrgNXnyI$@tPat7>V^npiq( z-Kt>?QsuFw^HywW-g@l0+zB6t%6=JY@ZhIMqMrm5#=jP|eBSC>p0`?4yTb78sLbc1 z_Dn>ML<5?mf-XRWS{@w=&aGeLpy-tm!WWDIin*z%l}vxg#MpC3E|L%IDN z*emqpPL_6r&8zp|b5|G5)C1GQ&L%yYbz|kBvGSF&%-?4+?_B@rx61p)MVsEL5Vn=q zY;Evre5=L`PC_;ZXu(pF8?dAsIMW75A1X+6Cs-I?xC-DypIo^D+%55uJK z>p0(ypOR?@|9x{V?B=wY@+^7(?UfS0^V)`Mjoze3Ot_imc(`HF6Fzpo`p@d%iQ!*- zNe^3bTwn`}bzu)nIG6&xCpSJwrOii+X>s8*(rP4ni^WIT!sr0m@=-caF>DgsY z_bPpg>$Ut>F%?AwhyW2F0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO) r01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3;AOb{y2oQn)4}t#x37(9W literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/lcdon_timing-dmgABCmgbS/test.sym b/cinema/gb/mooneye-gb/acceptance/ppu/lcdon_timing-dmgABCmgbS/test.sym new file mode 100644 index 000000000..e7938d1a3 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/ppu/lcdon_timing-dmgABCmgbS/test.sym @@ -0,0 +1,103 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/ppu/lcdon_timing-dmgABCmgbS.gb". + +[labels] +01:4d03 clear_oam +01:4d0d clear_vram +01:4cc2 disable_lcd_safe +01:4cc8 disable_lcd_safe@wait_ly_0 +01:4d21 memcpy +01:4d2a memset +01:4ce0 print_hex4 +01:4d17 print_hex8 +01:4d3a print_inline_string +01:4cec print_load_font +01:4cf8 print_newline +01:4d33 print_string +01:4c38 quit +01:4c4d quit@cb_return +01:4c52 quit@wait_ly_1 +01:4c58 quit@wait_ly_2 +01:4c5e quit@wait_ly_3 +01:4c64 quit@wait_ly_4 +01:4c6e quit@success +01:4c95 quit@failure +01:4caa quit@halt +01:4cab quit@halt_execution_0 +01:4cae reset_screen +01:4cd1 serial_send_byte +01:4000 font +00:0150 main +00:015a test_ly +00:0166 test_stat_lyc0 +00:0175 test_stat_lyc1 +00:0185 test_oam_access +00:0191 test_vram_access +00:019d test_finish +00:01a4 test_finish@quit_inline_1 +01:4ac9 cycle_counts +01:4ae1 expect_ly +01:4afc expect_stat_lyc0 +01:4b1f expect_stat_lyc1 +01:4b42 expect_oam_access +01:4b65 expect_vram_access +01:4b89 verify_results +01:4ba0 verify_fail +01:4bc1 verify_fail@quit_inline_2 +00:ff80 v_pass1_results +00:ff88 v_pass2_results +00:ff90 v_pass3_results +00:ff98 v_fail_round +00:ff99 v_fail_expect +00:ff9a v_fail_actual +00:ff9b v_fail_str +00:ff9b v_fail_str_l +00:ff9c v_fail_str_h +01:47f0 test_passes +01:47f0 test_pass1 +01:48e2 test_pass2 +01:49d5 test_pass3 + +[definitions] +0000000a _sizeof_clear_oam +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000018 _sizeof_cycle_counts +0000001b _sizeof_expect_ly +00000023 _sizeof_expect_stat_lyc0 +00000023 _sizeof_expect_stat_lyc1 +00000023 _sizeof_expect_oam_access +00000024 _sizeof_expect_vram_access +00000017 _sizeof_verify_results +00000098 _sizeof_verify_fail +00000008 _sizeof_v_pass1_results +00000008 _sizeof_v_pass2_results +00000008 _sizeof_v_pass3_results +00000001 _sizeof_v_fail_round +00000001 _sizeof_v_fail_expect +00000001 _sizeof_v_fail_actual +00000002 _sizeof_v_fail_str +00000001 _sizeof_v_fail_str_l +00000001 _sizeof_v_fail_str_h +00000000 _sizeof_test_passes +000000f2 _sizeof_test_pass1 +000000f3 _sizeof_test_pass2 +000000f4 _sizeof_test_pass3 +0000000a _sizeof_main +0000000c _sizeof_test_ly +0000000f _sizeof_test_stat_lyc0 +00000010 _sizeof_test_stat_lyc1 +0000000c _sizeof_test_oam_access +0000000c _sizeof_test_vram_access diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/lcdon_write_timing-GS/manifest.yml b/cinema/gb/mooneye-gb/acceptance/ppu/lcdon_write_timing-GS/manifest.yml new file mode 100644 index 000000000..a697ada66 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/ppu/lcdon_write_timing-GS/manifest.yml @@ -0,0 +1 @@ +fail: true diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/lcdon_write_timing-GS/test.gb b/cinema/gb/mooneye-gb/acceptance/ppu/lcdon_write_timing-GS/test.gb new file mode 100644 index 0000000000000000000000000000000000000000..e79fc6238a607436ff4414de1b8cb10c93283e05 GIT binary patch literal 32768 zcmeI4QAk@?7=TZ%S$eD1-P9^qxzw99xF}X!DqC>3mz&!=%}p&znHz`?Hd)dZoXYC9 z*rjPwJJ_DK2Ol;Nwzs~`4aV3gjCRsu*50u`6jo><4lE_CrP8{tvL!ozj@M*;-qZYl zJm;SO{Qo)U|G#sN;De`B+TKEzh8;iOPb9AIB6T&V$Q-FBy9n=Y`|u;uaQph?-8*+~ zeRlEU@z`X;@7M3#{_OLM-ycxlnwpx7&&Ky3kIFOgQ!`|Alu&UTAp0kNePsP)T1^qF zF5)IdD`vWD!j>9#lMJ+FXg~7II+pH-EfTTx$ZK@GJam{elic>+2h1J`AOR$R1dsp{ zKmter2_OL^fCP{L5DYr&4W)o>Ynz=;!&pd;NY%s;yNN7%@IRKY!vxb8|%2^t6lsH#vi-LCBspeu^qTlq47j$?Dn zvZjGe6n#FOiq9vCp!2*a!rVMBNuVo=t~;HgD9h>c`L}glXKR4J-yaUAQf&ToTGLV~ zjCxhL|Bz7A z1@?;0c*FXc%)){_9x_j-q1JWqXFCi0RTXqeg45u1+Wv+S4i67cPlv;X0d`o43ClPX zip54oOfy6U?7AL}9z7a~^!Ky*CCR%fY=2pPYzFYJwsV}F|M0NA9@qt;zTWF)w{WRI8Igj`}_Jp12S-aqtUT3&_URpX8Che zR8`k)e|BTw7TD)k6a^s|6sWM#g!J|f4jM*puhYr02?l|W&j)rm+nYGc_ZxKkM)Lgh zG-U4c`TadTU0vW0^D<$4p)Zjb9R=#p2I=k&1Ypyd#v-)$2l~dwqETIkld5T;_w~VP zfjh{RnRayr0qob&Hyenj>vDRa^}8QO!j1dt zXN!&U+KpVgaIVx^$d+acnbM7R(%sl{rZ87Z70#C)dEO1f<2Rcx-z1KmoQS{KClmS_ z&cWyZm*WKZke;RoTlY{T2i!}p+#)cRGogG`O%2@H;voTb$PMa zxV+xEI)2hhnZ}WoHAQ@|dUJiTK#B#D@sLaIuS|!NSRIkI3x3zZm&iWxiTfMV!9mvz zi(H~Hue5q|YBsO!&MoHk{Gt5ed_;BUHTAFjz*18L@<=bU6t4Y{%R8tmw|EdXU4ELo z`+TuB$X(rWwa1(D2pKog91nLabwtkGZF|tBd@%KkFXtge#}{OADG>3HjDyI~TEF(P zb. +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/ppu/lcdon_write_timing-GS.gb". + +[labels] +01:4a0b clear_oam +01:4a15 clear_vram +01:49ca disable_lcd_safe +01:49d0 disable_lcd_safe@wait_ly_0 +01:4a29 memcpy +01:4a32 memset +01:49e8 print_hex4 +01:4a1f print_hex8 +01:4a42 print_inline_string +01:49f4 print_load_font +01:4a00 print_newline +01:4a3b print_string +01:48ed quit +01:4902 quit@cb_return +01:4907 quit@wait_ly_1 +01:490d quit@wait_ly_2 +01:4913 quit@wait_ly_3 +01:4919 quit@wait_ly_4 +01:4923 quit@success +01:494a quit@failure +01:495f quit@halt +01:4960 quit@halt_execution_0 +01:49b6 reset_screen +01:49d9 serial_send_byte +01:4000 font +00:0150 main +00:015a test_oam_access +00:0166 test_vram_access +00:0172 test_finish +00:0179 test_finish@quit_inline_1 +01:47f0 nop_counts +01:4803 expect_oam_access +01:4820 expect_vram_access +01:483e verify_results +01:4855 verify_fail +01:4876 verify_fail@quit_inline_2 +00:c000 v_test_code +00:c12c v_test_results +00:ff80 v_fail_round +00:ff81 v_fail_expect +00:ff82 v_fail_actual +00:ff83 v_fail_str +00:ff83 v_fail_str_l +00:ff84 v_fail_str_h +01:4963 run_tests +01:497c test_case +01:49b0 test_case_prologue +01:49b4 test_case_epilogue +01:49b6 test_case_end + +[definitions] +0000000a _sizeof_clear_oam +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000013 _sizeof_nop_counts +0000001d _sizeof_expect_oam_access +0000001e _sizeof_expect_vram_access +00000017 _sizeof_verify_results +00000098 _sizeof_verify_fail +0000012c _sizeof_v_test_code +00000013 _sizeof_v_test_results +00000001 _sizeof_v_fail_round +00000001 _sizeof_v_fail_expect +00000001 _sizeof_v_fail_actual +00000002 _sizeof_v_fail_str +00000001 _sizeof_v_fail_str_l +00000001 _sizeof_v_fail_str_h +00000019 _sizeof_run_tests +00000034 _sizeof_test_case +00000004 _sizeof_test_case_prologue +00000002 _sizeof_test_case_epilogue +00000000 _sizeof_test_case_end +0000000a _sizeof_main +0000000c _sizeof_test_oam_access +0000000c _sizeof_test_vram_access diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/stat_irq_blocking/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/ppu/stat_irq_blocking/baseline_0000.png new file mode 100644 index 0000000000000000000000000000000000000000..f9e5e47b50a4d548ddbc988a8e76364d30f505cf GIT binary patch literal 528 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|VoAPZ!6KiaBquU(7mWz~FE( z<;Va1cWgxt&B%VfEU&=!xnok3TT$lH;@jICuivi!&oIyXfkoqEmOfz%KM+GNxySPP z*F*Dd<=5Z6-dB81|M;InsWNlk%!+)xc8P{IlCBaZ#*{8$9cIT#+=*!oF`*DrNRwu@P&J^1 z)vjyOQc&Bfha4&ddh9XuQYb>91g(p1>7|E)!dwirwIwA;YiyIgZ@&z?(Mu2Fq5ePi zy`ArU-}}Dr{oZ>^E}7NUrz1ZgP#dva)`vT4YzQv^V(Oi>ZZhd|CEY=5kp7MTYpQ9AZ!=HxC^YO`@>0=ltru zAFn^yBm6o4ynoTZ;D6$O>|gRf^{@Dsmm>FRR>Rb)Ogzwiz&kwHJ#bi1A@Z|$fGaA6 z%e?i@yAy9yEzf)_kPrkw00ck)1V8`;KmY_l00ck)1V8`;KmY_l00ck)1V8`;KmY_l z00ck)1V8`;KmY_l00ck)1V8`;KmY_l00ck)1V8`;KmY_l00ck)1V8`;KmY_l00f?E z0{IG||6;FD^U(i)JZMiVMO_miRF%f#QY!5Epgo=H?y)5t^9c$~h&QfQp)J9ip}Wf{iKourXaftE!* z>p>sPAU&B3M$6yquP7YbG;Nz~x*m%;QerV(CtX!_onou1VUV6oI!-vO>!z76o&P|0 z9L_=h@pw9&%W?dC-nMf&MG5T5Br6}b!aOCoO1Dy#~SL^!d zsID__s+lU~YDr@o`H+@KxGt?n2%b$Vblut6nVFFh(=-fSN-V}zkbgGoy40u-=1)m+ z-9#d=lQppCa<-k#+EQ{kvX^z{P5Gy$W@m%>wDNqOddDGu-dW;rS)>~VorZ8Y@ORyG zy1##NGM#o^vQs7&UU4clK0Y+$c_}Gmcbu`Yfq~xMo*s^G7|}K1{pIy>1oE%6D@w5b z{{A2z*)^@ME*jkI&l?&V9}nsy3!g%opGrlen>Ux^ zmCp;WFOi_zLc;uQo9|9IOx4oA7YWA;?j4U&pG+!>W%cxQb&*D7 z==_e2jf{{^!gre2uSl^h#|ixT#?UPY&abX(S|XuI;n_lTcJ}qTZf9pW%&SQxh)*m= zb~@W@I7|1N^x#IS>f|J?JQj<`+uPgP$e-e}Fkc$WWQK={Iz5x@-rdnbo6Z_n80-&? zjf{+qIS!pv+a|rMi%tvOL8ZjBt*xVj@{)~Luj^Dh>zbBKQU&Gwl&iJ1rG@Qu2Ft%M zG&U_|csP?O+vyBc>U;(?jqfb|vQifEHw;Z{m!fIRKVTJ{7~20jDXJRON3%LQ`ugab zcD*d5H_A7_m}aWW6fMPG@1>H~v!*pR$``?~gR{yo z@+~!?i|On4imU13uj%3rFCsoGMC{dDE0r(KseC^3h52%IRs9Q1>b6a-TXsk7Y_Z-u zE!!E{-j^*W+gaK4Ew<&z@5es2(Epk99e=-n(C@VxeB1ilKQM25lr(>nU(|E!n}Q#* zrhR2@ACWR278YJysYxg|Hr!~B79!eIgRn!38|DYSvkTjQ-=6&F#1FATL`;Q*IXC~N z_u$s6#jV~S^IN^_mp5CYjkWrpZ^)-J(OUhlnyN2uM)il^7Bk*;yjbVC{(~Ef2LTWO z0T2KI5C8!X009sH0T2KI5C8!X009sH0T2KI5C8!X009sH0T2KI5C8!X009sH0T2KI c5C8!X009sH0T2KI5C8!X009sHf&WP0U(P;>z5oCK literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/stat_irq_blocking/test.sym b/cinema/gb/mooneye-gb/acceptance/ppu/stat_irq_blocking/test.sym new file mode 100644 index 000000000..005ebb19a --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/ppu/stat_irq_blocking/test.sym @@ -0,0 +1,102 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/ppu/stat_irq_blocking.gb". + +[labels] +01:4940 clear_vram +01:48ff disable_lcd_safe +01:4905 disable_lcd_safe@wait_ly_0 +01:4954 memcpy +01:495d memset +01:491d print_hex4 +01:494a print_hex8 +01:496d print_inline_string +01:4929 print_load_font +01:4935 print_newline +01:47f0 print_reg_dump +01:4966 print_string +01:4875 quit +01:488a quit@cb_return +01:488f quit@wait_ly_1 +01:4895 quit@wait_ly_2 +01:489b quit@wait_ly_3 +01:48a1 quit@wait_ly_4 +01:48ab quit@success +01:48d2 quit@failure +01:48e7 quit@halt +01:48e8 quit@halt_execution_0 +01:48eb reset_screen +01:490e serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0151 test_round1 +00:0156 test_round1@wait_ly_5 +00:015c test_round1@wait_ly_6 +00:016b fail_round1 +00:0173 fail_round1@quit_inline_1 +00:018e test_round2 +00:0198 ly_iteration +00:01ae finish_round2 +00:01b6 finish_round2@quit_inline_2 +00:01c7 fail_round2 +00:01ec fail_round2@quit_inline_3 + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000001 _sizeof_main +0000001a _sizeof_test_round1 +00000023 _sizeof_fail_round1 +0000000a _sizeof_test_round2 +00000016 _sizeof_ly_iteration +00000019 _sizeof_finish_round2 diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/stat_lyc_onoff/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/ppu/stat_lyc_onoff/baseline_0000.png new file mode 100644 index 0000000000000000000000000000000000000000..f9e5e47b50a4d548ddbc988a8e76364d30f505cf GIT binary patch literal 528 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|VoAPZ!6KiaBquU(7mWz~FE( z<;Va1cWgxt&B%VfEU&=!xnok3TT$lH;@jICuivi!&oIyXfkoqEmOfz%KM+GNxySPP z*F*Dd<=5Z6-dB81|M;InsWNlk%!+)xcY&$;KG^WAfoyd*0tPe*=!I$@r96fxHm`}Wsj@zz#RS94mtFY3isq3+o8;d!y` z&aL5lckljq`P#MPgTvc?xpnu><&UpjZL{7U85tfrGqmq`!5kYpJtq44gp^pD*!R0` z*?!(q{FTIonnic{g84u`FPaami~gZm-}bjZ6pQ)gZ_?&c;#_QQ@o?o6uX5Y#eB z9p+8JQ&EXOA$)=n77wi+a6h;`OU(HAOHd&00JNY0w4eaAOHd&00JNY0w4ea zAOHd&00JNY0w4eaAOHd&00JNY0w4eaAOHd&00JNY0w4eaAOHd&00JNY0w4eaAOHd& z00JNY0w4eaAOHeSN}wDO`YZN`T894r<3VQ{6?IjFP*s{wONrWPrc~lV^Qzj^lujGQ zmMys)tr!@Xo<4D+p<(ad+FG(3hAE}7vAMaik^MO?y_2Y_rjduH@jQLTrO-UtTUrdm zvJ9i8g)|aM(6Z>sdhiTZkeZM#%bl)#?Lkxo0Xf4Thl{uGZ!VCQ$sQk1X; zjvUq-=uD`#R@Vmxbe(xq&Xg%gw$s91QX! z3wI%{&*ziLojb#LVZU&F*(}`_66SB)e0Sn;%9hTzx_0yCI<{-t+WSjhBpffecRWYW zTuxCetFyDCgES&T{aYyX_mfV-cbe;0q*#{Y1pa(u=oSS1tLvJU&1zD3wGi#?-QBL+ z-X4#0HQ6ljNu|h6y}gRFdcR2zZltP?j#A~RR62d&Kx-@cQ(PA2OLN6yUmsDYcar`4 zGZ{K`);Po9d}yw}zff=->Qvh%y`zJ=h3=qIW!l=B$L0Oo__p. +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/ppu/stat_lyc_onoff.gb". + +[labels] +01:48af clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48b9 memcpy +01:48c2 memset +01:48d2 print_inline_string +01:4898 print_load_font +01:48a4 print_newline +01:48cb print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte +01:4000 font +00:0150 main +00:0158 round1 +00:015b round1@wait_ly_5 +00:0161 round1@wait_ly_6 +00:017f round1@quit_inline_1 +00:01a9 round1@quit_inline_2 +00:01d3 round1@quit_inline_3 +00:01ec round2 +00:01f0 round2@wait_ly_7 +00:01f6 round2@wait_ly_8 +00:0214 round2@quit_inline_4 +00:023e round2@quit_inline_5 +00:0268 round2@quit_inline_6 +00:0281 round3 +00:0285 round3@wait_ly_9 +00:028b round3@wait_ly_10 +00:02a7 round3@quit_inline_7 +00:02d1 round3@quit_inline_8 +00:02fb round3@quit_inline_9 +00:0314 round4 +00:0315 round4@wait_ly_11 +00:031b round4@wait_ly_12 +00:0337 round4@quit_inline_10 +00:035d round4@quit_inline_11 +00:0377 finish +00:037e finish@quit_inline_12 +00:038f fail_intr_round1 +00:0396 fail_intr_round1@quit_inline_13 +00:03ad fail_intr_round2 +00:03b4 fail_intr_round2@quit_inline_14 +00:03cb fail_intr_round3 +00:03d2 fail_intr_round3@quit_inline_15 + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_main +00000094 _sizeof_round1 +00000095 _sizeof_round2 +00000093 _sizeof_round3 +00000063 _sizeof_round4 +00000018 _sizeof_finish +0000001e _sizeof_fail_intr_round1 +0000001e _sizeof_fail_intr_round2 diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/vblank_stat_intr-GS/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/ppu/vblank_stat_intr-GS/baseline_0000.png new file mode 100644 index 0000000000000000000000000000000000000000..1574fdc6a64b6573e506495cf6091ae2cee7581f GIT binary patch literal 1206 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QH~r;B4q#hkZuFHW0nz{Be6 z|L_0wm(0=An71)RYduPPwlq?~DRG12gF`0giy348+011)(v(mrpu^X6)Nz9ahZy_8 zM>SrWmrd5z@1An>vPoc^`oqnCHvhV@^JQ^-Y!UC)+0l2Ut*+hf`v27Dv(5Hx&jP=d z*++=wz1*3!(ZuD}>sVp4pw_AP#cFO%+9o_*b#?LTkhOPW-xt1pEgt>x;pVzkdD+#~ zZ=?2~y?E;7p>J!lR+&7No&Q$e`uN&=yBF`g!G2<{=;IX^#sANiyn8>>@Z`@q`a#WN zpT#oj9~G#2%dm7eBfE9^XD9cYcLJo&9Oy8vn3+>P_m1|Jk8U>;J_P(?-5s#kbjvxZ zetE;XhZVm+?eLMay1c3W#?kofoE_1HJwIMQKPdO;UF~a|p0bOfpZ=V?e0y$q(;lak z?s=2fJQZJ8@_p&;_xrL}>+VtdKOyjvK8)LTe*wdMNy5HHbZTD*3-E!^V)uvK|kk>s{Z#~1(#clsSF4?kKc8TeM z^*q}tX` z6iTqPuFPEfDC|R+z;T=6Te?>cehOgkUL3=|d;YZWW|jAgroMjgX#3s$>-e^v3}9cs zIwIrjUWq5KUnR`8`Mv4%-v{B!(d^bvvN4eg&aySPo(HoZe!Y-SZ24xsGRc-}ublS! zEtl=@Ub}eGd(}n`IXUsWw=`CoU3;B%Uw3hT0njKrrP7}lcAXO3#VYIGGbP3P>8Te} z*91+j{kz=mcGG*lzgv`_zgVq1D<$5t*X^8@Tea-(>g(d}*&)lN@6WyU z-a5)YUQ#5zXU&bcU*Dys>mSJHUiYm%RQp)T;^4LKoQogt^(!T{Y z=P9e$o}BgkX2qWyM>%e_URo47J zQ*gfYmAzYkAn8pI*TiES^u}JsL!d8uAs0i+RbJ2C?b_xRKHPKrJ$K*F_xF3AA2*&i z@w_R-nuQrf8^YXd!1VSxan+%eQ!@%9(9AH+5ceafh#`>j>mCq1M4aj+gqKZHFO*(D zm%X_alsd$udQDZ!bvx5!Vs??Jn&pXumr;HOF6V!nSCaC0mU;38q#0ADkJ*{+6E=MA zs&a-z_KZx_oVJ6HSzbm>CSyyurUk?6t18dsQ$sU(yK3svYfAI!NGvFAiLk;Y=9R{H zbx>Jfi*8i|6hT2WhDOl@8b?!T5{1w-KG6v(sKh=q0FA4`7yM*O4L0zTNj2DvQ*t9d z>o);YckOFdF7Oxgihl4d?kKb2X)Q-r(Wm^?)i{0yW_w{>vy8pd)xO~gD zV>;XF_V$yvZg}pvJAoK!lY<=?AxRK(+D@x5z_%I_$N^3sduKZ&ji{ZbNO0WhFToL~ zYORGhBJ}}cPy-tbkmuylOfWa6m!oFBrWrU4gU6gak;}lJmHD~`It}mcXO%C zH#LJg!(fDyr~Yr?Puuft4Xii7C!9R_e=x?7;Kbp|lCv~BAYFkE@buw1 zi04B*hw!wPu#5x$?z&iD{S!eB+SM`Lk_aY*g05U}`0X)cU zaieI*e9^R0uyT$TsiS-`sAmbeK$wO@8x@-swIe;BPKp%Z2|z}KFx-k=klNvQp&bsq jS}mh3h1MT!IP%ej)}Q9QrB&Lx{XtrUQ4xR6E$9CN)saNz delta 1533 zcmZvcUuauZ9LLW&w@uO{{gd5UuPxYfGZ}HR(jmAyH0w>9=4QDrqX||RqYRNfOne#s zp_{t_eUZIb2ihm;_96%pwMx;4a#?Zoa=8e?=96+Cv`CausIvB|iNAAB?qQXM^EpMLDa(Vgv?_Iosh>-#j+jZU5f9Y0R4FX8cY z4E0>yQfPQa7)R~McxmTY!uj>icYhsgcba;_c~kFma02;zr95s8IN*3&dD80Vt9u(S zn1C-ph_R)#5#8nQ3f;}qz-R`8f4_k?ju8I|(|^|VI~AQS`{#&0)$!U7c3b>}9!|%U zf!^W7Z>S;NYD=)6)9)&^t10PA(i?upshfthBZY$%w-8$f0X{iotXNyBc%c1JbhXJ~zm=Y>l-K(%%89{mkzIj<-1vO&0JoW!6=p6nWFRleowwF%Yhb z4^B`NVy7A=oo{j(fZ_|n*C{%vjoJ8hE_YH{nUHWWpqu zGQm3wNQ--98sQhkR)!>iOhw4oz_;P(y38wlOfs)=DVePG#{$HT`ejJ?j7u_u@S6C5 zCGbn?6I@B=NiHRl zm7Wvxtn?)aIL{?95x&S)w#F0UkT4V_yd!pW6PCD=2`gO61n)91zv3RT5MCEsS?L%c z2P5QN;dhb0aK(`}`_AofEt$~T)rT4xG=;b0{&vYtwo$Gpt7!M#k~iT$WqA`?3Vspy z#$u?N?sM~lEA8YYxgEbfk#$vUSnLR6lp0Wj{ftI&J+fxIma0OCieI(t?rcHM+R^Ov m{@ITre@2de8d=5tqqid8l%sbd3;qdtDc->Ctlm^cp8gNkiRhgG diff --git a/cinema/gb/mooneye-gb/acceptance/ppu/vblank_stat_intr-GS/test.sym b/cinema/gb/mooneye-gb/acceptance/ppu/vblank_stat_intr-GS/test.sym new file mode 100644 index 000000000..afe2d58b7 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/ppu/vblank_stat_intr-GS/test.sym @@ -0,0 +1,155 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/ppu/vblank_stat_intr-GS.gb". + +[labels] +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0169 fail_halt +00:0170 fail_halt@quit_inline_1 +00:017e test_round1 +00:018a test_round1@wait_ly_5 +00:01d5 finish_round1 +00:01f3 test_round2 +00:01ff test_round2@wait_ly_6 +00:024b finish_round2 +00:026d test_round3 +00:0279 test_round3@wait_ly_7 +00:02c4 finish_round3 +00:02e2 test_round4 +00:02ee test_round4@wait_ly_8 +00:033a finish_round4 +00:033c test_finish +00:ff91 intr_vec_vblank +00:ff94 intr_vec_stat +00:ff97 round1 +00:ff98 round2 +00:ff99 round3 + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000003 _sizeof_intr_vec_vblank +00000003 _sizeof_intr_vec_stat +00000001 _sizeof_round1 +00000001 _sizeof_round2 +00000001 _sizeof_round3 +00000019 _sizeof_main +00000015 _sizeof_fail_halt +00000057 _sizeof_test_round1 +0000001e _sizeof_finish_round1 +00000058 _sizeof_test_round2 +00000022 _sizeof_finish_round2 +00000057 _sizeof_test_round3 +0000001e _sizeof_finish_round3 +00000058 _sizeof_test_round4 +00000002 _sizeof_finish_round4 diff --git a/cinema/gb/mooneye-gb/acceptance/push_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/push_timing/test.gb index b57ffa261007595fa41d9d04fab180de42126a30..b04fcf068acfb1b40918d2dc036392ff70a7e19b 100644 GIT binary patch delta 1123 zcmai!PiWIn9LHZebh7$qwRVJwTT;fXh_Zp83=LVjfA$RnQ`o?RimNgdH`X3z=S-$f zyT2)T+11m$b-KgwB1-6JC;>0t-(@|HCuQn}w*HbD+s=(W@_YHchE%z8q?;&DTi{O~tCO)66MG zTgfs$;k`(!6^~jlN3i)8_l55dMWW%+2(s32oDIQD2kEt%qGbX|KBeuDo7&w4y+&5ClsC#Zh!rC^}0DN6=Ft=q(o*&>~DK zlv+32u-S~wLCm8?gBPJG%3G~Gk1cVh4^|yLpwt~|IMVDp?-$3+tN1ZQ3}PJO3B&{h z>k|bD&N~hfvA>fa`ZX!PlxD)G0EwTG#MIwsE8J^3?E`Cd2w8ATFsd;?2xOa{zzS2k_XtbiLo}W`FcU a7W2E=pEXrWX+OL5*?faj#)`+)ci|61YQU}l delta 1440 zcmY+EQD_r)9LN9vi)qs&ZIhnXqk{b>E0QsgmVs7bF-e;yF*gHASRZ`oh7Ud{zR1|9 zx;vRK;)}8e`!vd427{5QgEED3Sd<>eAqdVVM;_kOCi7Cnq>N;*x;v$m*-bv6^h@Gyme$Pf)>Op$ z=h>q-Q+~IVidf&I1}qvOkjoZ22@4$OzwAV37*~GwYG(*nFToqc)yCTA<*9@}S~xhd ztMG@XRHN7Ly`uZFw-VvIxy^p#+dJ!HX*H&8&%vWBdd{ldY8Tow?P~jEHrdW)-?d9?iLyIUc8`_aZZ*Z0T(g{leg5uk zi$5DI-WM7Qk46p-9@=*}O|i2HahcA))BNm3td-1B+QLjM z-)I!;%}VW*3}q^dE1CTeq)#ytZx$O(HkYsH#aUu^lGc^Zh;_N6T6{V~j7OF{)tdK4 ztc68)RKEnr7#ymXv_8uW^DQsO{k`lJK()W{E@05sJWR4ck5u@qA;yR^lQ}_)D3v^+ zHF4oMBObMCUex*{lLRO|EBq8Ad$n%nukNY1_rfrqxb^ZwZ7|X*L{53j2n}Idgvs4vIRC-=Fdf9@^8bNmE i!|d(ApOw*H0;~98^kLwaW%OBK>ARzL_uhyy_UZpUc*rsU diff --git a/cinema/gb/mooneye-gb/acceptance/push_timing/test.sym b/cinema/gb/mooneye-gb/acceptance/push_timing/test.sym index d259ae971..fc2b1df79 100644 --- a/cinema/gb/mooneye-gb/acceptance/push_timing/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/push_timing/test.sym @@ -1,199 +1,130 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/push_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/push_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 -00:0157 _wait_ly_5 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0151 main@wait_ly_5 +00:0157 main@wait_ly_6 00:0177 test_finish -00:01bb hiram_test -00:01c2 _wait_ly_6 -00:01c8 _wait_ly_7 -00:01e2 _wait_ly_8 -00:01e8 _wait_ly_9 +00:01c0 hiram_test +00:01c7 hiram_test@wait_ly_7 +00:01cd hiram_test@wait_ly_8 +00:01e7 hiram_test@wait_ly_9 +00:01ed hiram_test@wait_ly_10 + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000027 _sizeof_main +00000049 _sizeof_test_finish diff --git a/cinema/gb/mooneye-gb/acceptance/rapid_di_ei/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/rapid_di_ei/baseline_0000.png index 724d67aea6df93eb598ef6c72c54f43d70e5832e..2ad0cf1d61533b1e1449ba8aaa58365cbd74dfab 100644 GIT binary patch literal 1186 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QH@r;B4q#hkZuFHW0nz{Be6 z|L_0wm&|LYGjC&zj(ReC=5#X^L9S-rLvaz;N_`icp1)m~Azna-uj#1c1`7@`_JfZU zBIfveWkyc>b8CrC+_ctDRvh!+&VTdx!LswUA17O0d3g8Hy$c)fMg7rFkG#Hho9X#Y z-+v$c_HfobYq4P0lf7k6@ zd-w9K-GBDxsi*C?^F@P~YRdn36E7okz3P46vrBdka%)Wbq-sCzpLy}`TruG}=fApp zT}Vo6{HD$qzUc_UkuogZ%?X88`Xx*5He59DHQ}-`vmgBux&G^u&3&`9dF#GhKPWwY^W58xe_oyb?6Pl0W!2+LP08<0r>C7P zZZY@Y6!ZGD^JJ;axZvvtZ8Kx%rP%)3sy{E~=*i3d3x3N+ILhky-LbNWykhoyy5Hl2 znjaV~TGuvTzL6PttlGvx^6ATVZ*kj*_-CqWGk^55KUZz`-1W$4mdJB+V>y|Pe0|4s zD#beE*sq5b+7~U`(Zx}@%jo7m4*!LGV#|yD!XBr(Z#lU6j@y%o>*LvC%5JPXF=4^y zMZtT1ZJN=4^(%wD+wtaZ`|4@GKK-*3xprT5arma7Oyjegbn~8BuD|OdTQm7ixT|$R zj8I8j$*=vIvB#zJ*z#pEn#B)xT1CjcN+?82N|0EpV_}!M-ZSldPfUFGy4XBjz4tSO z@9$8^F)hAkaH~Y-_-+2#ySIJqJ}rGe_SJdoQ~&oHYp(nDv-Xe4VT(WOKVELiHWuqz zY`gVouiw@k{A;H^SKF$*C0?$q>Dc@^HO&9##ooA4uvOFa=+oY}JEmt%u2!up{CVB% zX?OC6#mpZPZ=GGNdEESX>ilE>KQR|1+2D32R<|#@qi+?u%qi;bA;pS$buK&OOAM!E zf3T?B_32shWWDgjr7FF)<}WXHEfV~)({ul4ckRtjES)Y)UQ-%-{`cWpJ ztAwA{U3}R)d5uNoFF_OC4N4i}ykQ#G4{qDOe(sj;uyxIo4;N3KJ#b;&e`uB?PRv$`u-oFvd7ca&t;ucLK6Uzo;QgA literal 1200 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QIBr;B4q#hkZuFV0%6z|&H= zf8T%Y?=dC(PlJU7CYkblzW?T0mW-sMQb_;z-*Y+i?ESeF_FYIQ$S|-lk&uz%;p1g% zXKViKr73%SqW$#D!ksa{UQKbkf9uJXqJLprN-wXd=AL`~dAZJ!O%1DBL)Qhz{@)UC z%Y{qnZTL->iCZj>uRP{q`XlUP==DIeJ-e>1U#|Y|TupYt)`lrcyKk#JGhUfqyOhn_ z?OxY@{`-E{zCH?Hs&o9`A|3OWH@*8Amj6iDbBh1^ufSZ<(@s;YBA1_9k`v^b-@D%G z{jvM(aoZ0h%0b=d+~kOIYzjCPaOsobT=^yW%`d(rZ|htq^gQO;)FT&P9{1oq zceT9e&(`H;E*ZbVE=C@GDs`uR%O#VZ{WIrn>^djeG_U*!*Rz8UdQ2|TJo^;#@- z&++ET6aDOCX1zH1$4K8W@R7OPoasJYB}Y?DG|w3p+gK#Y$@GSngmuni_ul=Yf6mHx zN=<&@V%G8}V}XVmTc~^gv=GSMG<~(pyqkL@KWJ>YJ5kZ`x$E+ZpQ)k!SN}5DryXxz z-M-hW?q)q->(})s-^^VTqP;Bi)S}?$yWXiiJ2>~rHmzH&i#;z?UVK>}xU0{+ge_ce z%fZPHj@U@Z0fPf6HXw-z5=k}rq4(xaDvH&+D?Vk}4-MvmQ@Y1q)vdOFdF5-q)8n|3 z$Ozm2-mNRv*X%vMnn%do^vjz4{QG^sDB65~rMu^iQpF4JF!EdF|B zNs*F+$R3uI>)V(v*w?SnR_DF?~mm5zR5nJoFQ%}=(F$z7`^Wy$Zy_ukjb&gyT)r@fwM71Yi;fBk;y=k1d} zG`H>6d{aGnjSzpVr_9_smbWQK&+FSCxo#QJy!Mm#-|xFWpJ%=ByScFBmtct4Mx_j4 m-!%(xMh1q@NDBwts(-RarcIWY4Yn}^l|-JdelF{r5}E*IMK(hK diff --git a/cinema/gb/mooneye-gb/acceptance/rapid_di_ei/test.gb b/cinema/gb/mooneye-gb/acceptance/rapid_di_ei/test.gb index 1a034b1ac442576d145c8dbdc88520c925746ad6..2ac2cd382dec7e31a860ba46d41aff070d7a79ae 100644 GIT binary patch delta 1068 zcmZo@U}|V!+Th2?6z()RfYH{y|EI438QmbpJv+t+eIUj&Afp$=c=uWHgZtqPUYjp6>ey{^_`qH-*zo^sf%n-J z-a)D9nZ+fkMa2vtJ`ibp0m%;?+ck87vW~^YsYNB3`FU_@Cy%P_8bT1gA*sbB3TcU% zIjJcOC)bC6=!geuQBYtw?W~~*(#!xPtP~hNH2Qz&+Nr^FwiRTdq5^}6M7=1Gf4GoaP~LmzGf>XH1M4c6!i)7awwp%=GCgg%7L#b5(GUMy?bvR;9r_Hz-e780a*J0w)v&&Ikqd zFcmH+DqImNUKxc!;F)P4*yU8`{44gU*Q*! zoB$@_?5gDo>TJw>to33Xa=dDydP)uzXFa_ufw&5YtAV%%h--mZLe#;|2}q+M2L_41 z>mN8haDL$Zz{^hXfrH(j2kwWfy+O9toq$+)df&+hjCPF=nAY1e0D;2Klh647aak}O zV?Sn~bW%~EL6E`Kf$;b= delta 1380 zcmY+DL1+^}6ozLuwoQ|?O}bT=3U(4jBZ5=}t%9*>n`+6py#L?#zW?ozEfkbO zL3uVvmA%&eQ}lR`*ZjKh_SeDcMltL)uY?;->Lt#4GDgY)6C8UHDnC|BFx=Hy2IK1U`SytF*Vcxi8jJX~-`tsDb?Pp^_Vb7pCIw1Zadtf! zCRI8~umAYepO3B$^%GsTAj;5TAOqfkL zg;W^ks+-5g9vduB?`f{v=H1z}XX}9o(f)>rN$;ebfUfz563KKfpBTy!hw1#=#jh2w zIUPMhi`e6j=W>amd^$TQo1*El>F9Q7r0=mMkWb|DtUsRC6Me)ghs^8cR&%_pntVG$ ztVbp)sySR~HAlvrZTdC%wZl)Xgv{g77Cy4vQEg-20IDtFQ^2CdVc2AZ9!~RJJ&X~% zH+q65P%3dkv*N}vMk>_IR($5GXb7P6yzs+}v}qj%y^OLhn*o9rq_p#brtJ_iX; zQ7V0ePKz5np$-z7-Gq0-uLXQWB?G>5X=pOR9t9@J@W)pYg!-`ZaOM_ZHo44*@N3LY zRFZiDr9|?jheSVL`Vs`3MX96+9p#mwVL}5W1l@$2VxpFC50y-qL@5*OYruSoo}v>v zBS!hs^?+<~k&D8wA-|wPq{07lKTu01Y;A>ug%Ihcs}0U-((+YFbW6metyxLC)7h`v zothush?S0dk_|Lkv6jiIuS=P0nCpyKDvj&>2cK{sl> pJ+jwudwc)yec<|ivh|5;CH`-HN9OW^bfSSsw4ma diff --git a/cinema/gb/mooneye-gb/acceptance/rapid_di_ei/test.sym b/cinema/gb/mooneye-gb/acceptance/rapid_di_ei/test.sym index c376b30e3..3e79d9a89 100644 --- a/cinema/gb/mooneye-gb/acceptance/rapid_di_ei/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/rapid_di_ei/test.sym @@ -1,192 +1,122 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/rapid_di_ei.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/rapid_di_ei.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:018b test_finish + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +0000003b _sizeof_main diff --git a/cinema/gb/mooneye-gb/acceptance/ret_cc_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/ret_cc_timing/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/acceptance/ret_cc_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/ret_cc_timing/test.gb index acb9f20cd2fead45846a61bb0dc0c08cae7e13dd..c6f0a0b2f3f8ec2f0e96fae7ee783d62c3a82de3 100644 GIT binary patch delta 395 zcmZo@U}|V!+Th11^g2+n;lH3P6C)GD*_|FAT>kY>PGFR0?4R7gD8eWAS#b{I;ScU- zmw24LtwIe@0OQpq6(CEpCpUK2{1r z{-J&@3PucKPA5Mr@-V>-3`s36*}Q=1f$T(quFVY!1?u&N3=bGtJ&ry-Tjg;!&ExD0 z4@HIQB+M=GJsilY hQsS2Q!Nt7%gp$P1gJ(~B96h;tBhz`=%?FqwB>|`su~h&7 delta 1601 zcma)+UuauZ9LLY^WKFvyYn$FKUN&6Mjp8DLWInh$uxr|+NtR19l4u_Ur}*GQMFbJ0 zo8AlhGWMcOu@5T6mw_NrDilS^#lh(1a`6w$Jt=t*!75Tvm%V%Uzi&M~9vNF`LTlt^GJ9q4Mnt5=kA~zt> zD3zKUa83Z z-L&`m?v!_7*YIR_j(Qf@de`t)x>Me{wJ>9!$KwbdMmOy}o|}+Uex2z}i{BAy{!FXD z$D+N0ot%S5tFqUa5G+{CorV%gUSLpH7fuP*1+U&scwgqy2!-dBZwWSS&N%Q2$&q>u z3FaicMRH829}8;8Tqln&G5A=`l}v`rgAwy96MV4){Y#$J7bIDl%D3E}xee zBxn?q%mc_g6fv{PA29QzH1jk`jg(C{RK0BaWej+hB(E@7l_STbgi%bGj1t~dGX@Fo zkkSboBy~b?9+_W|$884NYN~8Hj>w4!`J?g&$X`ei(vi>HU!*k?yY{U~H_hf@ZxlbF zexk>62eL8qre6;7;X`(iHxbVO)p;wjp1m zqtJ@1rGaG_7-GN+wlk<*(6#u. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/ret_cc_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/ret_cc_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48af clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48b9 memcpy +01:48c2 memset +01:48d2 print_inline_string +01:4898 print_load_font +01:48a4 print_newline +01:48cb print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:0150 main 00:015c test_round1 -00:015c _wait_ly_4 -00:0162 _wait_ly_5 -00:017c _wait_ly_6 -00:0182 _wait_ly_7 +00:015c test_round1@wait_ly_5 +00:0162 test_round1@wait_ly_6 +00:017c test_round1@wait_ly_7 +00:0182 test_round1@wait_ly_8 00:0192 finish_round1 -00:01a9 _wait_ly_8 -00:01af _wait_ly_9 -00:01c5 _print_results_halt_1 -00:01c8 _test_failure_cb_0 -00:01d0 _print_sl_data55 -00:01de _print_sl_out55 -00:01e1 test_round2 -00:01e1 _wait_ly_10 -00:01e7 _wait_ly_11 -00:01fb _wait_ly_12 -00:0201 _wait_ly_13 -00:0212 finish_round2 -00:0229 _wait_ly_14 -00:022f _wait_ly_15 -00:0245 _print_results_halt_2 -00:0248 _test_failure_cb_1 -00:0250 _print_sl_data56 -00:025e _print_sl_out56 -00:0261 test_success -00:0275 _wait_ly_16 -00:027b _wait_ly_17 -00:0291 _print_results_halt_3 -00:0294 _test_ok_cb_0 -00:029c _print_sl_data57 -00:02a4 _print_sl_out57 -00:02a7 hiram_cb +00:019c finish_round1@quit_inline_1 +00:01b3 test_round2 +00:01b3 test_round2@wait_ly_9 +00:01b9 test_round2@wait_ly_10 +00:01cd test_round2@wait_ly_11 +00:01d3 test_round2@wait_ly_12 +00:01e4 finish_round2 +00:01ee finish_round2@quit_inline_2 +00:0205 test_success +00:020c test_success@quit_inline_3 +00:021d hiram_cb + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +0000000c _sizeof_main +00000036 _sizeof_test_round1 +00000021 _sizeof_finish_round1 +00000031 _sizeof_test_round2 +00000021 _sizeof_finish_round2 +00000018 _sizeof_test_success diff --git a/cinema/gb/mooneye-gb/acceptance/ret_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/ret_timing/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/acceptance/ret_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/ret_timing/test.gb index c53dc71fd7c3e610f7f89c7a20af5b146d8bdebb..3904a039fb02c352859e20f37740bc6e482f8dfb 100644 GIT binary patch delta 403 zcmZo@U}|V!+Th11^fF$t;lH3f6C)GD*_|FAT>kY>PGFR0?4R7gD9R`IS#d7o;ScU- zmw24LtA2BqlLSppFj+9d3@EK2{1r z{-J&@3PucKPA5Mr@-e~93rQ_5QSkR>5MwyG{^jP4Oy^}M3QXACpirP*Z^-a~k=5hq z)3a3`XVW~+&hSuVm~m3k;s5D>Ad6s5KxS7hS5RkT=3^D(kmFSo)l+h)INRw_3B*-E zTn)rEKwJyN5~2=vPCyzBIWS24UH`!8f%60J2VR+Wf)5<*{ycC$yxs$3YuyQmpHJ^Q z`GC=`@d49%TLvId_<2%Mph1wqf$;SBNkBW^a oq?ClYCBBCPSyf8h5?$ zRJVI!dl6q8g{@De_#z5YrGuhKxhP04my0O4Jx%f;K6FD06VzZ6f9H2{4-E<$lFR*m z@9%uRzu(Ed*Rq&pv1>DQVE$U%YQ-)y%80j_-^@18%^#I};9_jgb*QW`hZ_)eIiyC_GRHkSguMR5gjSfB&9du0d`@30v zVw^>Ub=Pv$+KSE|eXwHj@AjHMUSA(hXc7JSES$|HBKiyAtnr}sVMKp+z=;!!625%r zWgbSQO9ang_kLdAKCHXuEY~OMll4-4IvuNzr(f0cclrw*eOiUL%xu1~?J;80^93IEN<7#<_>PHVquX9h9-zxu6UkJoxk{~Ao>4`~;@oO-Hx$wbSP~TzbMY_c zvc%bl**|Rz*k?C1TXbj2n}RGfG<&u&U>}?FhKw`t8-}0Oh}mBz`^1tbqs>A7FF^H2 zI0bCz@+@?6jDB7ey#_cZ?qu>1&7ou&Ld){PK~5UfE;qvVjbsd<^lRzIIT_SPP5M2` zV7UYYy`TPyvYX2faZA8lK#xrkdQq+wOajcEKJ%vZC6lhBQpmqiDx}z%4O!2*N!%(V zyhP0=2n|f*I3ghc2~j^`kM!FK`%tNbF_bF7JpxDrJvK?`VYyTw86YD*@>}pt*t$0J zES4$ed6bGNx?YqZvDGIb;VMd&C3IC@5D7s@==BrsNxvQN4=NS#pOB`m65Lb3BqcFE z%MlvJvw&dk0A`QROh~`YOrcWDLnsweG+mMPqUqBRZ~`SO5PC|SnK~wPK|;Tu@QYm0 zPWTO#N?1av65KPu{1ZK95V|Ipil#$=?DLU-NxzMJj0%yaxaa;yt(efY6YsZTWSnkx z!MoH6H%W3wBA`Ea@@~re#Bfu31fGbeqajj`?sU?9OU>{YyW4d)m2fngF~k;zIL|;E z;xXDoYrZwrwlobwH2RHUwreL;ExfDc^2yHHKYTx{O0W1. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/ret_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/ret_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48af clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48b9 memcpy +01:48c2 memset +01:48d2 print_inline_string +01:4898 print_load_font +01:48a4 print_newline +01:48cb print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:0150 main 00:015c test_round1 -00:015c _wait_ly_4 -00:0162 _wait_ly_5 -00:017c _wait_ly_6 -00:0182 _wait_ly_7 +00:015c test_round1@wait_ly_5 +00:0162 test_round1@wait_ly_6 +00:017c test_round1@wait_ly_7 +00:0182 test_round1@wait_ly_8 00:0193 finish_round1 -00:01aa _wait_ly_8 -00:01b0 _wait_ly_9 -00:01c6 _print_results_halt_1 -00:01c9 _test_failure_cb_0 -00:01d1 _print_sl_data55 -00:01df _print_sl_out55 -00:01e2 test_round2 -00:01e2 _wait_ly_10 -00:01e8 _wait_ly_11 -00:01fc _wait_ly_12 -00:0202 _wait_ly_13 -00:0214 finish_round2 -00:022b _wait_ly_14 -00:0231 _wait_ly_15 -00:0247 _print_results_halt_2 -00:024a _test_failure_cb_1 -00:0252 _print_sl_data56 -00:0260 _print_sl_out56 -00:0263 test_success -00:0277 _wait_ly_16 -00:027d _wait_ly_17 -00:0293 _print_results_halt_3 -00:0296 _test_ok_cb_0 -00:029e _print_sl_data57 -00:02a6 _print_sl_out57 -00:02a9 hiram_cb +00:019d finish_round1@quit_inline_1 +00:01b4 test_round2 +00:01b4 test_round2@wait_ly_9 +00:01ba test_round2@wait_ly_10 +00:01ce test_round2@wait_ly_11 +00:01d4 test_round2@wait_ly_12 +00:01e6 finish_round2 +00:01f0 finish_round2@quit_inline_2 +00:0207 test_success +00:020e test_success@quit_inline_3 +00:021f hiram_cb + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +0000000c _sizeof_main +00000037 _sizeof_test_round1 +00000021 _sizeof_finish_round1 +00000032 _sizeof_test_round2 +00000021 _sizeof_finish_round2 +00000018 _sizeof_test_success diff --git a/cinema/gb/mooneye-gb/acceptance/reti_intr_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/reti_intr_timing/baseline_0000.png index 1cadf780c5afc91df47bfbcdbde882f45bae9d0f..4af97ce5c4b3b0d8bed2853b3f8831ff2962a635 100644 GIT binary patch literal 1171 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QHxr;B4q#hkZuFHT#mAi!Ga z|L_0wyX|j;`khu^IPz@St5l)MnVhN_+^;sR%VvuGXA{dH!QFJ!af1bi82iCT3K23a z-JiWQbx%*azkA8i)0-y5u|NF!Z*uLMJ6m?@*BQ6ps*SoMC3P*j`~PE|*SoG|eb%Vn zExTub%;n;vNvk@xT%XOIBO+=vU##ZVq;1^y@9We>Ey;NLuBt!#{Qrn<{`G%WMO-hd zeH*p^?8Q?rr@!s*a$TzVz9RSj8=31>@7tawy;mp?>)GoT{U?4|dG+$6EYC~-O%>WQ zBXYst&cicx3I%ldkli}xn6PZ7@q#OnO;L0H{n-8a$=~O1x*VJMi?(o=EwnI6(b?Y} zzPDfRxrNm37vJBn>{W}ENm|95Bf%`k`?Mzbw~2@4@r$=z#XC3a&gUzyTdU%K@lsRq zXH%(CSJ8Rwht&pB7Nty!XS$@`Rz z^NOx19oascZR>*>_Fp@~_rDd*V)2(t;XSKd9($(@RC`w%sut!SC^`8n~&bB;KEmwCWixxwO8<%jZP&A|_xUo4r+zWn3kgPN~4hNgLl z%PR7pTPING~0bqOQDjulCJ6TVy7Ql+_UMp_wm7_^Yc{q@7c%O`nBBa z{meBXtCmH+dX!}OeCzBJ&H9smugb9Q3vN2s?e~9m(Tj@1M;{#PGpi7qbE5gFB0oHB zH76iN;&Ww-2RqWXd^&UD=gt?mUWTpDF6|LM)EEB0(sg#<--_Ssc4cpkkIDPPW2vpd3y85}Sb4q9e00AR6eEb*0|QHer;B4q#hkZuy{A1^;BhUS z|EB)*OUGTBeZ47XmMhucw_e%RoZ2d$!s4}Q@BQ~IyZ-###=Jp{MU1`isAEE*K!gmK zS-Et|w%pVGr?>2|$+O++y;y(lrtCTMxAsKT{nE3YbN#vh&CXQzQ0vt>!MXdbGv+2q zZd~_z&Z8Y)3bx(t*y#3Q>ATh23jJ(WU47@@{a5|7anowqCnYzpPMC4uQ}^v$!5q%Y zlmCi;%uJEZuM0g@m-GJArzz7`Z?V{LVxPqNPX`NYLKY|8?7XIuZ9Zd8@Twmdf4q1e z`ulw2?`alK4n9)YV8Nlo$JE_?0GYYx+-!+6Q8%~0>A78QwtV;6wI7N#|1$Y2>T5>- z-rYRAVe_xrt@B^M;JG;edUEbvlXuUj%nh2gsqg#Gp9ibVI_AHY;Jq07XwURo|3^P| z_RSNV)BgU!zwFZ)9Rk1JJxZUd`u)MT@a(CHfBY(s#r}~|eDRwv%~4Lr&%fi_>&#zk z=3aZ=C$aradBkR~DQU4uR&&2Uh;%*SCucdY^o;Jbbz#3Ex85v#alY9;LV5kgj>+zQ zuQ#qfwR&5o`HSl!$3x6@r4Aa#znU0XSUqi}Xif2?ttS0ivA83|bI@f&p*WU*s zrFl~$g%&A4IrvlP^|$8F6CKs3Z%Q%OJeQqjA7REn??mjMHH+r3&p&oap-%5<+I#mM zT$LLv=9)&HJIt5eygBChrxP!ivu$tMDL%{N!mbx0`uo@XGA`U-DY*Fe!K>42r~ldX z*H$EKf3RElrl7U6-(3>#t-BX~*G2A*M_=g0JelPzYrFma?=E^-=e)S^xtp{Nr{9x< zpC+)QMH(zBKW`4H+^X`l;!c$K7O$E)ycX%58>?cUH`jd(7oJ|UNi4Q3?DYRI^?^k~{t9x_EDlb>)`Qz?gKVIy7|GfA{`wQi3ZT??(7&nFU zE4&su*LGF-$K|&%bm~&B69$3_G%KL6T-@w;a6E*IO$C|e8dR)TwCVZ2xAY18jfiLBg z=S4o+)wE#p8uf6a^G{DJ-dZ31ul2n13Fq&f!X_?8SeP>No_&M*$$6{GW^~my*&5wU;&SU@m`JhGJ vI^`A72Hgu3rP3Nv@&z6@lj1*|YCnr>d)bIS*w9@ADuO&+{an^LB{Ts5m9R>@cn77XXBL;F78Nsq_&}uX1tdRoY}e2Q$~qPorxulD=I6nsojj_xYY0K~ zhNKpkD5NE3=A@=DoLnFNp(7rsML~h#w6lgLNHYVFuu@?7(CGi6Yo`X!*;bH+iV6%O z67`}$mOn_X1UHbS009iAy}=sYU>Y0zKXjsM#I6tG9FWbyU;~_B1~mJB=)q<{J%-KE zV2#c&jZOX^y0K|Q*N3n<8Ek+H%z#$^4}G`|s7La1Hdv!8Ok<1xhhE$o5&94|7lRG( zfEm#4|6u|l1AzVq239p#qYq4DoBxM?LK;E(4i|U}gCorm7`alwSd|9z+@L&RVW86> z3Y<_BI3pC)!&JDSsBlH7fGO}mQQ(8D;3O~~Fdp?f`t+=o_gOXXvnk$+3^PtDI{ZKV z?}N*~euZB^asrryv#XXXsIxKivDS-m$nmO)>M1!?ob~js1mY?nt_I>7Ag%>s2~h_- zCm@Z692g}2u7BY4!1;mq11~$l2M%_B9=IQ__6FHncLHMJ>3t_3FxoXfU|Mg>00as@ zPd?-S$7R8EjQyB_(n&>u20;c_2gVQVhx@&2pUJVg2D5-d|6f wpN;VTcsRnlV&e%ZC1Gxf@8LjJl@hna4=(2ACzK?99z46y`{+qvehxAL0Ka6b1poj5 delta 1383 zcmY+DUr19?9LLYOQ}Mr@KrE0a17@zo4SGUvU(!YIt_p7T?EreY9&5&EiE@bT`qPXPK!7(?W zYGTzURE@0KT0Ng!dW&1FoSoSKr<4{e7y~=OutdM&7s8{*fZG=!B zBT`u1ON3AbFCbR+SIs-?+e4N6qzu;wq-?Gjh2lVQu$V56M1#ft=-*;uHITH9C9U41 zRZWM;yp>OeV6L)%Z0ddB-vO$8VNU^z7RF(d34A6+ zcXbeg%)v+>jx#C65YF%$X9+4}JyZ7RuOmT#;w#(_5!9k|X!r(`^_esflmNcRq>Jzm zGSk4EXPz{S@FJh3Oax4~&3was&cy3X3FIdx1(KdjiT4wtAu|gJdrV6M2s=jD3!vcJ9{_PB0}BdYBXm=0!lN%##KYzQ9K*QUavcMqUG7gQKf4XIPtH&N3;Obn8bP zM34G1Bs^nM8bWxP-=GQgkkDi&yyt!`;4@Pq;0KkOA`;9=V4^gAd?}8whgA;BtOI7F z%?xwD#_VKDF#DJkNV@bG@25*&hk#2=N=bw#X{9MF!3hZgJK-*$s3puXB@z~x6ba@u zFkdlGQW0L^qjc#8K>BUu2KQ^ouS_wdM*nj=ObaG#ZG-~(AnM24PHQ`1cq%AT7j`JS zM#Aj0PO4_7;)OS2tD^yBd~PG^U#NI`q&4SSXV{Q&Or=NIKu8SMps!Io&e_&*&5~sZ vk?~bktMv|uUd`?uJlOlt_J>64Q`?FkY<+9{NzwYzw$%NtMs;Zsx1IhE`3SB( diff --git a/cinema/gb/mooneye-gb/acceptance/reti_intr_timing/test.sym b/cinema/gb/mooneye-gb/acceptance/reti_intr_timing/test.sym index 8e838d547..5d4c9c8d2 100644 --- a/cinema/gb/mooneye-gb/acceptance/reti_intr_timing/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/reti_intr_timing/test.sym @@ -1,192 +1,122 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/reti_intr_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/reti_intr_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:0160 test_finish + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000010 _sizeof_main diff --git a/cinema/gb/mooneye-gb/acceptance/reti_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/reti_timing/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/acceptance/reti_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/reti_timing/test.gb index d9027634381da679912063c20077082f83652bf1..0eaf8f63603f00caee2f81cfd4489497ad1001d1 100644 GIT binary patch delta 403 zcmZo@U}|V!+Th11^s-*D;lH3f6C)GD*_|FAT>kY>PGFR0?4R7gD9R`IS#d7o;ScU- zmw24LtA2BqlLSppFj+9d3@EK2{1r z{-J&@3PucKPA5Mr@-e~93rQ_5QSkR>5MwyG{^jP4Oy^}M3QXACpirP*Z^-a~k=5hq z)3a3`XVW~+&hSuVm~m3k;s5D>Ad6s5KxS7hS5RkT=3^D(kmFSo)l+h)INRw_3B*-E zTn)rEKwJyN5~2=vPCyzBIWS24UH`!8f%60J2VR+Wf)5<*{ycC$yxs$3YuyQmpHJ^Q z`GC=`@d49%TLvId_<2%Mph1wqf$;SBNkBW^a oq?ClYCBBCPSyf8h52d%%El;{3DV2u;vaBh50gB|9y*bNf*NeH-}#-~LxTei$>n~( z_jf+u-|yt!Ygx>)*iVzRf97G_YQ?^1lo4+=znX2{nE8SZ(Hk=s-E11(rv>j&!E2S` zeAaVle5BDGmPt+n_73+-BeC2iHmgM5v^=Pz@ScXlwrKB|KXd#{82qJxfUZhe^5 zE5^Blu39TEN2K_^ZuO8ES} zw|N+q&JjF=-MhNHepq+OnXix5$Lgi}L^@U55Z&dGp2WYY5} zgXIzs^genWWjB`};+B9piyj*%^jo=BFbOa>`pjRYFPU^1l|ufBQX$38tjK!KP2yG| z;Vo)5N@!pL#}NquNQn9gTczJl*o{gh45L&D?lC|b=&>ki9pr z7raZIaFZlABm(+tC-0`bJ%*doBk)AL7z&Ycbfc5*ooj}N+5N8jsf44^j3Kr##CZnV z5RcJTTJx>(wxwwhqS4ca*{&T`weYT%%f~uvZ~J~$mHyycxz5txeZQbepZFHM%CRZz Qz-cWc*zxTPDfZjIf3Ri#SO5S3 diff --git a/cinema/gb/mooneye-gb/acceptance/reti_timing/test.sym b/cinema/gb/mooneye-gb/acceptance/reti_timing/test.sym index cc3bd7b43..02ea4c17b 100644 --- a/cinema/gb/mooneye-gb/acceptance/reti_timing/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/reti_timing/test.sym @@ -1,223 +1,64 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/reti_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/reti_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48af clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48b9 memcpy +01:48c2 memset +01:48d2 print_inline_string +01:4898 print_load_font +01:48a4 print_newline +01:48cb print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:0150 main 00:015c test_round1 -00:015c _wait_ly_4 -00:0162 _wait_ly_5 -00:017c _wait_ly_6 -00:0182 _wait_ly_7 +00:015c test_round1@wait_ly_5 +00:0162 test_round1@wait_ly_6 +00:017c test_round1@wait_ly_7 +00:0182 test_round1@wait_ly_8 00:0193 finish_round1 -00:01aa _wait_ly_8 -00:01b0 _wait_ly_9 -00:01c6 _print_results_halt_1 -00:01c9 _test_failure_cb_0 -00:01d1 _print_sl_data55 -00:01df _print_sl_out55 -00:01e2 test_round2 -00:01e2 _wait_ly_10 -00:01e8 _wait_ly_11 -00:01fc _wait_ly_12 -00:0202 _wait_ly_13 -00:0214 finish_round2 -00:022b _wait_ly_14 -00:0231 _wait_ly_15 -00:0247 _print_results_halt_2 -00:024a _test_failure_cb_1 -00:0252 _print_sl_data56 -00:0260 _print_sl_out56 -00:0263 test_success -00:0277 _wait_ly_16 -00:027d _wait_ly_17 -00:0293 _print_results_halt_3 -00:0296 _test_ok_cb_0 -00:029e _print_sl_data57 -00:02a6 _print_sl_out57 -00:02a9 hiram_cb +00:019d finish_round1@quit_inline_1 +00:01b4 test_round2 +00:01b4 test_round2@wait_ly_9 +00:01ba test_round2@wait_ly_10 +00:01ce test_round2@wait_ly_11 +00:01d4 test_round2@wait_ly_12 +00:01e6 finish_round2 +00:01f0 finish_round2@quit_inline_2 +00:0207 test_success +00:020e test_success@quit_inline_3 +00:021f hiram_cb + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +0000000c _sizeof_main +00000037 _sizeof_test_round1 +00000021 _sizeof_finish_round1 +00000032 _sizeof_test_round2 +00000021 _sizeof_finish_round2 +00000018 _sizeof_test_success diff --git a/cinema/gb/mooneye-gb/acceptance/rst_timing/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/rst_timing/baseline_0000.png index 92be0be997ba2a79ee53a7a552bed9240f3e9cb6..33cec3ec6a0ec4ea086c900a7cc4627cdb2c1c32 100644 GIT binary patch literal 1199 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QH$r;B4q#hkZuFHTybz~frD z`v3pwH`$kGbgKy}PORAbJT-mS+!^0YJX)^mKA*#(_diVCp=M!1frf+(7h8MNK`?WU zzgOn%ZJ%~~M()X#KK)vu=39MN|EaSxem|S08uB&o^KF9-@tXfm-z++J>EfTMwSVN^ zNPAaR>8Lp_*>``^hDlnQHPIh3y{-1`$iG>$-ShIPtAGE!+xuss$o!g9{%4cd%CBGb z_4S`9%exWvt7mG>E;{=BhxgNnS9{rKb=NhmS)-BOyYWYU+PB~5#DwRZ|EZ>XBWWJf zZF!45lUVs!o1G6n2r#e^;ejxD;$C>Pb1pr}v&7=_$JMW&s4cYlRFWFAf%EK2#iw6a z&sZN{aO!gZLA|Q~HkWdOo{LO2*|^ZBg6GLj<-OIKCsq8N{GYu%o+Ex&YV!UZDpkmDySA+IdU)-DEIDJpc|v;6AN=!Qz5dIO+Pl;KU1h(dp#9Hl(t`We zNvy9E3fy*O94@_5wc@An?5l@ZGQU1AoIRuV;RDNvRowaub^3k7r{#P*Qhv&K*%f6y z?=m(v{rwA{X(z0#+dFIdK5^ALmYAr5=gY4~f8dRgeZ}t{!SP1Hdu9CbMWV}scTb(@ zR%~_RReraZ#^ihFpM*@BXLBM+mWMA#+_x<3+QA_4^s8Shk4)s+xk2{fDJzSU$B(|M zn0b8SDt$k*j_7yx6+IjL9-nzGDKCETuX|!Hx7-Qi9Pg-OTSLg-s65TY|lErYwGFqj4Bdkbr$LG?FeS?e;a$# z2x`dD=~{a)9?$l-oO(v!C`(~etO-13kRl1lj6ZnlZbq1(?tJy4I^AEFQg1X`7Cdd* z@V4Zywf?DV-#@;JS$nZ2_UCQix_f~?ccur<*|bAxd)`!`^jpcI_r>nK;h!Bg<@!{= ztv_W?9V(vuh2z)yv(~bE!#>~N%srL)dd|&DuTK@)cx^oy+i}0zfq{|4#cK==^-}!v;Qh8b?a*IGO1mizf$VhxT55Trle(ud^gDtvvee`ug|@ z(~3DZv6A(5ANsarRq3tXuMp-nspj&Phd(a$E!y~Lrzh9O|M%(-Hb*0|QHsr;B4q#hkZuFHT#cz~fTr z_y52CcRP#M1uZTuE=hskQPvhzQ0vAD1I)@td+?R=J^cHg|*RP0Nqi#^}`|D?9z`UP33Pg7St^_O1i ztfG9Wa;me)bg^`6*B+6B+gGiRaU_(YT^}>G?f**TE?Rx$r|#={ zM?PNepT}W$sJ!6MR@JQK=C#Z9E2NJ1JYL>%+H}X?+g_Iq=FOaU@x^kZ8#47$o)_-R zZfvSFu(0*rVmJTTg)2W=&t}Q>n;bOJ7v8M}zVC z`>A~vHx#Db`Ty}nV(cx+@5Xj|Oxv#?y2J7AgK^FhuMLw~&z*^$%Aa65<6*7lN98V| zBb;UzACx>hsMgHF|Ky*8$|Ez&Cs59y7}wDncGX^X0Ug^2-bh}v(|Ls{-6uxtBYR&he#usr8 zJC8=#=ASmYV*37O?49mu({6bEkMH9P<(~e%g@5MM-N$uL*RP$%v48q~wO*^PH0M=x>tpFCe`VSZ8dzBT`$K&2bj4NHPO{^=j`51LlOZa4*T*~lIN}$e!bj(@_hHT*C(!4$k@letgqi-bpB?_zeNjGJnJ&Dw%5LN zxj5tJJ(bq(5tTra52ifEj} z{`$P(n{D6LsYzM#`<1<(2#kW#M^C0-s(PCIe!*Xn=({F=_j(G2b+*6rl(GNIaqDE) z{P=fAz88P0p8VzO?#Jg@FZ^yU{PRV5Mf8!b1->R5n_zhx<^$6FOOER2^2QmH7BsKd RTMH_lJYD@<);T3K0RUH7MAZNQ diff --git a/cinema/gb/mooneye-gb/acceptance/rst_timing/test.gb b/cinema/gb/mooneye-gb/acceptance/rst_timing/test.gb index b77fd99f9de559f5fd9b3071976a2b8b065ebb0e..d056c24d3bfd30e6f3809dbd9047386b6745f118 100644 GIT binary patch delta 1142 zcmai!O=uHA6vt;%G}8Fd7%NK)b~Z?jh+;udf?c-xYRnWDs?dT56&s}}wlqD|)Vf=> zntmq7oC==mE!7^12gS0aWC;si^eE$@IhK)9w83_r-MCFsTe{4feZ%~J|F^rtTUoZr zvTgo4BYA(Uk-%0G7U`UVMGnXe1pKI$Mx3lWKQqi7pe2za>uW6uedTL*y#?S5PT&bV zj;HV>p25>Ng_Ha!p5hXE{u@7wCynGguj3gbDexchw2`c?aim?DkF?Znl`FEa$jdmy zH@Ct~ZdM0?jwNGz0W*#Kdx6*`r>txJNPCMqqYrvxgVBK)FxGUOi_n=Q7CqmCVf*}i(MKWFu?#`7S$EbY6H1JslFGMo6n}PISUNXAGyp!YomwTKu@*NT!sFvTrT=(C4sL>;4cd#OA)A21j`Cb z5Uvt*R0>quHB2^=UD3QqYerfR;y_yE1U+BT3uX^)cVc`Fo;g@^^ni5o(5WNM^%va2 zkai6{p%JGsOyeny5gKg0!29TZ#}EL!nZZ8n#|TGwCl>fWxLp}WM%8DzQoH9rshFX? zYs<6(dch5~aBQpgif!4xe9^6Pb+Qu#1%}v_BpN9+tu|d9>-%zAHGUERW|TBq&tKNM p(NCot4ZX`XxLpqRR~OCVZU_6jwq`EpW;d3!Hz=zvFt*N1e*up+&H(@b delta 1440 zcmY+EPiPZc7{%|MG;NxsZPHQS(8B9Y6p0AZB4`zyHf_@+W;D2cz%W|yqy+EB=T_u}c7 zp+>Wk2-z1Boi+^-$m!Q=Q5zihrGBRt!POhRS?k8td;R}f7p^`n9m);G8tcn+tNOvMt%v6bZ%;4W)ey)e?h16bJ!AvAwDrKh1 z`Ql+2O66x3Qolivu3#iu&Xme*GMzUv6U3>-?JKoj`*KaS`E;fjkIdCod%E6hADi*E z7?b~6*J57Am}K5UDVcogI|9TX^+{;>8>KQq=z_Sw8-mc# z?KeCZeyiX$Dp~N6OH-2#?rC6>0>6DFLueRR0nTg#W|z-Q3ctl1L?xLcC?%2)Jtgvd z=yOnT0;Q58^fX_Y8a8x5L(FfuE_SpUW>Lw8d6crjy#&lh=qU!Fi()Gux*d=`KJumT zTgbPl5NYz?+!|`hgsGiG%!-pyy4nGMM^3mwQfQ5MtmA*C&g%| zqxZ}=!o$k5j%R~ON2O_lKf-p#(l7>pjrwWXw+r{nPg+ dWb~eIWj02i_KI$|d_9}h5e*uR3%Ul2e diff --git a/cinema/gb/mooneye-gb/acceptance/rst_timing/test.sym b/cinema/gb/mooneye-gb/acceptance/rst_timing/test.sym index 5c3762543..d261b286a 100644 --- a/cinema/gb/mooneye-gb/acceptance/rst_timing/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/rst_timing/test.sym @@ -1,201 +1,134 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/rst_timing.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/rst_timing.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0151 _wait_ly_4 -00:0157 _wait_ly_5 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0151 main@wait_ly_5 +00:0157 main@wait_ly_6 00:0177 test_finish -00:01bb hiram_test -00:01be _wait_ly_6 -00:01c4 _wait_ly_7 -00:01d9 finish_round1 -00:01dc _wait_ly_8 -00:01e2 _wait_ly_9 -00:01f8 finish_round2 +00:01c0 hiram_test +00:01c3 hiram_test@wait_ly_7 +00:01c9 hiram_test@wait_ly_8 +00:01de finish_round1 +00:01e1 finish_round1@wait_ly_9 +00:01e7 finish_round1@wait_ly_10 +00:01fd finish_round2 + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000027 _sizeof_main +00000049 _sizeof_test_finish +0000001e _sizeof_hiram_test +0000001f _sizeof_finish_round1 diff --git a/cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCXmgb/test.sav b/cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCXmgb/test.sav deleted file mode 100644 index e69de29bb..000000000 diff --git a/cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCXmgb/test.sym b/cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCXmgb/test.sym deleted file mode 100644 index f266d3b95..000000000 --- a/cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCXmgb/test.sym +++ /dev/null @@ -1,198 +0,0 @@ -; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/serial/boot_sclk_align-dmgABCXmgb.gb". - -[labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 -01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:3828 _wait_ly_4 -00:382e _wait_ly_5 -00:3844 _print_results_halt_1 -00:3847 _test_failure_cb_0 -00:384f _print_sl_data55 -00:385e _print_sl_out55 -00:3861 test_finish diff --git a/cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCmgb/manifest.yml b/cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCmgb/manifest.yml new file mode 100644 index 000000000..a697ada66 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCmgb/manifest.yml @@ -0,0 +1 @@ +fail: true diff --git a/cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCXmgb/test.gb b/cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCmgb/test.gb similarity index 93% rename from cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCXmgb/test.gb rename to cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCmgb/test.gb index 4b71b5a29309a0cc3c87a5bf4f68ad24387145f4..9cca943b518a149b96f4889626db0e3910f2e88b 100644 GIT binary patch delta 1144 zcmaizO-vI(6vtr#pkHv4A(ll}kRd$Y5nX*Nx> z#je|`JTE?bUOnepYzHc)FLNKysmo%SC-J7q=)uNo+|n%s{k?(qP9e}0>P019eYrBS zKK~`TQi({MM92skCSzojOptLBBT=cCjEIr-bV_fM6iA4}G zCccA+GO@NS(mf4Oe0r%lV1Fl5yIQ2JXF9p!zY_?C{JlZM=5U{4Ez-!0`!w`f6NENH zf$px2*WSkPjJr6)Uh@Y-!tM4zr@sT~@m3nS35Xz|w9kE#!3c(G0ntH)j?B6b8bfU9 zqJWO_suPsLynF#DA#*fnqZv;K33@X&R~|yRt}m88m$CR6&l+u0jwWB zR=){0Ti_FgMt1`lm*~L`bJJ>Ib4y`Y%gkB*znQ}Utz`_}9D^@wP%TGoj-xK?undhk zhUU!%9nK1uY)Z}>)!3-OMh6zrq%O+v!_(TesPGHMm^p6f@RV?3U*6%pYRUd%hbo+B zTymdr3EzVVL-a%3hZun1owDSG=aySW{GT}S5+A{&Nh%_;^qVv!`Z25eU@lWI{az=W zG)QdmiwG`ZRbMDv%lFt)_S9LIE*{Z}P@T+Cdm@Sl7RndPFAQ~mI3M%X>;D6@lP0hLZ)epu?oYdhs7gkLZkB|Ec9z@Lf delta 1481 zcmZvbQD{?F7{|}KX`3`jo20k8ONI5^Y>bE?6+!PD#-?qW#9WOu!6H7W_^^kHFJo*} z-3_>x;Y*zl>(i)%F%Tro4!Z53T&$K}E*C+td$QzV^C1o?Osx%??mOSfJyb)4#B2SD?3ZXXwM8Pj>80673Bw8D7-XVmEZ7|7^(q=h6Ka`&wHyJ!F5S zciS{Xyv79;}{0702o&R57etOULr_H;u!= zJHzWi>+4@v29jz-+n9uEIvLSkac7ZrsvkwP=La2~R4HM#rOlj9T6B(J1>5;%qpax`f&PnJ+~CkZ##x+{yoQFy>ku;V$*AReiY$}Y_3qQWGBkRVrk%koo``=|gOZR=DTEl$5h8Dio? z+#)b%(No3={Yk9lOajbqpZTZo1(U9zlE}YMN+ds-hUjO^B5oNHHc=}hga(e{c6dSn z5~6;>F5$NmcB7IB21=RWo(80eo-#`4NwJh86+lLO0|8i+*GQph!CMojmD_KIrSOqw<1DHKN zGb#Kwa|o4W9ziLQeCP?$&xig30?wgS@`O(D%F-|)2nlgN;i_2CPPmRrCd{Ff3GO9e z{)V1n61pgs@}au`8S{~=!fzx0MukX=|L6WgEtxR2qsOZWGECQl-g?dnw@9iZ8PGPI zoIB+0G2J080&m2#!7fsYc01|VTq|rS%faQLq@&V|$&av$u?&pCU!z^L;#=cwOI0C6 vr58-A-8&+CEx&hkd+!gvKPFpm`Brv&>s{Z^%hpG}Wxn0&Y|Y;(4($IQ_UzWp diff --git a/cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCmgb/test.sym b/cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCmgb/test.sym new file mode 100644 index 000000000..5f6dfba31 --- /dev/null +++ b/cinema/gb/mooneye-gb/acceptance/serial/boot_sclk_align-dmgABCmgb/test.sym @@ -0,0 +1,123 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/serial/boot_sclk_align-dmgABCmgb.gb". + +[labels] +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:381b main@quit_inline_1 +00:3833 test_finish + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +000036e3 _sizeof_main diff --git a/cinema/gb/mooneye-gb/acceptance/timer/div_write/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/timer/div_write/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/acceptance/timer/div_write/test.gb b/cinema/gb/mooneye-gb/acceptance/timer/div_write/test.gb index 60f4ec3257fad5408d07ecb9454c315af46344a8..33adee403fdf80ca73f96bd1413386a96cb495aa 100644 GIT binary patch delta 314 zcmZo@U}|V!nh?m;#yFXgY3(FNKPH1slLHv#R6i@0G9Lcmes+n+*-IWFsl_D<{@x5? z3@1M;_9DbLzh@M*n^+LD$>9Tgy&=N`MplobPtR6)oK5pMJHtbfVa7>ChySPleQ^2L zukZ^R{&tq|uNA zgT&wU51bx2Kk$Cwm1!sVz`^d%1NX!0JwUeBoq$+)df&+hjCPF=nAY1e0D;2KlZpZj zf(#CfAJ`A?^r(F%|4!bfHUEOjNkxVRMh1oThYxvFY&;>QB+M=GJsilYQsS2Q!Nt7% Ugp$P1gJ(~B96h<2kx9cG0B0zR*8l(j delta 1450 zcma)*Ur19?9LLY^PTkyQIZUdAW{la4{}KmFPBRYR8PeoqQIgC1?Ht@=g;oJQ4fvna=+hw&*%F)XS;=h zR47Q(XQdUGnTN%DFf7^LnKRI#S%;F=$)vTL4&qsB9)giwvs@Y|-@!JyPGfugA@rKh35evzGY*hPervaqHRFZDin~f(@xqLjELl#!)yN6zFkG>l2h9#Eq zMRU1$HlNB2i%>WIC_;k&kQ#^wZ%+y5wVLxdneFP~|<_1^G#qM#vqPmn6}q!@y8d?`gr1nF~-SBS5XqpL6{Sxhjem=sJp^#cx~M}3hrEHWt#AXw#J z(1u#lu+M3D$^A;fJElaz7b-PHG?-(AiPCiYQXGMo-MJ{UhAoAUzG3aB|4td8KtXQ&4N@TdKYL#ri$ZAeD iR-L`?_yZ#P*s. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/div_write.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/div_write.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48af clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48b9 memcpy +01:48c2 memset +01:48d2 print_inline_string +01:4898 print_load_font +01:48a4 print_newline +01:48cb print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:0150 main 00:0150 test -00:0182 _wait_ly_4 -00:0188 _wait_ly_5 -00:019e _print_results_halt_1 -00:01a1 _test_ok_cb_0 -00:01a9 _print_sl_data55 -00:01b1 _print_sl_out55 -00:01b4 test_failure -00:01c8 _wait_ly_6 -00:01ce _wait_ly_7 -00:01e4 _print_results_halt_2 -00:01e7 _test_failure_cb_0 -00:01ef _print_sl_data56 -00:01fa _print_sl_out56 +00:0175 test@quit_inline_1 +00:0186 quit_failure +00:018d quit_failure@quit_inline_2 + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000000 _sizeof_test +00000036 _sizeof_main diff --git a/cinema/gb/mooneye-gb/acceptance/timer/rapid_toggle/test.gb b/cinema/gb/mooneye-gb/acceptance/timer/rapid_toggle/test.gb index 95522c15d70fd7b0f66b52d734893771579f6913..53145176bb3b9aebe568ad37af0fd17e2b004f39 100644 GIT binary patch delta 1094 zcmZo@U}|V!nh?k|fpPLj#QJS_y6-O928HPJ4qjy1_Iy_SD3~Y{|~*mH6rvOY%T^H-~ltB-T%V`LIwc+4-Bkoutp!4#y0;C{e(1v^c^nn z76wO}BQSEMfUznK=D9(6!oonOK@>QlC~!t7sE4U=K~dp~PytimfuaDI5x_Qr?Kla{ z0E|byjy^qW<$YGo`)rE0BEyW6iVpuz|NG$buV3L8kemP};q0pA3hHdke600i9CEyB zqIyaW6=yxYD}lHQh^v9P28e5cSVGjn&Iw4PAqNJDzv~}3J#c>D{lLpk@PUKfp9k)T ztGz+C)}4S@czWN-2aI-&517{5G5~?X&y&yi|8ZF`9b-Rcpmb7Eph1wq)q(K?`{91? z+Gq0bFQ}YUWN2VyP*{I>hWFRg=4T_kKOT$b U`3WV7p9jw_^genLn4^PC0N>57hyVZp delta 1447 zcmZvcQD{?F7{||d(>7@m+s4~WsFI! zyMg&4zPS0YK8-RMgFy+KgR(u8%Zk#=Pa{IBM{7rN?RNXdJ?KyUHn9=3F8sPaoX{i2 z>p5J_CnClh;jHp*eP_gYIp)M!6&SCrZD!-F1xt)p*zMQr|83V@b!zp=`c%D8Kb(ry zCsJ?g*|mY(mMN>b4@_zOZ_F68;c8Ay8ZKqB`En&wDl?Cp;yo_z&5*s49D^FwMAGGQ zrc}unXH`)$KfjXv7z^Ppl|(C}=Uc-3l&6xdpvR`a@GSV94PZ4T7qABos)aJ00lW-s}dJS;S+^OUt$dJ_142trD zgPb+NE;hsVAITU(;f(a-oDCWy7JNyvyI4SiF#wlIhPZq&w}8w=^0XNSKgzv=$&lIW zGyjynWWqWrh5VbOLW+}V$a>B#=9V#Gle9L;AaIz*5eWfIi24aTq~A%{O-dz*16>yCPROn20X;4k9&NDnJU zd!1DOQY$>J-3s0sO*lHFO>u-hoTsr3@iW>172lfaSh|iOI-E1DPVJ. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/rapid_toggle.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/rapid_toggle.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:0150 test -00:0186 _wait_ly_4 -00:018c _wait_ly_5 -00:01a2 _print_results_halt_1 -00:01a5 _test_failure_cb_0 -00:01ad _print_sl_data55 -00:01bb _print_sl_out55 -00:01be test_finish +00:0179 test@quit_inline_1 +00:0190 test_finish + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000000 _sizeof_test +00000040 _sizeof_main diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tim00/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/timer/tim00/baseline_0000.png index 4776438956f1106f4ee1cf646921c699f7f1e237..1ee21b2aed704f04063ac8a58c940925d991869a 100644 GIT binary patch delta 1012 zcmV_mZKmL1#wUQ|Cil|>@ps0T7_oP-c-FzGSRlR z1VvDnbzKYS^5@eDz+4b44uZu&us8@72f^YXSe#cWWm%T`J)~K@EDO!+B)r~#s*jzU zKKJI7HPr4`b8qNaZY%zmv#jgd+L}k%+x_4@aZAq?i=`pbUw>{**hv*CKPC9IByIos zp3?l)#I$mExyPl~8C&t;RX>^A+TUKg((iM$ayqg9lbI?-dBRdWa-pSD~I0Un6sKjlr8RHj@-IvE{^3a)pdZT1A@-uII(U0v(}l{n|<(r^psPCt2?`tX%IB-m#tcI9wz@t^89ll5572i&TAdA?chKj-EXbj4n94}8qbqoNIbs~?~EgLXn(M|+T-oZ@+;>o*EaW|wEj*Ry^>WPa>dT1Z(Q`VNZJn0 zMyhuCEi#Uau0d{vYGtxpTt}YHf!6PD&OqvN1LM#RlRyL(f9FSV!hX$c`8<*HYtgOC ztx@;tI2VKi@BWL5_Bi(a?Z?rL*N4M7^Dgc89o5fQ2F10e-^MRb=!gF`eoAm_#Ddw| z)B3+tsha!H+IVl0AHn~++XS7CY8o5fg|@6#Xi1vUY=9Q^4=sf z)c95le{WKmljl4>`QD_{AR*PmyeG=nAZhKEobOF4aSv~p`rf4SgojKdJ;_?v_4o|< zgyhe&vjqG1-F7@L+6;B;{(nDDGk%^t=aDomh$3kf4N)Li90ZGlU~v#E4uZu&us8@7 ilYj&rlU@Wm7W@S_^|CQ*Or=)<0000lR(T7+iO*;c*G#3;5@ zKyESH^Z87m%g?6+fVCi490ZGlU~v#E4uZu&usDyD(zb2;>%3c>Z*RSI=tf^U(m{tkClzr8Gi~~zs z{qgjqe`nq$xSBymmR+q9_fJyK{zeIIiM*8leRwyr%9~%6JRkeBGC!o}EIk1%N?(je z{-P`&)mkyn#8xBgP?(HEs@S!08RymX?*sQOap(t=Py`l#^Elt7f!D}>nNB&FJa!gi za(X7I>ga6P0l{&>F6=|fJ@e25xTMoF_Z)Vzaxg6W!aA?Em2qAr&z`a9kF%AOAwCYX zRdkif>oit_OeS^d-BtiGMYb4eWWBC%XL$ZKKlV`XjV1WUwBirNl6!Ff)mE2b7^{eU z>5S8eC;l>jlAxbE@PdA@I3rcGZ~bXhaq~Ae-*r6I<-q&@G3&y?d$89cWTU$^-_-J5 zEL~mc7r%8qSVeEYv`SuQBGpxS$;rp*$jPP8kiDijrrort1pB&KhgZGrmDCD8*~l{b zk+13@O;prnl`s)$ox}R@nBDi0vf?-dn9LHex{)=15N9fC=KcSeg*fP)1H7OgERJ$N z*l|8M)#CJ;w_b{JKREg2`09DBU&<_@8a7~u+av-(IR<4oq%;BdA#&1HWu@8A=0(iT2Ujn9zJHniq|MU*84By~l-ZH2^d%#9RmRpue-}af!O;lSFTX^@bUoW_mTo^Oso=yC(|&<_>|!QvoT90ZGlU~v#E4uZu&us8@7=RH(u4;hwk zmD^k6f~|Ee#sr)(#8^GA@kPJ*qlrs78H+xDtT8+NzmD+G6zvnRJDF)&cgHAS9orqZf_|_#2o?vE zH3U3lQGPcmPs-~%pT3W;T^Hw4qWo@BHL3Yr^UCzqajxT&zngTLh)ea*dZ=}Z6z4i3 z{%%t8dup#8Nt`&>5wwx@E#K&kALn2Rw!d^c@Vw}1QuEIRu-k)i;#^12u)vF;RWx{k ilRX4ZlS~8}7V{5A00Svehnx2R0000$qyadHFSZpj>W~PMJ1W}d2nebkE-n&LJ++nsl_DP+&Oitf2|g%m5^;6c|1<`hV!!slju$6=b2J0)vP|y(p074^k_^4P+@m0K;i- zutqnS#s>cnov0eI>w`E4WOFds04JCM&Hf*Huo+N~VRJNCqcconlmCZqY#Pz^A#6?t z8{h&npw<6FA8rHck^Gzu*60e;*y8`87q>=)K7`H1U;{j02DJNsm_Wz?p#On^RSnkY z1Jl^%|Dm6dMv%V41>VBoNOJ^6t`smp6)q?$ToEc@ z3OrC0_#i7d2~7TsN4<_dJ!|ECR?Yitink)ejFXBE|4;w>;PS6u;TMpc04Cw=s^tpm zY|MPD^a5e&GGU z%TDltgWaD8?uVqQgG>O8jh#aP delta 1361 zcmY+DO=uHA9K~lg%}0~8O}e!%E!asENfAnlVCz?!G)a>*Ya>ap2M4VpL~*`W=|GVkr1-}~>7Ef$4h zQFu84g|mYz7h%6J;84G9z56{_Z~KfCGAe)Rl)C){t#ykS;eC+>DQ3v14Rf>X?-u@19i9v=qlXM z?`>9N^@pg2ua8hoU(-tE(Q>q$E{})2<#6b4IkE0Z8po2x>7>y}`_O_>O#1M?`u=T& zX9{xLEbZ2A$C0+=?i@dJZNbWPcj8hrO2!ngn%9mjKDaRLIl7J zyKx4A8dNhir}{eJ#ZY*S`91`?q&@}SqSBg4V}j&?52$n?_5petGZ&~Qi~;zR?Ilcr znXM-C4f7cjZc@dOpQz+WaxxW`M@RvB4ma#kEsO$a8K;j!8Z5ZMZ8r2WzuC}F6>k`( zk~ip=F;b?U5C!lO+e(lEM!HPo4eTrU=$gz~8sp44Dmjx({e*$YQD4OkFQ^n^0Isqd zq``_C+RcXd%x@NarivH*AX1TdgFcO!AWa@$hy&=PD+^(^U}l@i^fSN73{u6JBUExE z89K}IWayi?;0l#O62NJ)QY6}7#|<8{;Xd2ZY?!BtH!M=g8}u2>d__G$25^mSB}3aV zvcp7vWPTI*l`4u<$bar9)trf^)_k6#7ldKeZd4PRvkn3+ev7oLCG?R$d5wBu-n7P=mMG#95nh*-W_FZk6*C(> hn0;*eF&=$xTJeL?x2B)u(Jj-G_eZtH%Ce>B. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tim00.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tim00.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:0150 test + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000000 _sizeof_test diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tim00_div_trigger/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/timer/tim00_div_trigger/baseline_0000.png index 4776438956f1106f4ee1cf646921c699f7f1e237..1ee21b2aed704f04063ac8a58c940925d991869a 100644 GIT binary patch delta 1012 zcmV_mZKmL1#wUQ|Cil|>@ps0T7_oP-c-FzGSRlR z1VvDnbzKYS^5@eDz+4b44uZu&us8@72f^YXSe#cWWm%T`J)~K@EDO!+B)r~#s*jzU zKKJI7HPr4`b8qNaZY%zmv#jgd+L}k%+x_4@aZAq?i=`pbUw>{**hv*CKPC9IByIos zp3?l)#I$mExyPl~8C&t;RX>^A+TUKg((iM$ayqg9lbI?-dBRdWa-pSD~I0Un6sKjlr8RHj@-IvE{^3a)pdZT1A@-uII(U0v(}l{n|<(r^psPCt2?`tX%IB-m#tcI9wz@t^89ll5572i&TAdA?chKj-EXbj4n94}8qbqoNIbs~?~EgLXn(M|+T-oZ@+;>o*EaW|wEj*Ry^>WPa>dT1Z(Q`VNZJn0 zMyhuCEi#Uau0d{vYGtxpTt}YHf!6PD&OqvN1LM#RlRyL(f9FSV!hX$c`8<*HYtgOC ztx@;tI2VKi@BWL5_Bi(a?Z?rL*N4M7^Dgc89o5fQ2F10e-^MRb=!gF`eoAm_#Ddw| z)B3+tsha!H+IVl0AHn~++XS7CY8o5fg|@6#Xi1vUY=9Q^4=sf z)c95le{WKmljl4>`QD_{AR*PmyeG=nAZhKEobOF4aSv~p`rf4SgojKdJ;_?v_4o|< zgyhe&vjqG1-F7@L+6;B;{(nDDGk%^t=aDomh$3kf4N)Li90ZGlU~v#E4uZu&us8@7 ilYj&rlU@Wm7W@S_^|CQ*Or=)<0000lR(T7+iO*;c*G#3;5@ zKyESH^Z87m%g?6+fVCi490ZGlU~v#E4uZu&usDyD(zb2;>%3c>Z*RSI=tf^U(m{tkClzr8Gi~~zs z{qgjqe`nq$xSBymmR+q9_fJyK{zeIIiM*8leRwyr%9~%6JRkeBGC!o}EIk1%N?(je z{-P`&)mkyn#8xBgP?(HEs@S!08RymX?*sQOap(t=Py`l#^Elt7f!D}>nNB&FJa!gi za(X7I>ga6P0l{&>F6=|fJ@e25xTMoF_Z)Vzaxg6W!aA?Em2qAr&z`a9kF%AOAwCYX zRdkif>oit_OeS^d-BtiGMYb4eWWBC%XL$ZKKlV`XjV1WUwBirNl6!Ff)mE2b7^{eU z>5S8eC;l>jlAxbE@PdA@I3rcGZ~bXhaq~Ae-*r6I<-q&@G3&y?d$89cWTU$^-_-J5 zEL~mc7r%8qSVeEYv`SuQBGpxS$;rp*$jPP8kiDijrrort1pB&KhgZGrmDCD8*~l{b zk+13@O;prnl`s)$ox}R@nBDi0vf?-dn9LHex{)=15N9fC=KcSeg*fP)1H7OgERJ$N z*l|8M)#CJ;w_b{JKREg2`09DBU&<_@8a7~u+av-(IR<4oq%;BdA#&1HWu@8A=0(iT2Ujn9zJHniq|MU*84By~l-ZH2^d%#9RmRpue-}af!O;lSFTX^@bUoW_mTo^Oso=yC(|&<_>|!QvoT90ZGlU~v#E4uZu&us8@7=RH(u4;hwk zmD^k6f~|Ee#sr)(#8^GA@kPJ*qlrs78H+xDtT8+NzmD+G6zvnRJDF)&cgHAS9orqZf_|_#2o?vE zH3U3lQGPcmPs-~%pT3W;T^Hw4qWo@BHL3Yr^UCzqajxT&zngTLh)ea*dZ=}Z6z4i3 z{%%t8dup#8Nt`&>5wwx@E#K&kALn2Rw!d^c@Vw}1QuEIRu-k)i;#^12u)vF;RWx{k ilRX4ZlS~8}7V{5A00Svehnx2R000069Mny8+VL&aH7?@A!90^({Qt^wj&AeInyuyX>^Xvl#<;_vzgP7jJXE}hC~0*A zdXZl2$)2Qm5d?{Cg`$VDSS($ZMG&edB?s*xN(oe{4VpL~*`W=|GVkr1-}~>7EtP~) zNq98@g~;y8CFp|#4)y!i``>38&9dL2-to7q&;gA7WVo%`sbWXp4qK}obhWd7F}1QJ zWQXTHJfe_o)%xs>6SC1);?Oy>)UTpk!mCf^})tvl4!;2EdeeC=SApG~zBK@&z;&P0NWm(5hbbUbS1Dt%@p{PGRGLg}SIt*1OfI zqR}hQ;9np9iFL0!9PA=nwtbBr^aDesukYJb!L*aGi`w{4odKSx1MnH!OPByN z+fC+M<})VTq>3XyQ^}F!WU4HWkOK5PZrG<<7zNNWP9KLfSa5^eZ0KixtKk$?ykUq+ z-k@K>NSS&<48Y55D?thv=`xWwv9I8xYcXeOj5Ft`N@Wt5gap0H?`Hk!XV*H+am32W&^HVV)}9ut+6u&}T67HT47;z%{m&3~j^6 zE))5Q`7Pu(swh$+|G8bNITKH<`8_2sh`^fNs3kRL0|eUw7HLmQ>LKH_tcN5Qej|2# zHjs6. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tim00_div_trigger.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tim00_div_trigger.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:0150 test + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000000 _sizeof_test diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tim01/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/timer/tim01/baseline_0000.png index 2edb1ad917967098e3b6d7101c32ac33e89f8613..4c3588c0f922ee20105b6fa27a35e5ec6f525bae 100644 GIT binary patch delta 1026 zcmV+d1pWKD39Si`B!6^CL_t(|ob8>_cB3#11Lv5y-TSLQgOYy&)X`biO+T6=tZwJfFB|T>>rh>@&a({Eel~f_~*MbjQ()!J1 zPIIb>Y31s2_e;+oEX9XUer2xf`uf_m{yKXrhcnkFnW@s0H+HJiGg;ywSR4e4gJ5wGEDnOjL9jTDCpyxqpwyXx z8ONnWy*W?blYeR@pWsD~cEK)~rJ+i>@G2v&UocY*d&;)4i(bA@shV`M#8fG4crpD_ zntCS4l3T{y5C`SoPj44((zz`=uB^jy=b0dmJ<9#G2=@BI>+0mbVz`dq5c~!z`Nv_% zKKT5%EtQttuLCqWfAv8rpZHgj1l{hy3&z3XH131*>wiJx;5@1Sf|KRNpzFQw*_HIr zxDPIkS+7z#Na;Ves*J7MqE+I%EMf%h?(y4CKxyJb>yN4@V7Ix@A%YOme~a3?Koy7f4Mj)Ox{$#Y)uP<96d9S7fYkQF4)p~P)B-~!`daasg#y1vc>jsBzD zO5~o89|l|>>iaIpk%-qt=SdGGWn<>!SZ^LgZ$drT{Ms(#%Ny3$`E4kyze9S@WF>1g zy=7gT%=5i=6XW2M^w+1KBItF|>33E3pQ_v}t|8CLj<#NJjzH*k1N|@#lR*R)f9Fqd zz`AC%eBQ|Mx#-gAR;@BZ_O_Byup_LG;an(tRWJC&bzlwY5@D6TaBI(~XX z9sV}{T5#!#1+&^ydcV@Cn%mG^cy3ZXLjB*(Mo_9&eF;C$F08D$(j_(K`<3;$mg*Qb4Z7^r_+P#QPSk_tVH}gN116JS1R8%%l;i7{sM}825|vIY?N$DduyNlHZRv41I1= zdc%)Q1U<-Fo_mZ~reMPZiz|I6M7?=W4^gwm!O4|~6iBT!i-TZs5G)RY#X+z*2o~qDEX%sC+yCXXxP0E)w3|j>I%K!= zw$&=ciqjA2<~&}1%1SINs9IU&KGpqqPg;jqg;?ix4sk-dIe+V}#aJ!)QuS5$aSlA% zYLBO-{5$j4f~yteRN2)oaeF7V?C-Q-OXQ{U@5A39>v-|2Qr2U8RhEaeoTVjzN#%?2 zDE~ROk7}=2R-!e?+BGKUkScy}e2nvI`S*eAmN?9V#X+z*2o?vy;viTY1dD@UaS$vH zg2j29?_v;jXMew1j(@B2Qpw}x`0*sqaP$ifVY{X5By>mefFbqXl6y{@tnBQfU$4hX z-8ANN%1W7(1zLZxwzd@VifyC%MogQ<8ttO148E5GE6b0hG0wmq<^A*sj(Wjm*3Vfg zl(S_lZv1(eat&^Owbn9>kU`cdjd41wn({9rN&3EnD1Vp-i_>`x-X2ey2XC7O%a2{h zQ(X?cJl<~1u>|*KaO27Q0>;8H0Zc@10+E|D+j|}l)4a={_X_b)Q z?lP$b$GVwERKFcn)C@j3$SPayvAcV1>h7qIUBW=5b$08+bI#X$+REw3;!+d*;2^6b z&c(h7lYg@jC%tk&6wHIgNjeYCmJeQL#yORY^Wbdx;AMWC^O({_56*+F{A*t%Z_YsKb_3%u50l{n z7k}?orGLxtxas)3bzjh0*Wx7LoLh|5^E!+4^50FI%E`TGYZFTJY=!WSzoESlxl2 zrD(p#M!Z!`EvZ}xP!@IC1R@sBKjw-LFBz|_Hvj+t07*qoM6N<$f}F(^TL1t6 diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tim01/test.gb b/cinema/gb/mooneye-gb/acceptance/timer/tim01/test.gb index 1e639181190cc33eca9a85aff46185e1e7b47638..674a53b2590583351b1a27b1dd3ed3bcc79fc340 100644 GIT binary patch delta 1051 zcmZo@U}|V!+Th2?KdCzt`v{vUd<8BmX5b2M0^GfZQX|A%gD8qxJ3Y)%Fn z-~uzC)&D~uZUgF({G1Ke=nB)=;{Tx+w?>3Mgw4fZ13X{`wEKUUK*#`~|AB#34c6!b z)7a+!p`VaOkiNqO-ooHWa|A}N6fjn$!8|u8Pgoe}G>8Hx6a~%*1@$l$E+{Ho5h`E` zJWv$)AS*ZtO#X~Vy^cOTYvp}b&HHSMw<5!glZp=iPyhSi@~>av7m%C)CgJR=`2TTPFdbt*W}tLZQJ_JP z!PSBB1N-5A@7ibb@8oS-^Dn5JRAgviWKdXtc!u}a)8=O*ygwd}@UGZ+LP|-PTjF~- dkX5C`E%AekdHD$?iJu40F7!Tn5}2QZOaQzAoo)aC delta 1360 zcmY+DO=uHA9K~lg&3D=+-CEZc>?Ddrgc=cS6-<++X_97bBncMuP{f0WiWd7|JxTE*2okkI(L-4*mM+U87OE#D2kjwB38>TtO`MPH(1v80_x8>2{ddR~i$bv| zJRgI?zVi>x!c?C_{kHz@_py4TfLr=QoF!xx54fdY{hA*XAwZ?&?SvoH;XI(LNJGE9 zS{<(6Lp6N8k81joRw@sbW94*tH0&!!!hg$&WpC0rm^4l%jYis!=8R&}kN4GgZYw-d zkjG|evvxW5w;tNl7XZ>fA5h^;((uTVD;rOwa`|{R2Mi>W?*O^h9O`1QAC_pw9nIz9 z*?cN9#zVnWVKKND2jLoxc=GXF9*sm(a(ozQ6`y*m(xFaQM3qdZu<^iLO;pEg9qL5E z=#r=KuN(iwnom6)Y$sbbdh4C&JBCVM=u_Z9OXGNw33wt!X0;#$^jL5Z#;Fvd0A|>Y zQwY?cnyI zvn)@BzJ?1fQYj<>oFpqnq78Q3;58fWupP~YS*m!$Je9mbpTf*n)DvU?m)KS^v<)NM zP2@-BH<4edqDY1O=YCSnnRsf=?=AX31Xk@vHKDocAlMSHNLyM$4;e>fJtVpD8?o7I z0~wD~3%AeLT?4|3eI*poL>QIH5!w)n;xWi;)C2RTHPW<15toSYimWuVLp-aP+1T#v gL(?DT(Wj;r-yMBx`bi#LH!XQ*RBJ4(!S3V#0sMlXlK=n! diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tim01/test.sym b/cinema/gb/mooneye-gb/acceptance/timer/tim01/test.sym index f01524dea..519428678 100644 --- a/cinema/gb/mooneye-gb/acceptance/timer/tim01/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/timer/tim01/test.sym @@ -1,192 +1,122 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tim01.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tim01.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:0150 test + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000000 _sizeof_test diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tim01_div_trigger/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/timer/tim01_div_trigger/baseline_0000.png index dbccb8a19f673f1e89f131f15a7fd420e2943e08..57d864d4080674687b9ef643375433522d0f23a2 100644 GIT binary patch delta 1001 zcmV_mZKmL1#wUQ|CikdXBZDctI#CvP1VaJnWQC@ zpwJkXbzKwa^6%3HfVm)890ZGlU~v#E4uZu&usE-j(y}c1xy!J4Sr&%ZL3nL{vX8<| zpZn@NbEx9K)xDu(yRGb#2#I(fVzUR!-k+|EpS5nsUKw|Db*Ofi+zAB ztQbd)zWCqF=>ATN3C`>MEj4H{Pl5I)4l`NeAXpp(i-TZs5G)RY#X+z*of92tmrxok zK{Yj$ACJT@=6}h(LLC!jgTbfLFW7}@YACf+hj*E=e&LwDJiaFmoyD@h*u`(#s<;^~ z_)3!FZYV>197en7D&ybtJuUdU-S{F~^qgdE-!OAMC0wxo?6YcZ;}PYbatyxyZCk13 z_hhTCuRdt?_VHJe1l{kz3&z3X^mNg_>!^(`Zv4RJ+ke$pSBvJyG5f;KW3bm*t})!| zK6g6?ug33)X2f^d#0)yS=;fEw)y{U1)&f5lAJv(Yj&iml#J8I!wcw{L=Fh_S|_W$dl|qx>1ivDQ-H~A0kcoCI?9<2J#&5>vk?b9a)1|% zgT;wE4u2j$d2!4KSIZN>e@>Cd!7g~koSnCx$CNJGYaBe1s>*Tl3HhXQ8uI}Wn37F$ z9A8c?Nu0d(JR**Rz4FaoJR@nXOjfE@(^Kl= zVmY5{H^m$W2V^`y{V9U3i%!2)IX>52Y_6l6#(|b`Fnk!slaT`#fBXp!nAeO}o+olX z7u}j}^}1Ham=N||o%x-UvSq%#sP0znS6??iyR`3jlpkMN6xVwHK7M*a9{z3owcyr@ zg=)6vbd}+e>OQnK?we#su%8w?!PHfo@%g!Tp;2+IB{lY?97pz2eaha5Uw!>+oASvq z_|^e9PMIW4EApPFFyb$^1<>j4wGO6Fq6Ln3zMJ&1!O16eUnn-lE9H`ihO^* zc3wHB66L;0)llQL=2hvl%Q=rv-Z$wqh)ee{?-%8Bkg#@B*!w1V{dmLd`zFQzk%^!u zSwZfYbV~ekM!9cNHPo%^|Lt;C#00000NkvXXu0mjfZafT( delta 981 zcmV;`11kKU38o26G2U z+h469R-S%J7w7)`Q5RxeK+VFck7*vid(t|^3SwQ?ImJoo;$qx(HO8vJFBM<&80W;J zt^Ry^;$NA+8r&=(r^sGy61R6!&+$$TwnV-Z|2q72vW_>uCUrUX7iE1)&sBO7SQKB3 zd;Q>8Kboy#U5HjEYgd_^Q=0g#@iEU=<6j5vTjDSdlaK=zf9HOFh(XlM{xOa}Px)%( z@KDX!*|ZaaFjFCzl|j6 z`wpUD94yXAe-jE=$q{JrbJ zCi?b^Rr5N7GI=nMKw6q%{rpm?Wj;I_+%%`8Am>whceMnADe`U zOxx`Chv(dnJyKT!rvQsv16Fsk2J$S2mU;UC6XYV99Dy;P`TBCVAGa*O74?9JSsY z#aFERS`60UsPX0M^;Ewf^eyYwGkn?m5nhFHusDNzvYdwl(I$JjPUM->PXpd6VlNa( z(tXh-Mc>?gGauPrwEyOvA77TYbX)r0Luvh;GCPx1TE+A&Wzm`E_u4Hv$H57iU!VRI zN%uvU-=dtK>)u^%AW!E;%QzT54C9kO1Q&n)rYij@!{eWh&s+0?*1j2M0nV9XY+l#- zpkMyk#HF0fMIZOV`M+C*=pTHX<8>B^Pjl!w{yO|`qOE<%597-&tmmyo;??_yt<9HK zp4VaDL?5vhe45WYHF$LevM#ZD<7RSxin|YaE1J&d9p13R`FM$eJjFP<2M;vS^)VOC zXgxKl-Uv{KI&E@yB59(p*zdR$jDwRf1VCQN^1VrQsHo3;#{T=-b$Ko&%l9TVL(P|3 zRH3iVa~+@j-lWqYAgi{aC(m^x?PPt+CwlYendN(vnxW?Z zFM!`4%#-IjlBNYwByFN03X@R;HHzc*VL?JCPGbc5L;pF=84;}G9EeZ+@ zr=2x4L7EwWgp~rrherPoT{|^+&bERqR8(LPk*F61viw16CAfhs1qfg`?G4uG2GiK! z|Dh9ABX)fd=YVVu1{>f6Goac3Lk~6s>M?AN25WSNX>9WU(2Y$ax;})>$zTIqU`7QQ(B4z!{;S9;U(tMTILu1x$eliUJ>G z1t)I(Whsvyw9q6pH1;rWSDVM(c%B;e;-`_^(*`Wk`urroL#kCL7k16kF{Qm zLylKXR8PsF;;g54B@kBuaWxRv0C6o4ONctyIRR-jV01|U%QdGZJXE}hC~0*A zdXZi%9_&eq7eSDy6^b6p+G6RlEP_xyDLH5lQA$9iHfZ8}WQR5+%e=R5e(%3SwpbL3 zMdA546pju(I0w)4JJfF*?|vVzH%dN-dc)VMLI*H*5+P@$UB!;R8FE$H=xS^AY;y4} z91hKS>@UMryK?izdXHapN!t^6Rq(r{Kg3x^R`H-q`Zb{WKoJ5|THQ(bKpidsx(YY+ z+w0X>{T`~}>wQ$ym$g!Pq#P}$%VQyLIUM?1PON&8#-XHfDrq#*J~VF>lRmt!zI$8Y ziGtiVOS`q(aiHz+zJ5QD{&|54XOo6omYmsmB9+U>vpHZOnS2MywdPQl0t2u_GpOprYAE|m_%K0r@n<~;R;Q2-yay@Uxc zv(;q2VLoHRb*eb>6O|lEPNu^02q{3%;f5Wmg%JQPWAt%Ig9SIZ&4ym)Hye&n#Ty2x zGb)7`fJ^KK zX|UpkcC+C<^P2^qsp17ch*Turpif~YNR!7G;s847%0ieenAv7B{mgGNgH&@blZncqZyrHUdI@}K)jHD}_fHJ_*G1z}jV8`Xs7tb;&{-y&^m2|Z{Wll7qF!f(V@ zpABT(ty-vKq3#?M*6eFRzb3+nOpefoPy~-bUZY-^H?7g8C5pI2gjZyxnH}L-#mq+c hW*?e. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tim01_div_trigger.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tim01_div_trigger.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:0150 test + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000000 _sizeof_test diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tim10/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/timer/tim10/baseline_0000.png index 4776438956f1106f4ee1cf646921c699f7f1e237..1ee21b2aed704f04063ac8a58c940925d991869a 100644 GIT binary patch delta 1012 zcmV_mZKmL1#wUQ|Cil|>@ps0T7_oP-c-FzGSRlR z1VvDnbzKYS^5@eDz+4b44uZu&us8@72f^YXSe#cWWm%T`J)~K@EDO!+B)r~#s*jzU zKKJI7HPr4`b8qNaZY%zmv#jgd+L}k%+x_4@aZAq?i=`pbUw>{**hv*CKPC9IByIos zp3?l)#I$mExyPl~8C&t;RX>^A+TUKg((iM$ayqg9lbI?-dBRdWa-pSD~I0Un6sKjlr8RHj@-IvE{^3a)pdZT1A@-uII(U0v(}l{n|<(r^psPCt2?`tX%IB-m#tcI9wz@t^89ll5572i&TAdA?chKj-EXbj4n94}8qbqoNIbs~?~EgLXn(M|+T-oZ@+;>o*EaW|wEj*Ry^>WPa>dT1Z(Q`VNZJn0 zMyhuCEi#Uau0d{vYGtxpTt}YHf!6PD&OqvN1LM#RlRyL(f9FSV!hX$c`8<*HYtgOC ztx@;tI2VKi@BWL5_Bi(a?Z?rL*N4M7^Dgc89o5fQ2F10e-^MRb=!gF`eoAm_#Ddw| z)B3+tsha!H+IVl0AHn~++XS7CY8o5fg|@6#Xi1vUY=9Q^4=sf z)c95le{WKmljl4>`QD_{AR*PmyeG=nAZhKEobOF4aSv~p`rf4SgojKdJ;_?v_4o|< zgyhe&vjqG1-F7@L+6;B;{(nDDGk%^t=aDomh$3kf4N)Li90ZGlU~v#E4uZu&us8@7 ilYj&rlU@Wm7W@S_^|CQ*Or=)<0000lR(T7+iO*;c*G#3;5@ zKyESH^Z87m%g?6+fVCi490ZGlU~v#E4uZu&usDyD(zb2;>%3c>Z*RSI=tf^U(m{tkClzr8Gi~~zs z{qgjqe`nq$xSBymmR+q9_fJyK{zeIIiM*8leRwyr%9~%6JRkeBGC!o}EIk1%N?(je z{-P`&)mkyn#8xBgP?(HEs@S!08RymX?*sQOap(t=Py`l#^Elt7f!D}>nNB&FJa!gi za(X7I>ga6P0l{&>F6=|fJ@e25xTMoF_Z)Vzaxg6W!aA?Em2qAr&z`a9kF%AOAwCYX zRdkif>oit_OeS^d-BtiGMYb4eWWBC%XL$ZKKlV`XjV1WUwBirNl6!Ff)mE2b7^{eU z>5S8eC;l>jlAxbE@PdA@I3rcGZ~bXhaq~Ae-*r6I<-q&@G3&y?d$89cWTU$^-_-J5 zEL~mc7r%8qSVeEYv`SuQBGpxS$;rp*$jPP8kiDijrrort1pB&KhgZGrmDCD8*~l{b zk+13@O;prnl`s)$ox}R@nBDi0vf?-dn9LHex{)=15N9fC=KcSeg*fP)1H7OgERJ$N z*l|8M)#CJ;w_b{JKREg2`09DBU&<_@8a7~u+av-(IR<4oq%;BdA#&1HWu@8A=0(iT2Ujn9zJHniq|MU*84By~l-ZH2^d%#9RmRpue-}af!O;lSFTX^@bUoW_mTo^Oso=yC(|&<_>|!QvoT90ZGlU~v#E4uZu&us8@7=RH(u4;hwk zmD^k6f~|Ee#sr)(#8^GA@kPJ*qlrs78H+xDtT8+NzmD+G6zvnRJDF)&cgHAS9orqZf_|_#2o?vE zH3U3lQGPcmPs-~%pT3W;T^Hw4qWo@BHL3Yr^UCzqajxT&zngTLh)ea*dZ=}Z6z4i3 z{%%t8dup#8Nt`&>5wwx@E#K&kALn2Rw!d^c@Vw}1QuEIRu-k)i;#^12u)vF;RWx{k ilRX4ZlS~8}7V{5A00Svehnx2R0000f4GoaP~LmzGf>XH1M4c6!i)7awwp%=GCgg%7L#b5(GUMy?bvR;9r_Hz-e780a*J0w)v&&IkqdFcmH+DqImN zUKxc!;F)P4*yU8`{44gU*Q*!oB$@_?5gDo z>TJw>to33Xa=dDydP)uzXFa_ufw&5YtAV%%h--mZLe#;|2}q+M2L_41>mN8haDL$Z zz{^hXfrH(j2kwWfy+O9toq$+)df&+hjCPF=nAY1e0D;2Klh647aak}OV?Sn~bW%~E zL6E`Kf$;JXE}hC~0*A zdXZi%9_&eq7eSDy6^b6pVzG2t7O_x0DLH5lQA$9iHfZAf$qsEumU(aA{NA@iwp0>I zCE@uv6#9G*&cXPAUH!K4?)ULVv+TF4H~bwcv;$)&8E&g~so2ps!`5miU2UzLO)Y+a z$HH?S_sdAlrrdn7<_m~UX?p^%iUFtehd9f~Djsx7zXmlwC_#YAD?3R)Xut(PSCOWE zd#x64+(UJIy^repvR1B)RAQA(Wi0HiM8bb7$rVq^IFvF@rHp3AkLHb1%8&Ooc5f>_ zQIM)UTpk!mCf^})t=rY5;2EcpwKMulm8gUg8`2re^rsYH&XjQLztJfP#O z(dd<@@y~~UV%@8r3A)La&HhFY`i`N}7y1-<(DDSHWD=fClUXeY0X-HRh6yT#D1cdZ z<1_+wsAlU9^>xsTq3|;E{Rs3({R+HJr8S$u1jz&MQfWu*1N01L&Qnhq1@JN3OPByN zJ51&q<})T-qlzOxQOS|yWU4HWkOK5PZrGt(7y-~SMjwYXSa5^OZ0KWttKkS$ykUq+ z-k@K=NSS&<48ZejD?thv=`@j7v9I8xYcXeNj5BAczDQA=u$1_-tVEYh}?)I-KmSr180{6=i` zw}Y&!LkqhX8jc}h)wUW6Xd;Zt_gL!^XOC4O6-lkHT@KiZkU$5JE}Do*P-vke~X-;O#lD@ diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tim10/test.sym b/cinema/gb/mooneye-gb/acceptance/timer/tim10/test.sym index bcb8a2318..68a19ff09 100644 --- a/cinema/gb/mooneye-gb/acceptance/timer/tim10/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/timer/tim10/test.sym @@ -1,192 +1,122 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tim10.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tim10.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:0150 test + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000000 _sizeof_test diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tim10_div_trigger/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/timer/tim10_div_trigger/baseline_0000.png index 5452e96cc5d06376380b0992801c3fa3299f3364..02a54c8140d190d082ceda4689c2b122753c1fb0 100644 GIT binary patch delta 1002 zcmV_J4A7!bYl)`IO+(lC=Hj z`Xm@XD`>+uGhN4uZu&us8@72f^YXSR4e4)7jCHHUmn7 z85HBV3{mg;$$v*uHS!5Q$k8v@h2qeVWB2Eb`3uEV!*L1z`c{O5GGvmK;1!Oz9V?rf+#&sv1|cGIL1{FI4&UiG$Ds2P0o zB+F<=zN?2cP*ESNgn>-UWVKf>1Gtl(vf|hUn9LF|`y{I)&vdAn^Xr&}IOvfByr3N{ zPQ-Tb@qb{}J>)eWWEYKg@HJ}f;85eiY5utNJia;DaBK%}w_X04%S?=sldK!^oW~Tw zgR6S12ERKV+!!HdfsWV?j@F=j#JF#bpzYv$CfxQ9F_G$|JA3p#m#)IXd9g}YaGm}mP4Qx)7=O(4fC4nQ?6#3r1 zc3z%SiSpc}VyN-0=KkEIG$+q_OsS$>uFQAYYW5x3!|MzJgJ|H?TRIkhZ-5n)IspL^f5H9Ah% z0p%xldp@5Dbou#o0~GZImdH!-@5A3sR(bKOl9ywDQRavAoTVp$Me)UW z@EX~##<7PgFGZe@ zW9JimhGSf?3;U4rq6uA>I6ZUEVJ9mG)3V=K=euncoL9{|Z3gTx&&~&TMu=IVBld%% zbtu1L-nT{2e(-x1-37^WDPQ(^gsadG7H4oxmhtC6v{r=q$TNqZ2HY}yPvl6%bJgswL*5B-yo0~de(hAQnL!}6taduv>-Sb6+B=tHyv8K)X%0R6--rKA^!EGUoU-avYd~vzYm#{1 zzNm=H%jj!kDnS13xLNzGWrei>7nCLI0k^l&2WTQ;d^q z@IW0Co$phP)>D)6g#dY|(Jk#ptP4pe_J8lL2laT{1lS~8?WTO1vq&$?@cRqa| zU%M{Pr9}C^N!3vErRG)WtMgpPk|x^adwedXW<1n7Mapv>5&v&e@_TBpok^TL*Aet4 z>s!9j8$Zv%8f<^*cHnu@)ll=#1+ec2f4GoaP~LmzGf>XH1M4c6!i)7awwp%=GCgg%7L#b5(GUMy?bvR;9r_Hz-e780a*J0w)v&&IkqdFcmH+DqImN zUKxc!;F)P4*yU8`{44gU*Q*!oB$@_?5gDo z>TJw>to33Xa=dDydP)uzXFa_ufw&5YtAV%%h--mZLe#;|2}q+M2L_41>mN8haDL$Z zz{^hXfrH(j2kwWfy+O9toq$+)df&+hjCPF=nAY1e0D;2Klh647aak}OV?Sn~bW%~E zL6E`Kf$;JXE}hC~0*A zdXZi%9_&eq7eSDy6^b6pVzG2t7O_x0DLH5lQA$9iHfZ8}WQR5+%e=R5e(%3SwpbL3 zMdA546nfBub5I^|Y2P;9{XSN2lmag8Mxa%LE@18?Blb$Wh8<%w;;6LI)z->cdGP~0 z8kzHXUPh}<_2!GU-k|7_wkPna5cEiYh_j6B;sKBJYfuk>A_SS)| z*Q)XQJygTj`>19t>!tEYd9<7^pNaU((a7I&a>XZ`2W9i5Y&OyXG;bE=0Nz*My{+&> zMP7%k-QMlm-*#xC|Q_qDH1u*?3^SCTbJ4PHnPa zb}Q5P*NcB*&99vfb&xHa{q-*N9Ydur^eOP5r3pOABs`HKv)T{>#%O35Ca4r*0A|>Y zQwY?cmZ`b5*C9WK!pqDLAkZcCtMEFN_DmWRBpr3fL>rvA!DltxVLO@)b5!w$1uA)iF^!q8s3#}@F0-vG7hy~xN9aH(hQ}bUQ6J1()>zXLMO-4nD~j68j_|B%Wk>gB gA6kB#N1s|&VsG@V<;y&}VOh%VsNPsyhrP%D1EE5oQ2+n{ diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tim10_div_trigger/test.sym b/cinema/gb/mooneye-gb/acceptance/timer/tim10_div_trigger/test.sym index a981747b1..48211883c 100644 --- a/cinema/gb/mooneye-gb/acceptance/timer/tim10_div_trigger/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/timer/tim10_div_trigger/test.sym @@ -1,192 +1,122 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tim10_div_trigger.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tim10_div_trigger.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:0150 test + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000000 _sizeof_test diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tim11/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/timer/tim11/baseline_0000.png index 4776438956f1106f4ee1cf646921c699f7f1e237..1ee21b2aed704f04063ac8a58c940925d991869a 100644 GIT binary patch delta 1012 zcmV_mZKmL1#wUQ|Cil|>@ps0T7_oP-c-FzGSRlR z1VvDnbzKYS^5@eDz+4b44uZu&us8@72f^YXSe#cWWm%T`J)~K@EDO!+B)r~#s*jzU zKKJI7HPr4`b8qNaZY%zmv#jgd+L}k%+x_4@aZAq?i=`pbUw>{**hv*CKPC9IByIos zp3?l)#I$mExyPl~8C&t;RX>^A+TUKg((iM$ayqg9lbI?-dBRdWa-pSD~I0Un6sKjlr8RHj@-IvE{^3a)pdZT1A@-uII(U0v(}l{n|<(r^psPCt2?`tX%IB-m#tcI9wz@t^89ll5572i&TAdA?chKj-EXbj4n94}8qbqoNIbs~?~EgLXn(M|+T-oZ@+;>o*EaW|wEj*Ry^>WPa>dT1Z(Q`VNZJn0 zMyhuCEi#Uau0d{vYGtxpTt}YHf!6PD&OqvN1LM#RlRyL(f9FSV!hX$c`8<*HYtgOC ztx@;tI2VKi@BWL5_Bi(a?Z?rL*N4M7^Dgc89o5fQ2F10e-^MRb=!gF`eoAm_#Ddw| z)B3+tsha!H+IVl0AHn~++XS7CY8o5fg|@6#Xi1vUY=9Q^4=sf z)c95le{WKmljl4>`QD_{AR*PmyeG=nAZhKEobOF4aSv~p`rf4SgojKdJ;_?v_4o|< zgyhe&vjqG1-F7@L+6;B;{(nDDGk%^t=aDomh$3kf4N)Li90ZGlU~v#E4uZu&us8@7 ilYj&rlU@Wm7W@S_^|CQ*Or=)<0000lR(T7+iO*;c*G#3;5@ zKyESH^Z87m%g?6+fVCi490ZGlU~v#E4uZu&usDyD(zb2;>%3c>Z*RSI=tf^U(m{tkClzr8Gi~~zs z{qgjqe`nq$xSBymmR+q9_fJyK{zeIIiM*8leRwyr%9~%6JRkeBGC!o}EIk1%N?(je z{-P`&)mkyn#8xBgP?(HEs@S!08RymX?*sQOap(t=Py`l#^Elt7f!D}>nNB&FJa!gi za(X7I>ga6P0l{&>F6=|fJ@e25xTMoF_Z)Vzaxg6W!aA?Em2qAr&z`a9kF%AOAwCYX zRdkif>oit_OeS^d-BtiGMYb4eWWBC%XL$ZKKlV`XjV1WUwBirNl6!Ff)mE2b7^{eU z>5S8eC;l>jlAxbE@PdA@I3rcGZ~bXhaq~Ae-*r6I<-q&@G3&y?d$89cWTU$^-_-J5 zEL~mc7r%8qSVeEYv`SuQBGpxS$;rp*$jPP8kiDijrrort1pB&KhgZGrmDCD8*~l{b zk+13@O;prnl`s)$ox}R@nBDi0vf?-dn9LHex{)=15N9fC=KcSeg*fP)1H7OgERJ$N z*l|8M)#CJ;w_b{JKREg2`09DBU&<_@8a7~u+av-(IR<4oq%;BdA#&1HWu@8A=0(iT2Ujn9zJHniq|MU*84By~l-ZH2^d%#9RmRpue-}af!O;lSFTX^@bUoW_mTo^Oso=yC(|&<_>|!QvoT90ZGlU~v#E4uZu&us8@7=RH(u4;hwk zmD^k6f~|Ee#sr)(#8^GA@kPJ*qlrs78H+xDtT8+NzmD+G6zvnRJDF)&cgHAS9orqZf_|_#2o?vE zH3U3lQGPcmPs-~%pT3W;T^Hw4qWo@BHL3Yr^UCzqajxT&zngTLh)ea*dZ=}Z6z4i3 z{%%t8dup#8Nt`&>5wwx@E#K&kALn2Rw!d^c@Vw}1QuEIRu-k)i;#^12u)vF;RWx{k ilRX4ZlS~8}7V{5A00Svehnx2R0000Iejt5;2Iv?~r=zh@mp!dOq2mN*| z5Bd~4{-1tk$NHcb#CZ2v@q_!}4PKiKna()I$9A3C;c=mKROi;Gi>N;32F;L=VWRogX$AbLYmi%S&J5;JpBQy5OJ5C6~+ z57eTdz;N1GLldN#0Z3RWFnnnA|IoElgXe53$U;R01`&yRQ6S47q*j6($Wnj+hST0) zjczcF4gMcGQ8i-M2XPL_=3uY^PA~(S{Xg_zGoT*B=4h}+XPCw&{}0{RG@|Q6*qjVD zzy)SNtN({S+y>Mm`8gY`(G{k##s5PuZjA_i2%C$+26(^>X!rjxfsg?}{{sW78m!R= zrm@ZcLq8#nAbp1myoJG$<_L^jDPXKhgL!UHp0F^`X%GcYC<>er3hH4hTu@ZFB2>T> zc%UfoK~``QnEV-!dL4aw*2?>=n)lfhZ$*X~Clww3pZ@p3`6)kO7_94gLwdRGE*6%bbgaSagH0Qr%s}a+qCkTn zgR2AM2lm7L-nGx<-^tsw=3h`bsmRd4$e^(P@C@&-r_Ikscz-+`;a#!ugp`snx5W2w eAgfA=TjB>7^YRl)5_IL`;^lG?0_&;RL;0{m1{LP0t@CI1pkuq7@ArPs=li>d-9kYq z6ogmfP*_=dbOAo^v#Z~>-v92e)r(%cddu6QLOU?_;=!hJn~EKMJ7_Jp($&t|`NU$s zusJm6cDxByY|8D|8{Iz9DeX?+Ro>^6{t#ysS;eDH>DPef1qBFDacwW|1vR(;=qgm# z?`~A0wFjt*uMbgGU)74Gky50TDvbp_rBLv1DZb`T7{?OE*@RI~dC|O4NOm0-mdOGG$>cjou2s9b>>q$dnsJ7+ z*;po*Opo)BKbc?lAI3rWfks@pST=`7!$~<71zOpo-YIveGi6aF(Qm+DUQfW=6FhO#|`&8Ny`v5(Kne)^WMge@v_7Wz* z%odaRmidecH>l#sPgHUwIhiucBcuR5iyQW+7DfQHjM2v-4Hn$sG8=lB-)J~N6>k`% zk~ip=FjA(T5CQNa+e(lEMmkO8b?htn=o-u!8sp4aDmjx({e*$YQD4CgFR2uw04}o| zq``_C+RTPc<~IsHQ^gB@5UEJKL7&1*kRp#S!~k^Am4z^yFtgQU`k3Ef2B_l9VJbP2 z44q+lGV~2xaG6RW0pJu_DH3h4;Rd(aaF6Y1G|W-O8y2YK4f-@@E>TaA0bFHU$hfShuYQe3}TuGC9I#gu-|X@*4HPoN0|VEK$TIBD^LmjqC`|DrPov hF#Fi_qdfY;v|HqG6p+*1z diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tim11/test.sym b/cinema/gb/mooneye-gb/acceptance/timer/tim11/test.sym index b9e6628d6..f4ad71f39 100644 --- a/cinema/gb/mooneye-gb/acceptance/timer/tim11/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/timer/tim11/test.sym @@ -1,192 +1,122 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tim11.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tim11.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:0150 test + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000000 _sizeof_test diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tim11_div_trigger/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/timer/tim11_div_trigger/baseline_0000.png index 4776438956f1106f4ee1cf646921c699f7f1e237..1ee21b2aed704f04063ac8a58c940925d991869a 100644 GIT binary patch delta 1012 zcmV_mZKmL1#wUQ|Cil|>@ps0T7_oP-c-FzGSRlR z1VvDnbzKYS^5@eDz+4b44uZu&us8@72f^YXSe#cWWm%T`J)~K@EDO!+B)r~#s*jzU zKKJI7HPr4`b8qNaZY%zmv#jgd+L}k%+x_4@aZAq?i=`pbUw>{**hv*CKPC9IByIos zp3?l)#I$mExyPl~8C&t;RX>^A+TUKg((iM$ayqg9lbI?-dBRdWa-pSD~I0Un6sKjlr8RHj@-IvE{^3a)pdZT1A@-uII(U0v(}l{n|<(r^psPCt2?`tX%IB-m#tcI9wz@t^89ll5572i&TAdA?chKj-EXbj4n94}8qbqoNIbs~?~EgLXn(M|+T-oZ@+;>o*EaW|wEj*Ry^>WPa>dT1Z(Q`VNZJn0 zMyhuCEi#Uau0d{vYGtxpTt}YHf!6PD&OqvN1LM#RlRyL(f9FSV!hX$c`8<*HYtgOC ztx@;tI2VKi@BWL5_Bi(a?Z?rL*N4M7^Dgc89o5fQ2F10e-^MRb=!gF`eoAm_#Ddw| z)B3+tsha!H+IVl0AHn~++XS7CY8o5fg|@6#Xi1vUY=9Q^4=sf z)c95le{WKmljl4>`QD_{AR*PmyeG=nAZhKEobOF4aSv~p`rf4SgojKdJ;_?v_4o|< zgyhe&vjqG1-F7@L+6;B;{(nDDGk%^t=aDomh$3kf4N)Li90ZGlU~v#E4uZu&us8@7 ilYj&rlU@Wm7W@S_^|CQ*Or=)<0000lR(T7+iO*;c*G#3;5@ zKyESH^Z87m%g?6+fVCi490ZGlU~v#E4uZu&usDyD(zb2;>%3c>Z*RSI=tf^U(m{tkClzr8Gi~~zs z{qgjqe`nq$xSBymmR+q9_fJyK{zeIIiM*8leRwyr%9~%6JRkeBGC!o}EIk1%N?(je z{-P`&)mkyn#8xBgP?(HEs@S!08RymX?*sQOap(t=Py`l#^Elt7f!D}>nNB&FJa!gi za(X7I>ga6P0l{&>F6=|fJ@e25xTMoF_Z)Vzaxg6W!aA?Em2qAr&z`a9kF%AOAwCYX zRdkif>oit_OeS^d-BtiGMYb4eWWBC%XL$ZKKlV`XjV1WUwBirNl6!Ff)mE2b7^{eU z>5S8eC;l>jlAxbE@PdA@I3rcGZ~bXhaq~Ae-*r6I<-q&@G3&y?d$89cWTU$^-_-J5 zEL~mc7r%8qSVeEYv`SuQBGpxS$;rp*$jPP8kiDijrrort1pB&KhgZGrmDCD8*~l{b zk+13@O;prnl`s)$ox}R@nBDi0vf?-dn9LHex{)=15N9fC=KcSeg*fP)1H7OgERJ$N z*l|8M)#CJ;w_b{JKREg2`09DBU&<_@8a7~u+av-(IR<4oq%;BdA#&1HWu@8A=0(iT2Ujn9zJHniq|MU*84By~l-ZH2^d%#9RmRpue-}af!O;lSFTX^@bUoW_mTo^Oso=yC(|&<_>|!QvoT90ZGlU~v#E4uZu&us8@7=RH(u4;hwk zmD^k6f~|Ee#sr)(#8^GA@kPJ*qlrs78H+xDtT8+NzmD+G6zvnRJDF)&cgHAS9orqZf_|_#2o?vE zH3U3lQGPcmPs-~%pT3W;T^Hw4qWo@BHL3Yr^UCzqajxT&zngTLh)ea*dZ=}Z6z4i3 z{%%t8dup#8Nt`&>5wwx@E#K&kALn2Rw!d^c@Vw}1QuEIRu-k)i;#^12u)vF;RWx{k ilRX4ZlS~8}7V{5A00Svehnx2R0000^Tf9~%8XbnVpOIok@dP*H(FM5104$npoNmEZ=l6d-`%v^Q9z z8%$$^|A$Ugjo9@;oCC5s7;JzO%z$S94?WlnsK>B58m!S7rm@NYLpL^!==u;gCxZ=e zff>;1|Dg}J0rg0J&IW6Ag=uW@|ImwDBSIg-=3=k`9xwyi{Xa|~WB}0rz`&{oYxIF> zZ1exnPe>z3-{AspVQ{250wY%n7^~7?o*R@WEDUrSM1d2E0%wGRdYB3q6cw%r6)*)J zC<=U#6`Ta7e#WC-N1vXx@;rOx{JiYJa14g^X2Tbd28Gu0H=gDXM|F|rej+a* z>cIGc{cyi`?KAmz@;0sc7gSCvGBhwUD6Bs`!~5%L^Rp4&9}h=(S8O~Xr6kNP@jV>K cs#4;X_`$`z{DhLk&x2*Ya>ap2f-p9JXE}hC~0*A zdXZi%9_&eq7eSDy6^b6pVzG2t7D1?-CFHX=?(n3Vx^bhd9f~D(-VizXmlQC_;crE87VlsKW(7SK)?! zbFCVy-$6Bey^Cu4vQ{dOl%wTzc`W2DheLnMi4{-M*q=0xCyhqhhvto9(ueoecWx^@ zQjn|F(qZkf?`=QOJ>Un@KQB<>Y|?Pak|P^Wq;mOqHU|tOlkX6@*6iw1U=WsQ#u>@w z;@NyEGtNVSRADKw2M6Ih8gb?0xjY(;q~v%EXcez|qtdC)R790br?BzBd`(m*YMtt2 z!RV2v@vj&E#F|$<8E}&=8~ybz^c6#;PxLA9prr{s$s|0MBC}c$0(vws4C7P^5dbsn z#t8&!P|egF>dSx^L*Yf{`w-}o`W1MUN^2&K36clirqYhs2k2?coTr{J3gAPwmoNcl zwwcUV%x6rvMiobXppqlW$y8V#AqD6;+^|ixFan@uj6M!&u;2!l+0e)QX2U_Mc*78t zyg@&Ukuvp!D1c|!R)Q2T(rF?uV_(5X*JRGn7-!B>$(dy82Mk1x`T}lvLZuJ`aEaX@ z4OZOHVK%&FezV{sRlMLEk&46{^eM~)Y4Z3&96$$MSqQTQGuut3pZQH@kSfj`rjjGc z&{>uzLtnuK=cyEu08WvWBGCpLZt$25x7dzm!yHw-VS!5Cpig7w3+f3nfXi$v8M+lC z-6rxq^P9-eR8gct{&PR6=1e@b=JOQ2APlQEqngkhbr5LrTcj;5p$CmavL2M2_>I`? zZv`1wn-+2})Ez^@s%4Aii6Sl$;U!sVW=D8dF|*O# h+54s+. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tim11_div_trigger.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tim11_div_trigger.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:0150 test + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000000 _sizeof_test diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tima_reload/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/timer/tima_reload/baseline_0000.png index de789038832165a046527f6478d88f36fc3d2761..14bd6f36cab4239ed85d3a9c54cd44888448e88e 100644 GIT binary patch delta 1062 zcmV+>1ljxC3C#(RB!84iL_t(|ob8?4maHHQMD?ux|6k@j^bF%d5)l#!W$l;gQ9DGd zxx}FCDW#3z@^7{S#1{$-4h05>0)s<=!J)w5P+)LA+qUidp8q!qi}!tJcpZe#_fOWN z(56rO>XF%0vA6nb=qOjR|8n+}l5{oCVjq78--9K2T2$NwA%FF9v%`w3B=c8;FKg0q zY{g$ zg(^y~(P#h7jQ-wPV}kR!KBNX~%qp<{fx|ml;80+2C@?q_7#s==4h05>0)x|eqhmWH zlm;ziid5BkyMLAaK~v{M*`RS(`UN&Yx-M4N%VYk+IemFPCJvo$=_l5Bwn`qly1m0m z-A=nIck|Y97;U1f49@+yWuedhtx}c{QldxTrBB$9V|F#{MR4hZ$IsS$9-vf8; zpZGILg8uG^6^w(y>Fk5^=g4vJ(Nu6h{pjq2rBI>UPJiR}TT}zqKD14edxth4{$^mnOP>$h!a1xV^&@#ZIGr>47}uLA^M*WRv2=mnQk( zrQsm!nr4<-8@7oK8V6gUj|bcRl=8mJ2b0OLi3VrpoU8}pV8iz5U2(7#t7K``je|!A zS<>FS^Now+pLs<@dp@`rIiE#M!uz16GkPa$tBD;a4(=-*2@bNZd1D-`6X$I8@fzb` zvOH{}la2%!fB6&GWEP_>(fnDF>wD3+GI||z;*}f1R!<2VT3e1Xwb?jZqq<%B?k=x) zls~sjic=odtv+fNC+#tdzZzU^5ASAClty(tPp<#?j`lD8d=Ecs7b+J{nvzo8u3X2X zs5ZU}_N&`pTa_>R;9DJVy1(90w$^fRhy9m#z#H?y1Mn~olW_zue`n_Vq6=%)sgQ$n zsSKy=xcceGc;=y% zRs0+w=pZYll*Znno*r2@Y1~h5W-e`4SbKhu6~|9Mg1SYl2--vwE0E)0tM^V9*4ApG zk>lXaVcn$7$4@^df3KUQ8!>4fls6Z|@zamV>n2H91s=L5as2cn=pZY8eEB85pOe>3 zs=jxj*lQ98SMA5~(~qET5i5c=(Zq@#fr~C@um?I1bgk|o+jfn9e!4Pw-K16G%T@e5 zGkM)4ZzB&B5n0`B`npLH%m-T$bdVK4zWfs3&&lg1JsAg|4vUE6ryoJxB31-#qKOrg gfdoa9uLKws0d`7~*w#n(ApigX07*qoM6N<$g7k43VgLXD delta 1071 zcmV+~1kn4<3ET;gB!8nxL_t(|ob8>_ma8BPMd_^m|1bAGbgsh!5+f!Ok7vJ3YcWL5 zfW)A_KA%q^xcsbkfW$(9!J)w5P+)KJy|(XlSX^(Herm$#L%TGE zw_hbAlApRu59j^;Q#WGWK*PqW%M8mm8>L+&BT~J}E{aPJ=U>(I7^w#zYQA9^WyfAE zyFV8DPv)-&4;x5nvZF)d_Mc=auk>I^$V2v@!`~#UKlu%*+tJ>X^)8lLEDi+O2jg9T z>HEiURID3Onq)PdN!ewHJ{tFa9<~1*c-{hsag%Ta8GrBnA_C{H>|64_XR7eBQ`AeR z$uk`D0=uxA_YJat2utocZL)IGE&afZM?07IJ>;Zr$F7PcHJ(%BvqSU{`*E)A!FF}? z3n?)p@U0KnkveOcwh=DU@yF$ z`XJ?fnGYt5;SdeZ$~9RR#KDf^)3f4WFYc11xo;eNc9JFidUU;UQ~sJKs@U_v&CIzM z^&>yuX)R~3WR;QFdE(%?+L7QSYo8~^!8&=4R-dmi4kovULo_%P7#s==4h05>0)s<= z!IOXl34ec=D)oG4|5Lx+lHb*{6k7r1663I5B|m*lVk#{=*P^9cY^Be;*`ZuWQ z1TTNi%I8Hl)()+Qoi^@h>K1Eq7e6mrZ=+D-dHf7za){Q~IlHW1bd;pX4^5r6FIAL{ z#qUj$xMqp#UHm*l(n;3&mCVD1-0tLGalP`@c8#^`Cs}#?j3cRA#EYauH1PsC4%VMz zIBo4-Lo{+6Tms&kRAT&$WAS^FbR#aq!|;E8{ zZtd0{cl9)Ho$fHa2ogFLO2CUAm~eH81jaew$;BpM5kMUgRw{Y(f( znq2mtg{xiBXm~6Z8F{#Q*%yp2dyiDv>)~jOyL&tGAUuq;+#pTf0)*pG!S6k7zzBv8 z4$(=8&b;&P*QbnzJco|5vKy3Scv%N1uDYQDHo+bXR3tiG4>sniw_|i3Favy6z%z-a z8wJS!b-rnWehYjm(NrUFJ6G#`#|-GU0;VK7w{w8J<(coBV88;OOLTT;u*TIoN6mns z74TA`+1&!*`Qc?HOt8-aUr02w8)$IqD0Z2P)&+~(0;_u5ob~*hxm<8-RfDh2;IA2E z%h6ru2-F;wAy{YV+iK9@4`K45{F>f@^){>zV;;?Gya?Yr?Jj4yUod9PaZ|?^xKn%W z2lvRw_MJG;=5F_hfa~desCr zx;|O0HY~i?2qR1qTkbM~joZ+Qhsw>DY%5JG=R6vJSaG6&$j~M=gC~lurPj`=k&h=e z9w`jsa_T%@FI?1z@K<#RkH1-M@wgo9k3mpzkAwZ$Y+qRQup1xrS2(Z1@7#akFMI^E Ah5!Hn delta 1401 zcmY+DPiPZC6vk&ZwoQ|?O}bi_3U)S%Lhm zh!;KClN2w4AWLH30{M(=#-@M5V8j|IG-@fD3|@IL<4m!dSgcHfo(%eN2*C z2UcIei(>Tyye_P~#r@eiJ@9V#^=S8lq2)I7{QafgxEj`ePCzvo4{N`;v%p%^4Pouu zfUT1$0@~C%()!}-L)tv>qQXQ_2RP)t+$yjwL`Ma7~jAq@9 zS$AjFZRB+};g3>Z&zS@3xLix;@4e{CeT1)??P5L>C|V*ypWgp8%@8#ixKpD-*EE z5xOJCcMUK`oRP#{nntOl2rY;kyBMict56SFj}kF}(&NI{8Ck9Mne;5mmO>r~T9jT! z8D!!^oIEgR&{M_;y(MNjlK`{bXFe9bVA3U268RdXMDmlViGIdR;uIla1+_9vXkZ^c z4o?U`Lc~v4C;Vo@W>hj^5T#6T4g=CaPZ=TfkQn7i1(0DMc^Z5Zj;_g^#x}{kic&K9 z);9%+AN4UvxQkL5C3Ifg;0Y~|(CH^U7k)F~4JsM%nM+fX3C>Ail01KWB~54us{m)N z0%nKLj0?ZX>_;V;dr?XxUwT~h^QF%~z)_S+me7;DGBr$SgM_G`a7j!w6Rx9@39~3= zf-?oohv+E=p$lS^FWm~rE+6?y_)X+{RERYBf9@-4$%L(KJz9>DA-de=E@$kJM-r>z z0qv)qar)gYhSRTw;f?sx*GdYJc01WM>xBlDXKl~=. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tima_reload.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tima_reload.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:0150 test + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000000 _sizeof_test diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tima_write_reloading/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/timer/tima_write_reloading/baseline_0000.png index f4dff77b838ddecdfa524f5f1b15b7be4273cf4e..d31d54414294918ad581d7f1b9ee7036b13408f9 100644 GIT binary patch literal 1176 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|QIEr;B4q#hkZuFP1Gf;9*Vl z|M!3TP4-<=SfeGP`97sSTdM2XdnloK0_W#VI>IkLJ%7otK%Ya5{oo^o2pN{{=7d54 zopb54mQ~K%zCZTTqsn=n>zhAB*5}yq<-NM2et)NFX@%)d^N=;>*Z-ZKIX(4c?%B<6 z{?={SXSsa&kw;SmGuM}M-{256tE>Ky>VHc==KjnYQ_oAM?tYzjec#{Yb+tco_N#8+ zx_2+%-uusTo_;#}&HH4)%Tw%jzwP<@iWir=mT%;rz^;8PaPhjo=9hQvznt9kd1swB zSJfGf3;&Ni^qOXY=2X9@t$mr{0a-bT{+rqY_j0W-Q`=l4x#vWn{tns2_nvRvTXiPh zV!HnM_npqE5#QK%|IUm}lT?|#^|ogJ=e)aCd~2OcCW-A9)s={uX6-E{>6FqZb+Avq zVoh&pLVPUmZ^vCS&D{2HA4@N-`R16nrQd$C%8NSoxC!jt!IeDs>dMbF^9P&Nh6~!9 zs|%59E?((WYTbG|f1*#s>lae#;aPUu!s{~69N%_ZpXbx3dgUWGXY1MS_$b#At-Hm* zYmV-Tc`33*vp@a3om4V2^ya(=yL#%Xk57F3hO2Ue#U^KyH8wNZZ~N}NK6~%0Q_;as z4vN<-JojqT#r*->-yNTPwC#@TpU=DnZ|9zWs-j(afAhsUmR%fu!Re(d+1Hn>jsC9u z$n)C1bo;m<9#J<||7Qo|S8TrZym|4Jwb2q5B^rv41bF*wEY)9ge_pirRA0O5ugVSF zi=Rwid}QX5uPWN#UkUtts!_P@LX~Rvss4mkn;G$aLh0Q6^HX{!HTDQSm;6|H@mpoU z9E;zE1up`afbK<$7rv&WjvFlYH$AWHD`WQGQsMUGS5(P5rD-v7hU)irTzVb7uKu~} z&BuQ}9l9x{8sA?!??l}^_ww?fIfbk9K80;w_?kuU&$kCpDrU^SJ0m)eXVuBt7uWWb zRX@MIyV3^`|t_r-WWw#i!j zboarIkC*=bvIRyMIAueeh1IPHL1n#)fA0Ou+A7qJOuj$)>g*@t0pByUKK0n$l#4OC zdwF$w`&MgCZoP%EJ~t*-I){DuH1)Zf?&+e4Koci^{kIl%OZV5t``l=>%7}Q-`bL0P zo8R6%^Ofb7pLO#;FL3^H_&oo+x$#xGC7&Mr@0c8aD}2+VBRBii=g&@gFty^w#3P-X z?DE=T=3}{q16A=jvE^x%Y5bxipKPYO3Y$z0y2Ykza0- z`ICd|#eC#=#7{gsxH#du^oi!g3W-Ia2tas>c<b*0|QHgr;B4q#hkZuFIFv4;A!1@ zf6ssI^Koa^r8XYnNaSe$e7_`1P+w}>%5&R zsl)km#sAtLu_;r<_iMehxYcfS_h^wwH)HcJ_QzBI1)b|(74E|x7?qMb+4JVou6MoO z*7LvZ=iigpc-TTh2E(ly1{NX`bFSA4H~zE!{nYod_U(wgH}CJCzVhns%?;)(w^`r0 zd%cjWd;IiLzv_1xv&fqn)9RA^&tIFtpJx#C{&?PURa3d($8qAZOWp6b$%%Zad-Lj; zc+eu(gyX_-*&B>5tx3HhELp^BHt+2hM?@}65rtv?v&dSd(6^R^aZ-uzpOHFTH16^-9^)&6#G&g%Q?%vRre{Pbj-Q3~7b z^JVYOL>xUQmmnS)nX@@}W65KlYvTHU8P|1x->o~1FX?%J1bZ{{>qRHqXBKX_H??}- zP3`qHrAIA(wCO*IjAi@FUHQ83jE|Xz`Nzw5Pd`61FKSZhy@chL?EVSoJG1mnPA@&l zUN13gyPW$G*D$Ni%a@Bd&%AixjKvS`%CPC%?bfV*chEv&UWeW+3!}|yuenPv#$_JQ z;jWW;b4cssQ?0VFm$50H^|4C(Vt`JpdY>Y@iQU-95X@84-xSvA5VmnM%O1U`c=n?k zi)FZH`{@|)p`;*itUw~``S-A;Axg!+zx})YJXP2Kc`EOe=$@;OwIuic;GDnk&YkXQ zavP`G-M4EE&yBhFW@^_WU9*T=?+?d||F!&C{x#}#w z?-qG4VLJY*ES0T)p2H=@JzOT@PoH}%%eU-YztAu*e8cvfWi~F&a}(~wG)u>n+*)>P zwjt~6IuHHZyH4w7uQe~fXuZyQTT>w@<={wAScM-jd56x^i}jrEZ1~wWa&e(f*R|bU zF@?O=&ARzIpJ&}nylUIPy6u9#PsI5eM(u*F6RM8{HigHum+Aj~;d-%u&+2~{q9fd8 zujo8tUDK^5uU4Ob$?($GpZm^N28!GM{N3z+e0p5-Ig20mkB&_LHFu3gSzq$A?`oPA zta7_l3*X4NUvLfk^W&3qjkS7x{f2*k^8Qyde)*apV|`o@Xrya^xbGeZu^Znnov1M| z>S>;y(r!_a-6+XESvukIgU}0~d3%~qe!Ad_$mK|Jgq-;)5&q1s#!gTe~DWM4f^)WBp diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tima_write_reloading/test.gb b/cinema/gb/mooneye-gb/acceptance/timer/tima_write_reloading/test.gb index c91a236781e110f738ef8329cd9c758fdfb1afb9..feb8449cc4c14550092cf0185789099141caf269 100644 GIT binary patch delta 1071 zcmZo@U}|V!+Th2?bamO}0LH`a9si$RJ^Iy<;lcU`9S^!5bUx^L(EXtALGObJ5Blx? zJ?K{K_<#DIUBiPu5aXF${exZ*;~kLE4`TfLtoXtG@CL8ViA?itCkn7{a`?brFWB(^ zY=QUL72ZLq>6yhPsYS&MAU+UjdjZK09osc@fwGRp#i>OlnfZBeX(x}W?HWQ5y&YJbH<-o-{|}w08nNqxI0s~NFxUVmm;ufHA9}DEP>*4AG+3iE zOkc1L~3doDJ6K3e(u)|DhMRMua|u&Bb5?JYWX2 z`+t}~$N-@Kfq_*G*60J%*yjJCpO8k7zQYCH!r(}A1V*kDFjl3(JU1v$SQzLuhyo`R z1w7=4SgCK*e1LFtw!~Nd1&*b09+qC9iP&ui{(7?!`u>SB2@2{uL&qjEE sJRIR&vGIhIk}$W#_i!MqN{L(I2N(156G{?451w74<73?I6L`10wT7|}@ZJMN6jWod?JV^E6LGdD@)IS^0 zi}YggU{6{+CqJ)(f zR?|`9(iwtP|C)Veab?K8&T4SI!D{xrRjv$F1}nMBNFq|{PyDW=7s455OUBukan^EC zHtm!$QJ8c89hQi4c=cW}J|&1x8cpY@wJMEf9z4{M*Z~ zHNQC*-%HEb6HFEgsnKFKe@HgPvlDai4bVv6U`wc&DiqmpGOMSCh*gc4m#ZD-rK)Q3 z?F_LVnXakkSgpf6HsN&Y7va|hKeZMy`{M0<~!9EH|9X(}`&?91$BNadfJ>(hi4LG_w^Afg6<|InVucY?rtLaP>YplpK$}d%B$vAJuyqANu3{I6JtqOgTF=_Y0z1lQh)PfE sM!k1H_8MOA;Qzh1Jby^GKJcv6|E(`PKO. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tima_write_reloading.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tima_write_reloading.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:0150 test + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000000 _sizeof_test diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tma_write_reloading/baseline_0000.png b/cinema/gb/mooneye-gb/acceptance/timer/tma_write_reloading/baseline_0000.png index 8cd0a9fde5042520886d6b4d966dcaed98768bed..dfaf016cd62cd557ea1fb9235dee82a209b82c61 100644 GIT binary patch literal 1156 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|Seo@R34<3`=)&LZN`p zx%9|srLl* z+n^tF>2gw`X2+WK<}5LsqD=cue{4~cRe$H5_B`!m)XrV^O5Q${_kMatElx zvg+qvIrZ|;*T|azD^Cf|e?0v};mWV?R_J|YPDxo>bmfKi|Fd`Q-d|~W?&lo+NzGEm z+*j-icT7^{YdY$L?17hAzGAKDB=HiY<%Zq&-~rgGpMd+pzX?Vaa}ir*YxD)j5r{w>oq zU8cPdwE4;}cVc7t)wga2mTdR`Z#{gRaoV*@7QYsV^#7lz;`iNJg0*sk#oXf$KHMyp ztI;`CIj5{duGxE~Q@LgDW&Mf15x+Os-QK?Vd3ygTec#Uyrb*Zw$?Wyy{Wh8X``W#= zp4;P?H>pPk=3Ta{i{_aeIMwgdgT=|`3uigW>Gb6Y^IG?PdJr&c`@e+O7QU56{Oi6% z?0Cih&uLECju$y6?)mSjmnao7d7^S!&(GS2<^G+laPJp=NBrlM+0;yWx=q?NX_`gw zyfe-FH(Y)7yt(etmgGkl7P5XyD4ZuV`D?39MacGKGr6ZW6&%7(r+@yYcGvc#*4epA z``<{2|D9&Dl<0)m+-xvEYW$JX6(?O30 zNTON)pfq;x-2;zx=Sf=b7pq;le9hxqIZvBD+<5n^JZ?&_ywGKfsKrk|M!fuc{pDw` zb$nf`@2r}=_iE3*RrjUlr_Gn+qo?}!9h}a0;P%(=vaOe*#NKKAf6D%#^yl92yJ5dkQ?sQ0FHnki>*WmzBAa|o-q`%Sw`9eZhrai3Jh$|}j?3uDGf5|Kqp+nfljj+I)+*760~nM!KoWef9WrB(weUWS##%pZ5K?kguyR__mY# z;+@&YeGISGs1vtxvxo&Q{;ym&dPreo|?e!e^UC>gK%y&{x;#1&krJ3d^exK qe)!7;7f8m%b*0|QHvr;B4q#hkZuFHT#cz~fTt z_y52CZvJ;xYbHq;W;z9aPu-Q<;=wyn;!5f5ZLJSJUB1mA#Lddq&eZJOcyQr?2LTBM z8U_~gQzNgH+U}d4ShzFx*GmyM`&&;#e*6es<+3T*JhRB|_xw%5r}^=k>S=*xdsd}xKOXe|%%8poS?rpz->#_2{r8;q=@iGb zmYR_NHh=s!tyABxm1=)$_oh2XFLfPlSn%uMk16r%9xr|+dfIP_TIBMBOWp*zem@p& zJ^z|LzfFGQVG9WvE*?G%=ZZ+oIbSQ-_&xlaZsmP*--@f7S4{VtoNjT8wd|qUd+Ct> z$~rrrZ#j9&ZSxmqW4YYud*3Hctg+>|zDq zx2P5wtM0NG9a-Dk{fnP&*!$@81&bY(f6KN;T%Gs+3`@L_QPbxm2Xoin_Fi`ND?{0& z(yrWPu{w7xn!cX&o@DW(Y-5R#wR55j58s+@HS5kt4;F9B`S~Ej+WDmMA8AYc3Z?-NsHHn^d{G5fA|E5dJ0{wfEo==@u_(8nt z?9-L}k5}zB;A?9yG_bI}o>HsG_sz>X?5$&8bF75MJ{j}bU&KNt%YXW+CFfVZ`19{UfQ-27>(JD=LSE}8UH`DpQa3ZN#x}5S`w%x{%e2B{O2|+y59i}eDUMb z>dTVs|J~>P2--hsDlp!D?KfZ975-o$I1(rMZTfV4y7kYuZ~pvC`1|kf_w%e5o;O#% z=}}%8d8B)Z-mHp7oel3-PW+jWBEimolBe*)6((aoHS+_<4lZ8sTv~#C^23GQ=-F8W hSGK_u3^)VrIluPlu$9H>ngO6f$J5o%Wt~$(69AY_IAH() diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tma_write_reloading/test.gb b/cinema/gb/mooneye-gb/acceptance/timer/tma_write_reloading/test.gb index 56d1303eedabb3f3bed37540caf3fd4281c7fd38..2366f83123fd014ee35626280e299a9455242640 100644 GIT binary patch delta 1068 zcmZo@U}|V!+Th2?bneOI0LHWK9si$RJ^Iy<;lcU`9S^!5bUx^L(EXtALGObJ5Blx? zJ?K{K_<#DIUHyYT5aSt;(F&iesDj$!E19O(;VAP4jHzc*VL?JCP zGbc5L;pF=84;}G9EeZ+@r=2x4L7EwWgp~rrherPoT{|^+&bERqR8(LPk*F61viw16 zCAfhs1qfg`?G4uG2GiK!|Dh9ABX)fd=YVVu1{>f6Goac3Lk~6s>M?AN25WSNX>9WU z(2Y$ax;})>$zTIqU`7QQ(B4z!{;S z9;U(tMTILu1x$eliUJ>G1t)>|f$^x<(Whsvyw9q6pH1;rWSDVM(E*s=Ke+tsSNH`a zCxA&fyK1?DIvX<|YrPnU9Iu+Fo{~ewSx@guAg%)9Y9Ouw;#we<5OuI~0@7&6fkEQ$ z`Ug%AoF8~U@Ujzp;9&RXf&1ZVZ;-8ZCmnfyC>o7VgbDkl{g8Wi~5I{N~5SS3h>RtCg7FJR55>sh>D2nWS3_n&8+=Nu$<*)hDRhvHA*k z!&td<`?F6^D%bmNMmnGLFSi=!9xrso)u8rs9IDB9Q2WK5S=Ov>3ToeXTQO3mgjMEN zGBM)PX@XV%s(oo;dC0xW>Ttcm>h`QvsSZ>JtNH3kGFt6V{;p=`B3Wm1*4dMFR`W47 z<&?8Am~;Ofo4jwZP>Zjld7Xb_`r z{pL(!H?3e#FjXw3$4a@vsBB8)CT9}sp^?79mQX2OEV1EKPEQXJs}?mc);i4#HPz(X z8Dc#$RaedNdZ&4K(pjgUhhG=`)OytHON9Bzr*3x*`wUQR37-NMt&GDahv}{y-_^$$ zu?G|TXd0!GBD5fG>}8}*%|bn3K2JmeN{g72+n{GqHW%_h&?58-N^P4qKn5W5HoE2xzLLVY9nI6T1z2_Y|G zgYX*(TT#h`UX(JyJ_JY|J!O#4gJP5;6+i|(r2ni%GO2C(*JF>R-c|yx_15rb=<9j diff --git a/cinema/gb/mooneye-gb/acceptance/timer/tma_write_reloading/test.sym b/cinema/gb/mooneye-gb/acceptance/timer/tma_write_reloading/test.sym index c34066714..b81e461c5 100644 --- a/cinema/gb/mooneye-gb/acceptance/timer/tma_write_reloading/test.sym +++ b/cinema/gb/mooneye-gb/acceptance/timer/tma_write_reloading/test.sym @@ -1,192 +1,122 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tma_write_reloading.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/timer/tma_write_reloading.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main 00:0150 test + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000000 _sizeof_test diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/bits_ram_en/manifest.yml b/cinema/gb/mooneye-gb/emulator-only/mbc1/bits_ram_en/manifest.yml new file mode 100644 index 000000000..a697ada66 --- /dev/null +++ b/cinema/gb/mooneye-gb/emulator-only/mbc1/bits_ram_en/manifest.yml @@ -0,0 +1 @@ +fail: true diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1_rom_4banks/test.gb b/cinema/gb/mooneye-gb/emulator-only/mbc1/bits_ram_en/test.gb similarity index 96% rename from cinema/gb/mooneye-gb/emulator-only/mbc1_rom_4banks/test.gb rename to cinema/gb/mooneye-gb/emulator-only/mbc1/bits_ram_en/test.gb index 0ae17db5445181d59715f1542e4dd84e756d130f..6117c265b578f74acc6ae49bf2fd4814cea11e5e 100644 GIT binary patch delta 983 zcmZo@U}Hbq4;0E z_Ep3GnpchgpPDfUzGXc7m+=-G)5E7`Tp$HNjsw%fnyuOjH`l*v`oA8i8>*&_=~vT# zuwe?V`E|=RSb@qVn4yxZL6SB=4fP6VKP#SLJp94^>^_gP-#kK6i%S&zy&1$9PD;+5 zDD+Jz#rKJcwchXJ^7jAH0K}DtXLx*88-#feEENinCBpB3xfNzj^_2iN(l@&DP&9={quB+!^%uqj|41Q}T=V7F@% z%qpM?m@B1W&ICH%(Kp`J&z1ogGC)ItuG>73Nkz7v0S^AdSr7(Y_(=9M(8WR|PlD`Y zVqjQ2kx70tqr(UGdP9Z>jI16TJw>tYRE;ylSF)N)8ogJ3T6axC)4?fw%^UYk^oo)WOaPNTVSK28qAxA2>a5 ze&GGUtKLrVfrH(j2kwVYdVp-LI{~rq^uCi180{J#Fs-)*xnAMt$%>69r1mMW3M+F< zd@(=yjQ<~(1=BJ1V+Kkm6$Kgu85|ftuphqbQTt5(oxDwJ{sonjiVO{m3<~QHKlAu{ z+WhP?kB^6!d4LR266Tip9u8zxDRE2i{orC=enLs&=fSh@J&uCXN51Xm1xyJb!qf%; Dy9HS6 delta 1690 zcma)+OK1~O6o${ac{Z(0($pBVnwy{!q)0);2dHV&G)XfUXd+#>sE?KCLU7RD`XWAvucMLIglcWDnB!xi>!TC;WS_Bcd-V~`l2 zM7*VRu|x}b2!lRT1A4XwN!^6x;}^}x>0l|V;->#EP8D%IB5rIrr=&+AJfhFPCDD!Z zDb*rkB7Qv9?~EBWI4`@pLz@`2z1skGy3fE$Z~4`ujP#4$m$)_ts3rV zwxi=8XAuMqPi6UW_$JbsoLVfUCyHS7EBtSe-%YQ!kl2M+MN{{1v6!AH-FeMlEQZP{~m_BVW5oAz2Ed3aT z{zw#02<0l|89B3m|Yh0f%KcqCqhXkLso^fk^Hch zWIrFe$O1kJNz@U*?{bAFI9NiDmEa#2kJ(JvD3qNrD5RZGJT7ZXpZYjUxFaMP1-vg8c!G;1^jZneq~A<pam8bN$>_d1B%E3~ gwOe(|Qd(Q}M%y+2nFRUop*M`A?FaIe3mvPBKmCmj%K!iX diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/bits_ram_en/test.sym b/cinema/gb/mooneye-gb/emulator-only/mbc1/bits_ram_en/test.sym new file mode 100644 index 000000000..3abf1f926 --- /dev/null +++ b/cinema/gb/mooneye-gb/emulator-only/mbc1/bits_ram_en/test.sym @@ -0,0 +1,84 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/bits_ram_en.gb". + +[labels] +01:48c9 clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:4898 memcmp +01:48dd memcpy +01:48e6 memset +01:48a6 print_hex4 +01:48d3 print_hex8 +01:48f6 print_inline_string +01:48b2 print_load_font +01:48be print_newline +01:48ef print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte +01:4000 font +00:0150 main +00:0164 test_round1 +00:018e test_round2 +00:01ae test_round2@expect_enabled +00:01b3 test_round2@expect_disabled +00:01cc test_round2@quit_inline_1 +00:01dd ram_data_enabled +00:01ed ram_data_disabled +00:01fd compare_ram_data +00:0206 fail_round1_disable +00:020d fail_round1_disable@quit_inline_2 +00:0240 fail_round1_enable +00:0247 fail_round1_enable@quit_inline_3 +00:0279 fail_round1_print_test_address +00:0286 fail_round2_disable +00:028d fail_round2_disable@quit_inline_4 +00:02ab fail_round2_expect +00:02b2 fail_round2_expect@quit_inline_5 +00:2000 ram_en_expectations +00:ff80 test_address +00:ff80 test_address_l +00:ff81 test_address_h +00:ff82 ram_en_value + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +0000000e _sizeof_memcmp +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000002 _sizeof_test_address +00000001 _sizeof_test_address_l +00000001 _sizeof_test_address_h +00000001 _sizeof_ram_en_value +00000014 _sizeof_main +0000002a _sizeof_test_round1 +0000004f _sizeof_test_round2 +00000010 _sizeof_ram_data_enabled +00000010 _sizeof_ram_data_disabled +00000009 _sizeof_compare_ram_data +0000003a _sizeof_fail_round1_disable +00000039 _sizeof_fail_round1_enable +0000000d _sizeof_fail_round1_print_test_address +00000025 _sizeof_fail_round2_disable +00001d55 _sizeof_fail_round2_expect diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/multicart_rom_8Mb/baseline_0000.png b/cinema/gb/mooneye-gb/emulator-only/mbc1/multicart_rom_8Mb/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/multicart_rom_8Mb/test.gb b/cinema/gb/mooneye-gb/emulator-only/mbc1/multicart_rom_8Mb/test.gb index 1b1506b07c44432970a6a6850c4f630af46064c6..6c722ed5ceb29f8bc17e1cd7ef1e8d793c018de6 100644 GIT binary patch delta 863 zcmdsx&rcIU6vt<_0)+}~V`v%JxQulil`kZh98rk%}R47vEO;Z1=-J~W3-h!-gDXXSp=ckP%;cH-*E2>}O@TiQ_ z;j^h!iUhq580&y>2grAl%*-YYmDtPt12~|=;;~Fx&CJcjjlxCQ!#}+i7?&>?iL8-S zWe~e`$YY7@Tx{B*4lf??K-{W+CRfBVkJNSg*YRs|?Nf@gc4t=h>aE-AY?=g!RTX6( zt?SS!@`ijWQnxYMMs?ScTP(;6FV;nA(k{;rlcBc_QIy}A*Qql{r{+R!PwAal@#PEj z3=uQ{>mT_;;CFz(0gXJhG}v#p?PU9r`a|Z&oqXtX74>AdYoIIO9_~Le7zx25e+ElZ zIjOr+_oVVt!9mdDvi@^`1bz&GR{3r-B)f7e3^BL4{&z!_5INJT4Glzdt*YB}O0)Yke% zWeh$Sv8fq+rl%gw=ko@UN8!gVJ97g@+)(Nz&0%hI6*Uv1`qB=a`jJ`41xMoU~dG(#Jbgxn<+_H!OVBtmfK$ zYkg&cj9=bvuA+JUIIvx%puVwLl?L`35Feq@*)+8J@sR9Lha~$FKKZsi--d*5>tcMO!YjiDiHL*t;FHwvu!33(pCs%Vll3 zqL-Guq$3N}t>j)zgunum>A5ZTPSiTRv&VXMC&nkw5I2yVYsajW_8#kK70>My{c!fhLO<-LFuE@UGzF3K^9r4fv2lf2n{9@(5h!FvzYCKBQ4V&968oh^Qrr?Dp z+~LTR3>R1%JW1A>2~Odr4bmv1!!*ZIhQOSNFb5wxL|liG;JXgbaO63>$f4)Zcp4=s z=cFuwH$*9ulu$D4O1_W0p~}9l<|UryXLgt7|?qxIg0LPvtw%Xo&Sa%*-qb3EDN+$K0w9lk|lLk!MZ_=Pi2TU3=Y1pI@ NlMb46=mH(4e*;fkFy{aO diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/multicart_rom_8Mb/test.sym b/cinema/gb/mooneye-gb/emulator-only/mbc1/multicart_rom_8Mb/test.sym index 6e0cc401c..e6638a1fd 100644 --- a/cinema/gb/mooneye-gb/emulator-only/mbc1/multicart_rom_8Mb/test.sym +++ b/cinema/gb/mooneye-gb/emulator-only/mbc1/multicart_rom_8Mb/test.sym @@ -1,226 +1,69 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/multicart_rom_8Mb.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/multicart_rom_8Mb.gb". [labels] -01:4001 print_load_font -01:400e print_string -01:4018 print_a -01:4022 print_newline -01:402d print_digit -01:403a print_regs -01:4043 _print_sl_data0 -01:4049 _print_sl_out0 -01:4056 _print_sl_data1 -01:405c _print_sl_out1 -01:406e _print_sl_data2 -01:4074 _print_sl_out2 -01:4081 _print_sl_data3 -01:4087 _print_sl_out3 -01:4099 _print_sl_data4 -01:409f _print_sl_out4 -01:40ac _print_sl_data5 -01:40b2 _print_sl_out5 -01:40c4 _print_sl_data6 -01:40ca _print_sl_out6 -01:40d7 _print_sl_data7 -01:40dd _print_sl_out7 +01:40cc clear_vram +01:408b disable_lcd_safe +01:4091 disable_lcd_safe@wait_ly_0 +01:40e0 memcpy +01:40e9 memset +01:40a9 print_hex4 +01:40d6 print_hex8 +01:40f9 print_inline_string +01:40b5 print_load_font +01:40c1 print_newline +01:40f2 print_string +01:4001 quit +01:4016 quit@cb_return +01:401b quit@wait_ly_1 +01:4021 quit@wait_ly_2 +01:4027 quit@wait_ly_3 +01:402d quit@wait_ly_4 +01:4037 quit@success +01:405e quit@failure +01:4073 quit@halt +01:4074 quit@halt_execution_0 +01:4077 reset_screen +01:409a serial_send_byte 01:4134 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:4924 memcpy -01:492d memset -01:4936 memcmp -01:4944 clear_vram -01:494e clear_oam -01:4958 disable_lcd_safe -01:495e _wait_ly_0 -01:4964 _wait_ly_1 -01:496d reset_screen -01:4981 process_results -01:4995 _wait_ly_2 -01:499b _wait_ly_3 -01:49b1 _print_results_halt_0 -01:49b4 _process_results_cb -01:49bf _print_sl_data8 -01:49c9 _print_sl_out8 -01:49e3 _print_sl_data9 -01:49ee _print_sl_out9 -01:4a06 _print_sl_data10 -01:4a12 _print_sl_out10 -01:4a13 dump_mem -01:4a32 _dump_mem_line -01:4a5c _check_asserts -01:4a6a _print_sl_data11 -01:4a6d _print_sl_out11 -01:4a79 _print_sl_data12 -01:4a7b _print_sl_out12 -01:4a83 _print_sl_data13 -01:4a86 _print_sl_out13 -01:4a90 __check_assert_fail0 -01:4a9b _print_sl_data14 -01:4a9e _print_sl_out14 -01:4aa1 __check_assert_ok0 -01:4aa9 _print_sl_data15 -01:4aae _print_sl_out15 -01:4ab0 __check_assert_skip0 -01:4ab8 _print_sl_data16 -01:4ac0 _print_sl_out16 -01:4ac0 __check_assert_out0 -01:4acc _print_sl_data17 -01:4ace _print_sl_out17 -01:4ad6 _print_sl_data18 -01:4ad9 _print_sl_out18 -01:4ae3 __check_assert_fail1 -01:4aee _print_sl_data19 -01:4af1 _print_sl_out19 -01:4af4 __check_assert_ok1 -01:4afc _print_sl_data20 -01:4b01 _print_sl_out20 -01:4b03 __check_assert_skip1 -01:4b0b _print_sl_data21 -01:4b13 _print_sl_out21 -01:4b13 __check_assert_out1 -01:4b1e _print_sl_data22 -01:4b21 _print_sl_out22 -01:4b2d _print_sl_data23 -01:4b2f _print_sl_out23 -01:4b37 _print_sl_data24 -01:4b3a _print_sl_out24 -01:4b44 __check_assert_fail2 -01:4b4f _print_sl_data25 -01:4b52 _print_sl_out25 -01:4b55 __check_assert_ok2 -01:4b5d _print_sl_data26 -01:4b62 _print_sl_out26 -01:4b64 __check_assert_skip2 -01:4b6c _print_sl_data27 -01:4b74 _print_sl_out27 -01:4b74 __check_assert_out2 -01:4b80 _print_sl_data28 -01:4b82 _print_sl_out28 -01:4b8a _print_sl_data29 -01:4b8d _print_sl_out29 -01:4b97 __check_assert_fail3 -01:4ba2 _print_sl_data30 -01:4ba5 _print_sl_out30 -01:4ba8 __check_assert_ok3 -01:4bb0 _print_sl_data31 -01:4bb5 _print_sl_out31 -01:4bb7 __check_assert_skip3 -01:4bbf _print_sl_data32 -01:4bc7 _print_sl_out32 -01:4bc7 __check_assert_out3 -01:4bd2 _print_sl_data33 -01:4bd5 _print_sl_out33 -01:4be1 _print_sl_data34 -01:4be3 _print_sl_out34 -01:4beb _print_sl_data35 -01:4bee _print_sl_out35 -01:4bf8 __check_assert_fail4 -01:4c03 _print_sl_data36 -01:4c06 _print_sl_out36 -01:4c09 __check_assert_ok4 -01:4c11 _print_sl_data37 -01:4c16 _print_sl_out37 -01:4c18 __check_assert_skip4 -01:4c20 _print_sl_data38 -01:4c28 _print_sl_out38 -01:4c28 __check_assert_out4 -01:4c34 _print_sl_data39 -01:4c36 _print_sl_out39 -01:4c3e _print_sl_data40 -01:4c41 _print_sl_out40 -01:4c4b __check_assert_fail5 -01:4c56 _print_sl_data41 -01:4c59 _print_sl_out41 -01:4c5c __check_assert_ok5 -01:4c64 _print_sl_data42 -01:4c69 _print_sl_out42 -01:4c6b __check_assert_skip5 -01:4c73 _print_sl_data43 -01:4c7b _print_sl_out43 -01:4c7b __check_assert_out5 -01:4c86 _print_sl_data44 -01:4c89 _print_sl_out44 -01:4c95 _print_sl_data45 -01:4c97 _print_sl_out45 -01:4c9f _print_sl_data46 -01:4ca2 _print_sl_out46 -01:4cac __check_assert_fail6 -01:4cb7 _print_sl_data47 -01:4cba _print_sl_out47 -01:4cbd __check_assert_ok6 -01:4cc5 _print_sl_data48 -01:4cca _print_sl_out48 -01:4ccc __check_assert_skip6 -01:4cd4 _print_sl_data49 -01:4cdc _print_sl_out49 -01:4cdc __check_assert_out6 -01:4ce8 _print_sl_data50 -01:4cea _print_sl_out50 -01:4cf2 _print_sl_data51 -01:4cf5 _print_sl_out51 -01:4cff __check_assert_fail7 -01:4d0a _print_sl_data52 -01:4d0d _print_sl_out52 -01:4d10 __check_assert_ok7 -01:4d18 _print_sl_data53 -01:4d1d _print_sl_out53 -01:4d1f __check_assert_skip7 -01:4d27 _print_sl_data54 -01:4d2f _print_sl_out54 -01:4d2f __check_assert_out7 +00:0150 main 00:016b fail -00:017f _wait_ly_4 -00:0185 _wait_ly_5 -00:019b _print_results_halt_1 -00:019e _fail_cb -00:01a6 _print_sl_data55 -00:01b2 _print_sl_out55 -00:01c2 _print_sl_data56 -00:01ce _print_sl_out56 -00:01d8 _print_sl_data57 -00:01e4 _print_sl_out57 -00:01ef _print_sl_data58 -00:01f5 _print_sl_out58 -00:0208 _print_sl_data59 -00:0215 _print_sl_out59 -00:0225 _print_sl_data60 -00:0232 _print_sl_out60 -00:0242 _print_sl_data61 -00:024f _print_sl_out61 -00:025a c000_functions_start -00:025a run_test_suite -00:0284 _wait_ly_6 -00:028a _wait_ly_7 -00:02a0 _print_results_halt_2 -00:02a3 _test_ok_cb_0 -00:02ab _print_sl_data62 -00:02b3 _print_sl_out62 -00:02b6 run_tests -00:02c4 run_test_cases -00:02d2 test_case -00:02ef restore_mbc1 -00:02f8 switch_bank -00:0309 fetch_expected_value -00:0328 c000_functions_end -00:0328 expected_banks +00:0172 fail@quit_inline_1 +00:020b c000_functions_start +00:020b run_test_suite +00:0228 run_test_suite@quit_inline_2 +00:0239 run_tests +00:0247 run_test_cases +00:0255 test_case +00:0272 restore_mbc1 +00:027b switch_bank +00:028c fetch_expected_value +00:02ab c000_functions_end +00:02ab expected_banks + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000180 _sizeof_expected_banks +0000001b _sizeof_main +000000a0 _sizeof_fail +00000000 _sizeof_c000_functions_start +0000002e _sizeof_run_test_suite +0000000e _sizeof_run_tests +0000000e _sizeof_run_test_cases +0000001d _sizeof_test_case +00000009 _sizeof_restore_mbc1 +00000011 _sizeof_switch_bank +0000001f _sizeof_fetch_expected_value diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/ram_256Kb/baseline_0000.png b/cinema/gb/mooneye-gb/emulator-only/mbc1/ram_256Kb/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/ram_256Kb/test.gb b/cinema/gb/mooneye-gb/emulator-only/mbc1/ram_256Kb/test.gb index e00f3dfc283ba78304ea635c8ff6c2ca84905bfa..02e0c0d2fafa8e8501cc76cffc808ed3edec5d56 100644 GIT binary patch delta 1072 zcmZo@U}B)~Kh zv<2)M=CfJMx0XOHfN{VUz&KE6L6k9qEC4xPaTeUO^&Yp53V``A-yRhJdkaYoHYFf~ z2`C{d!0LfMg(?I(@)=TKfjIEM0&x(2c_si4tM#BDU>5{?3&sZNg0VrGplo0yepa+% zKK#M`>?V)14?IFri%S$-{Jj~(7*3v6hd?ob_^XPLba325kpUDY7Y`rzz#=`vr5rEq_d4YgP{b$8qgovA?r;n9FP=0A% zih>b?m=i?HI_wIJ;R?=US6~8H@BzC5QwA|1s2zfWaA$4S7P_jt`2({E<0gj>?Dd8W z4;WcJjy^qG<#9I6dL>=s$fHWF%V37E`{(;j2=Lg;oyz1=)A2`_kdEkC{ zuLsE1x)Tr!PwzYVfYGk;0n>V01|U%Qd9q^T38{SwtisCN5?{SJ=bYcYx6=J^y|VKEUD#}|_N#Zs#_sH3<&HD#SysVzFqgaj z8_%)IyLZOlnwxv=(v2G@N5?DQzB70C()Vs$KM?-PsZ--8o<8x(lOxuXC(b;{1_zl# zb7}|J$NzDw;pYxFo7N1L*AuUg7$W?s9p)oO`27VI3A6muj_?O`q|wnb9qDwmLPrid zDqCPob)Is(@}i;o%b+ks28B@~m|0-MYTN@S5sPu;ryQ>{x6H2skzWONe(I*t1hn>s z+pG54;})UXYmZxO>H%FS?*qDQm8;N?@8n8hCmL;w2euRi#hqMn+fp;s^Bp-%9n&av zOoIx?{0!#(iTr00`IYVlYbrnHXo#%jmKWp8&sj_S`&-u1*&kRHrH;yyYFFKk#*ggx zG4lg$+>x(Hny!Ji{sF6}n^m)H?i2FAYUB8;4f2Xv>}X)*_wwvw$0p5s;^jZe4zqe< z{awq}mG$k2ApijgKmY;|fB*y_009WpeD{T_e^x#E`8QiWyZ_&}>JPDJtXp#>Z~XSm zYrW6(UH{>|v7yI3i+?`;qw7bney1+cmHg9i?cU!kT^cz0_|>aT_p;mMV=6ro);Z77 z(;R=4Vb)Cke#ghGcliSr%dUT7nliTZ#58Tt6H{e-v@_Xi^__ZZ{88&utU9(K-My`) zdv{~H=FQR_bZ=>OVfTjB9oQ`0*SD7Ln;X-$Y?khKTT6F$W4cdomhR!IEp2vh)rQR; zq;$A@AOHafKmY;|fB*y_009U<00Izz00bZa0SG_<0uX=z1Rwwb2tWV=5P$##AOHaf zKmY;|fB*y_009U<;KLJ0uPXEk@v1P5_qdpV`gYh`+hcP*tb{LOe zzI^fG(2!+$y(TYyzgz|NpO}cp=|kUY{3I{&crd8isa3V7Qjy5SM1+@AirR~@^rrbI zCof-C<7wyVG=0Zn)L))i@(+h8_Il}Ra5`20cs!Bl?LB=uk%-5soo13n?l>A99X)cS zvop#IwZ~#3BYk~cUG42Mzt`(46nTE-{$vK~zq(!5)&6^X)qK=$7!?&hpB#VwJgrq0 zIiK8%I-eIVQ0(VLUSG7X&dwu8Mn~29s6}3dG(H;j`F8Cp<||$=a(}@f-7Qq4eu@xV^o#l_HX%>vv>iXozAe@}8Fa z*LewtV=>iV-Z69+sO#4>4I>ydc#)$SYiUU)1v^SP#32A_BA)tywoOlZ<@4r85>3@L@OxHPjfXk*4D~)x(18?zEIr-UIqup z#)|E94XlpkHDDO>o~3_TX%_15^%_PKFNPugm6f_;==@jk;&Q3=(WvI;WRm{USuYlf zCtkc=>+_VG?;YbuXMN@7zo_P>RpNQL-2D3^*#lD@tA zCr)xVvorIt`NQ+w^Ic*0d?ft-e8;SjSo6y$lZmaoT;^sO?fC?~Usl%F*3sEN(AL+_ z@>Y`m57PIND|0RIh&Cholt=sf+xiANd%j?I3Ur>m7WgRdsJ$Y(REXbLq1Oi6;w-!1 z&U|&DDwA69WQvPpQ%j!Av8Afa@w55rbGV8Uc zL{!q#%@df0_B9c@=vw22<+^#wDN(1lGwu6wD5YdP<#v_w7qY&P^0tWVlz$MRoswJ@ zWPh5VpHFaKgnEo=jxMnon!v#)s8AC;B=uzdK~RMD1i3Hrlu1#iA7rY1d=}O;Exos8kdDTGkgPm=lpb z!P_FVC&)d)Q?hQ_yxzvNGI8Xflun*E-P z8{Rp+To%+{+V)bDFYD2wNdhdjtSDav-9Qg%1FEXMQ04LPNj%z@Rej9vdR|o>UfcEC zsy=Ra{jsWQTif-Qsy<WB9{iJ2e(0SG_<0uX=z1Rwwb2tWV= z5P$##AOHafKmY;|fB*y_009U<00Izz00bZa0SG_<0uX=z1Rwwb2tWV=5P$##AOHaf zKmY;|fB*y_009U<00Izz00bZa0SG_<0uX=z1Rwwb2tWV=5P$##AOHafKmY;|fB*y_ z009U<00Izz00bZa0SG_<0uX=z1Rwwb2tWV=5P$##AOHafKmY;|fB*y_009U<00Izz z00bZa0SG_<0uX=z1Rwwb2tWV=5P$##AOHafKmY;|fB*y_009U<00Izz00bZa0SG_< W0uX=z1Rwwb2tWV=5P-mcTi`#twgs{P diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/ram_256Kb/test.sym b/cinema/gb/mooneye-gb/emulator-only/mbc1/ram_256Kb/test.sym index c24fc1363..48d92e7c7 100644 --- a/cinema/gb/mooneye-gb/emulator-only/mbc1/ram_256Kb/test.sym +++ b/cinema/gb/mooneye-gb/emulator-only/mbc1/ram_256Kb/test.sym @@ -1,194 +1,31 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/ram_256Kb.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/ram_256Kb.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48bd clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:4898 memcmp +01:48c7 memcpy +01:48d0 memset +01:48e0 print_inline_string +01:48a6 print_load_font +01:48b2 print_newline +01:48d9 print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:0150 main 00:0150 test_round1 00:016e test_round2 00:01d2 test_round3 @@ -196,57 +33,56 @@ 00:02a0 test_round5 00:02fc test_round6 00:0330 test_finish -00:0347 _wait_ly_4 -00:034d _wait_ly_5 -00:0363 _print_results_halt_1 -00:0366 _test_ok_cb_0 -00:036e _print_sl_data55 -00:0376 _print_sl_out55 -00:0379 copy_bank_data -00:0398 check_bank_data -00:03b8 all_ff -00:03c8 all_00 +00:033a test_finish@quit_inline_1 +00:034b copy_bank_data +00:036a check_bank_data +00:038a all_ff +00:039a all_00 00:1000 bank_data 00:1040 clear_ram 00:1062 fail_round1 -00:1079 _wait_ly_6 -00:107f _wait_ly_7 -00:1095 _print_results_halt_2 -00:1098 _test_failure_cb_0 -00:10a0 _print_sl_data56 -00:10ae _print_sl_out56 -00:10b1 fail_round2 -00:10c8 _wait_ly_8 -00:10ce _wait_ly_9 -00:10e4 _print_results_halt_3 -00:10e7 _test_failure_cb_1 -00:10ef _print_sl_data57 -00:10fd _print_sl_out57 -00:1100 fail_round3 -00:1117 _wait_ly_10 -00:111d _wait_ly_11 -00:1133 _print_results_halt_4 -00:1136 _test_failure_cb_2 -00:113e _print_sl_data58 -00:114c _print_sl_out58 -00:114f fail_round4 -00:1166 _wait_ly_12 -00:116c _wait_ly_13 -00:1182 _print_results_halt_5 -00:1185 _test_failure_cb_3 -00:118d _print_sl_data59 -00:119b _print_sl_out59 -00:119e fail_round5 -00:11b5 _wait_ly_14 -00:11bb _wait_ly_15 -00:11d1 _print_results_halt_6 -00:11d4 _test_failure_cb_4 -00:11dc _print_sl_data60 -00:11ea _print_sl_out60 -00:11ed fail_round6 -00:1204 _wait_ly_16 -00:120a _wait_ly_17 -00:1220 _print_results_halt_7 -00:1223 _test_failure_cb_5 -00:122b _print_sl_data61 -00:1239 _print_sl_out61 +00:106c fail_round1@quit_inline_2 +00:1083 fail_round2 +00:108d fail_round2@quit_inline_3 +00:10a4 fail_round3 +00:10ae fail_round3@quit_inline_4 +00:10c5 fail_round4 +00:10cf fail_round4@quit_inline_5 +00:10e6 fail_round5 +00:10f0 fail_round5@quit_inline_6 +00:1107 fail_round6 +00:1111 fail_round6@quit_inline_7 + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +0000000e _sizeof_memcmp +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000000 _sizeof_test_round1 +0000001e _sizeof_main +00000064 _sizeof_test_round2 +00000060 _sizeof_test_round3 +0000006e _sizeof_test_round4 +0000005c _sizeof_test_round5 +00000034 _sizeof_test_round6 +0000001b _sizeof_test_finish +0000001f _sizeof_copy_bank_data +00000020 _sizeof_check_bank_data +00000010 _sizeof_all_ff +00000c66 _sizeof_all_00 +00000040 _sizeof_bank_data +00000022 _sizeof_clear_ram +00000021 _sizeof_fail_round1 +00000021 _sizeof_fail_round2 +00000021 _sizeof_fail_round3 +00000021 _sizeof_fail_round4 +00000021 _sizeof_fail_round5 diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/ram_64Kb/baseline_0000.png b/cinema/gb/mooneye-gb/emulator-only/mbc1/ram_64Kb/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/ram_64Kb/test.gb b/cinema/gb/mooneye-gb/emulator-only/mbc1/ram_64Kb/test.gb index c15f9eb89724f05312d718fc999828ee302dab0f..7136b5dc09dbb5bd323bb003a0a07623865138ce 100644 GIT binary patch delta 767 zcmZo@U}MZt(c%n72U4!Z(lxPtlE6_~&k9Kf!?ltFCsZb4VQi2~0y zIecKRH)MFg$m((Q>DelevuPe@mw6~M%s8p&@c;C`4=(@u6@CH931AY=u3E03&c@8g zD#jtlt0tg@y{ zIN1Gp;C^_o2gugC6A%ke?>qT`(XR0U(|TJ5AW-;uvSQ;2seKBp!phtdU(8P`3N#2Z zI52)-2gXS4Gx>M&Hm&&=R8A@~G%zwKtUr9g1EgF@m|Nm|IFMDP#4YiIi+TA8C5fL0 a&))Pndh$OMY(6PyuDAJupaGny)&T&s2}A(^ delta 2064 zcma)-e`s4(6vywqX_GEV+xM1P9~-VW*_4Pd>l9Z9c1hbb$r2VwqD6+xU!XXtf)u5j zzKH%KW1#+H|B@o2AWEhcivCd_7D^wFhcfU7MJ0&rk0=^Ym($Hg>H^Qtm7pyY5{(-gVQv zhMR=QqKoYEE1Im6A(qMzt1$$Ydy%bwqt%-xdBpErAJ+X&5qg~>^g2aIn_C)YZZtsX zH$dn&%;+$_dpPIbmvc7@aX#-p#^R|>r_-A3yw2P3{?Hq|J@)~R1_J}VLwyJPZ@cM8 zf*9B7)69()jlOE8Qst!r86vh$w76VTD~qw%(TW#)>-*ux2W;^LcDny9Eop9KZ{dH| zVMX?Thj~idKFt5j@|-4S8JJ4vi^qBS+1Z&V_+4aZybHIqBhKu)w=cVSM|a`{^<9lO zpm&XT_ZFO~cK^Wccn^2;?%Bdqxc7F43wq4o$fv1R$b9jWwf%`$#JD;Q(Oe>8 z{39~Uyf=0zV*Gu~j*}WCyuPxLjgt;tAQ-`^d3jA88~CQ2WxL)OZ%i}_jgw<~BQlq-rIfFQt}wBV@)JosbtF4 zeCd=bO6KR5k~c#ky^JMMJh$S&WG0E-)UB7Ad#&@$m?ft3z7R6sj#<;~z1EpIcc^#{ zUi;w{YwOni$wAR_Ww^7C{{~RwXS@q|Eb7xR$r*ZYUd$TcoH!H76EuU8r3o#`4~}!v zrdFvPwmwhl0HsgLe4LYg#;{3eQTCP!Krl4=8p=K{|AcQ_#Pp2O{^l*1@W<=~tK zWD#?0g3t$Lt3Wb9MttN9H6_WR6)%zMlcREl{5r9z6K%d%b! z{X7^vijw6BJu4#9K!*@GXuiX%vcq$D6P0pUK&c#@bHMxzbF4_{vTPMY2LU>!Qi|@e z#|9TV;Ze34S{+H)F`6!l6$Uv^!x-W*IzX#_YRXH+Vqg-Z&lF9sc3jn(e(l8e+PD4u qq$>T;Pi3~3e&y$Ls`Ohw1-}|N6i#4oF8-n&ymPUoY3l9ATmJ. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/ram_64Kb.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/ram_64Kb.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48bd clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:4898 memcmp +01:48c7 memcpy +01:48d0 memset +01:48e0 print_inline_string +01:48a6 print_load_font +01:48b2 print_newline +01:48d9 print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:0150 main 00:0150 test_round1 00:016e test_round2 00:01c2 test_round3 00:01cb test_round4 00:01fb test_round5 00:022c test_finish -00:0243 _wait_ly_4 -00:0249 _wait_ly_5 -00:025f _print_results_halt_1 -00:0262 _test_ok_cb_0 -00:026a _print_sl_data55 -00:0272 _print_sl_out55 -00:0275 copy_bank_data -00:028d check_bank_data -00:02a6 all_ff -00:02b6 all_00 +00:0236 test_finish@quit_inline_1 +00:0247 copy_bank_data +00:025f check_bank_data +00:0278 all_ff +00:0288 all_00 00:1000 bank_data 00:1010 clear_ram 00:1032 fail_round1 -00:1049 _wait_ly_6 -00:104f _wait_ly_7 -00:1065 _print_results_halt_2 -00:1068 _test_failure_cb_0 -00:1070 _print_sl_data56 -00:107e _print_sl_out56 -00:1081 fail_round2 -00:1098 _wait_ly_8 -00:109e _wait_ly_9 -00:10b4 _print_results_halt_3 -00:10b7 _test_failure_cb_1 -00:10bf _print_sl_data57 -00:10cd _print_sl_out57 -00:10d0 fail_round3 -00:10e7 _wait_ly_10 -00:10ed _wait_ly_11 -00:1103 _print_results_halt_4 -00:1106 _test_failure_cb_2 -00:110e _print_sl_data58 -00:111c _print_sl_out58 -00:111f fail_round4 -00:1136 _wait_ly_12 -00:113c _wait_ly_13 -00:1152 _print_results_halt_5 -00:1155 _test_failure_cb_3 -00:115d _print_sl_data59 -00:116b _print_sl_out59 -00:116e fail_round5 -00:1185 _wait_ly_14 -00:118b _wait_ly_15 -00:11a1 _print_results_halt_6 -00:11a4 _test_failure_cb_4 -00:11ac _print_sl_data60 -00:11ba _print_sl_out60 +00:103c fail_round1@quit_inline_2 +00:1053 fail_round2 +00:105d fail_round2@quit_inline_3 +00:1074 fail_round3 +00:107e fail_round3@quit_inline_4 +00:1095 fail_round4 +00:109f fail_round4@quit_inline_5 +00:10b6 fail_round5 +00:10c0 fail_round5@quit_inline_6 + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +0000000e _sizeof_memcmp +00000009 _sizeof_memcpy +00000009 _sizeof_memset +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000000 _sizeof_test_round1 +0000001e _sizeof_main +00000054 _sizeof_test_round2 +00000009 _sizeof_test_round3 +00000030 _sizeof_test_round4 +00000031 _sizeof_test_round5 +0000001b _sizeof_test_finish +00000018 _sizeof_copy_bank_data +00000019 _sizeof_check_bank_data +00000010 _sizeof_all_ff +00000d78 _sizeof_all_00 +00000010 _sizeof_bank_data +00000022 _sizeof_clear_ram +00000021 _sizeof_fail_round1 +00000021 _sizeof_fail_round2 +00000021 _sizeof_fail_round3 +00000021 _sizeof_fail_round4 diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_16Mb/baseline_0000.png b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_16Mb/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_16Mb/test.gb b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_16Mb/test.gb index 37d016acb11fd268789b007d04b1e90d0062f8ad..53059a94f97a3c7a28316827ae622d0d9985b66e 100644 GIT binary patch delta 683 zcmZ9IO-vI(6vt<_LV*f&Me14=whd7)5{xGG0GsW{mXS}RC3y5=Nc1344_L&$7JLUU z>P>E5l!J$gTs#<4v!UsROwy~jiHRh5Fx#j>j8ewGIw!BS0(Nnkanu? zOgfz=TBirjHbBe+@}4B)lPOCl?h-FE4>VXJJ~66KOpPb3+(p@gzr8JHUA|x?GgeBM zM%=<4k0&!z@iC8jJip6B38(mpToFsWzhuyV8K04BpH#fH8?!Q3Z{5}>M@fh{MX|^S zONQA9vI0KRUvgov4*FL|ZZRtho-c{Qu)8?jL&C2sA}^n_uTyW1LG9VKZKZYSad6?4 zS@Y*k6G5BV`bR#`_zdIEE0w6W^NxRD>&_YlHC6xwil89)5cVN7Av7cS5n2#h y5!w&}2>TJ*5jqe$5rPOR!U2RXgo6m(2qA<+2pYm+gfPMpgrf+@5PF_NFZ=oq_lHCwdp`tHh6(0mC zsdY|%ydd;J1R=h}N}+uym}-$$ggUrTGAttnLHktpMITbsEd*K?-Foi5J41s$IPA>c z?>pyy-?{hP833Sw_mw$n4nK$!EBcZ`eb~E4pNNeHqW39DxNelUX{oNyh@$lorPbY}_H@!%mu%U*kdZnrrGBbvrCr;dG zu3pkc=npb>U=pvV4je8N3MNs9=ute~fm=2PgOg7(jr^SVZwYtE>FEDr<}ZV}FA z=1SV!!faNb$2iD1Jt%|vizoD4RnKd9k>*M#n3cgyuDXyhc*x|@Wf>jG+MC{_D6c9-Ya3UWl-^@sr|ce{Y4xtC4%Y$&fL(t zWBY^Z&XgS|K#8_lYhg#*^gIzG?A`}kkG8LV1Ix%Za*a~scq-aRr~Yb8*P_K;U0*K# z$8ybowLMBKdalUZ(l@V9&s3`Ve1$iW|BmoyD_~tqPSGnOCzz>J^!e&cdCp6EVrJ=D za+G)XCy}!20NLA7>+JTR_5OBDG{cmKlB~C4)?#bWI=O@$JcIWb-mzBHI+h&ZQ+}Ih z4{3K%RJ|isf#-8`5i2=Kr)GGqKJ0!ymwbU11XMDFo{)i~8fj6h-0HKwO-50az9IRz zMuyZ0lfEZlce#WLYJ`3$V1S<}yhy!-nx6?yDG+)=&gGf}HG5sn?<6lZsV$Hvd0RkF zlJCr2nUANI)GO%F5?IL++I3tkhdcPtA>=yjlYGbFNr60vBLaF3^_Nj{R&Yv=&_y|w zODZTCbS2+G-o&lzXr2{mp5{3LJxyNq=TeAo%j@XyrGQGF(Cae59lFt>-*vbp`HsOI zfjooXIW$$zp?(TAX^Agi(FqNTk&kP3p=Q|C+%Nf#<}(6$nrQ(&NnUhC=JTT8MT6G_ zREmVY#Yd(p9D2|p;ySF!86AgD1o9ld5YTg|pFz!U1g98;elMr;qWvg2;7a}?`HtkT z0trd{YDVaez@8>nZO0=JrD@vi!Oyqd*CxrXgipP1PuC}%Lq>g44dNT|$Aq7hL%nut z;C#F9Ipt>0&B=rvqgjJ*p. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/rom_16Mb.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/rom_16Mb.gb". [labels] -01:4c00 print_load_font -01:4c0d print_string -01:4c17 print_a -01:4c21 print_newline -01:4c2c print_digit -01:4c39 print_regs -01:4c42 _print_sl_data0 -01:4c48 _print_sl_out0 -01:4c55 _print_sl_data1 -01:4c5b _print_sl_out1 -01:4c6d _print_sl_data2 -01:4c73 _print_sl_out2 -01:4c80 _print_sl_data3 -01:4c86 _print_sl_out3 -01:4c98 _print_sl_data4 -01:4c9e _print_sl_out4 -01:4cab _print_sl_data5 -01:4cb1 _print_sl_out5 -01:4cc3 _print_sl_data6 -01:4cc9 _print_sl_out6 -01:4cd6 _print_sl_data7 -01:4cdc _print_sl_out7 +01:48bc clear_vram +01:487b disable_lcd_safe +01:4881 disable_lcd_safe@wait_ly_0 +01:48d0 memcpy +01:48d9 memset +01:4899 print_hex4 +01:48c6 print_hex8 +01:48e9 print_inline_string +01:48a5 print_load_font +01:48b1 print_newline +01:48e2 print_string +01:47f1 quit +01:4806 quit@cb_return +01:480b quit@wait_ly_1 +01:4811 quit@wait_ly_2 +01:4817 quit@wait_ly_3 +01:481d quit@wait_ly_4 +01:4827 quit@success +01:484e quit@failure +01:4863 quit@halt +01:4864 quit@halt_execution_0 +01:4867 reset_screen +01:488a serial_send_byte 01:4001 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f1 memcpy -01:47fa memset -01:4803 memcmp -01:4811 clear_vram -01:481b clear_oam -01:4825 disable_lcd_safe -01:482b _wait_ly_0 -01:4831 _wait_ly_1 -01:483a reset_screen -01:484e process_results -01:4862 _wait_ly_2 -01:4868 _wait_ly_3 -01:487e _print_results_halt_0 -01:4881 _process_results_cb -01:488c _print_sl_data8 -01:4896 _print_sl_out8 -01:48b0 _print_sl_data9 -01:48bb _print_sl_out9 -01:48d3 _print_sl_data10 -01:48df _print_sl_out10 -01:48e0 dump_mem -01:48ff _dump_mem_line -01:4929 _check_asserts -01:4937 _print_sl_data11 -01:493a _print_sl_out11 -01:4946 _print_sl_data12 -01:4948 _print_sl_out12 -01:4950 _print_sl_data13 -01:4953 _print_sl_out13 -01:495d __check_assert_fail0 -01:4968 _print_sl_data14 -01:496b _print_sl_out14 -01:496e __check_assert_ok0 -01:4976 _print_sl_data15 -01:497b _print_sl_out15 -01:497d __check_assert_skip0 -01:4985 _print_sl_data16 -01:498d _print_sl_out16 -01:498d __check_assert_out0 -01:4999 _print_sl_data17 -01:499b _print_sl_out17 -01:49a3 _print_sl_data18 -01:49a6 _print_sl_out18 -01:49b0 __check_assert_fail1 -01:49bb _print_sl_data19 -01:49be _print_sl_out19 -01:49c1 __check_assert_ok1 -01:49c9 _print_sl_data20 -01:49ce _print_sl_out20 -01:49d0 __check_assert_skip1 -01:49d8 _print_sl_data21 -01:49e0 _print_sl_out21 -01:49e0 __check_assert_out1 -01:49eb _print_sl_data22 -01:49ee _print_sl_out22 -01:49fa _print_sl_data23 -01:49fc _print_sl_out23 -01:4a04 _print_sl_data24 -01:4a07 _print_sl_out24 -01:4a11 __check_assert_fail2 -01:4a1c _print_sl_data25 -01:4a1f _print_sl_out25 -01:4a22 __check_assert_ok2 -01:4a2a _print_sl_data26 -01:4a2f _print_sl_out26 -01:4a31 __check_assert_skip2 -01:4a39 _print_sl_data27 -01:4a41 _print_sl_out27 -01:4a41 __check_assert_out2 -01:4a4d _print_sl_data28 -01:4a4f _print_sl_out28 -01:4a57 _print_sl_data29 -01:4a5a _print_sl_out29 -01:4a64 __check_assert_fail3 -01:4a6f _print_sl_data30 -01:4a72 _print_sl_out30 -01:4a75 __check_assert_ok3 -01:4a7d _print_sl_data31 -01:4a82 _print_sl_out31 -01:4a84 __check_assert_skip3 -01:4a8c _print_sl_data32 -01:4a94 _print_sl_out32 -01:4a94 __check_assert_out3 -01:4a9f _print_sl_data33 -01:4aa2 _print_sl_out33 -01:4aae _print_sl_data34 -01:4ab0 _print_sl_out34 -01:4ab8 _print_sl_data35 -01:4abb _print_sl_out35 -01:4ac5 __check_assert_fail4 -01:4ad0 _print_sl_data36 -01:4ad3 _print_sl_out36 -01:4ad6 __check_assert_ok4 -01:4ade _print_sl_data37 -01:4ae3 _print_sl_out37 -01:4ae5 __check_assert_skip4 -01:4aed _print_sl_data38 -01:4af5 _print_sl_out38 -01:4af5 __check_assert_out4 -01:4b01 _print_sl_data39 -01:4b03 _print_sl_out39 -01:4b0b _print_sl_data40 -01:4b0e _print_sl_out40 -01:4b18 __check_assert_fail5 -01:4b23 _print_sl_data41 -01:4b26 _print_sl_out41 -01:4b29 __check_assert_ok5 -01:4b31 _print_sl_data42 -01:4b36 _print_sl_out42 -01:4b38 __check_assert_skip5 -01:4b40 _print_sl_data43 -01:4b48 _print_sl_out43 -01:4b48 __check_assert_out5 -01:4b53 _print_sl_data44 -01:4b56 _print_sl_out44 -01:4b62 _print_sl_data45 -01:4b64 _print_sl_out45 -01:4b6c _print_sl_data46 -01:4b6f _print_sl_out46 -01:4b79 __check_assert_fail6 -01:4b84 _print_sl_data47 -01:4b87 _print_sl_out47 -01:4b8a __check_assert_ok6 -01:4b92 _print_sl_data48 -01:4b97 _print_sl_out48 -01:4b99 __check_assert_skip6 -01:4ba1 _print_sl_data49 -01:4ba9 _print_sl_out49 -01:4ba9 __check_assert_out6 -01:4bb5 _print_sl_data50 -01:4bb7 _print_sl_out50 -01:4bbf _print_sl_data51 -01:4bc2 _print_sl_out51 -01:4bcc __check_assert_fail7 -01:4bd7 _print_sl_data52 -01:4bda _print_sl_out52 -01:4bdd __check_assert_ok7 -01:4be5 _print_sl_data53 -01:4bea _print_sl_out53 -01:4bec __check_assert_skip7 -01:4bf4 _print_sl_data54 -01:4bfc _print_sl_out54 -01:4bfc __check_assert_out7 +00:0150 main 00:016b fail -00:017f _wait_ly_4 -00:0185 _wait_ly_5 -00:019b _print_results_halt_1 -00:019e _fail_cb -00:01a6 _print_sl_data55 -00:01b2 _print_sl_out55 -00:01c2 _print_sl_data56 -00:01ce _print_sl_out56 -00:01d8 _print_sl_data57 -00:01e4 _print_sl_out57 -00:01ef _print_sl_data58 -00:01f5 _print_sl_out58 -00:0208 _print_sl_data59 -00:0215 _print_sl_out59 -00:0225 _print_sl_data60 -00:0232 _print_sl_out60 -00:0242 _print_sl_data61 -00:024f _print_sl_out61 -00:025a c000_functions_start -00:025a run_test_suite -00:0284 _wait_ly_6 -00:028a _wait_ly_7 -00:02a0 _print_results_halt_2 -00:02a3 _test_ok_cb_0 -00:02ab _print_sl_data62 -00:02b3 _print_sl_out62 -00:02b6 run_tests -00:02c4 run_test_cases -00:02d2 test_case -00:02ef restore_mbc1 -00:02f8 switch_bank -00:0309 fetch_expected_value -00:0328 c000_functions_end -00:0328 expected_banks +00:0172 fail@quit_inline_1 +00:020b c000_functions_start +00:020b run_test_suite +00:0228 run_test_suite@quit_inline_2 +00:0239 run_tests +00:0247 run_test_cases +00:0255 test_case +00:0272 restore_mbc1 +00:027b switch_bank +00:028c fetch_expected_value +00:02ab c000_functions_end +00:02ab expected_banks + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000180 _sizeof_expected_banks +0000001b _sizeof_main +000000a0 _sizeof_fail +00000000 _sizeof_c000_functions_start +0000002e _sizeof_run_test_suite +0000000e _sizeof_run_tests +0000000e _sizeof_run_test_cases +0000001d _sizeof_test_case +00000009 _sizeof_restore_mbc1 +00000011 _sizeof_switch_bank +0000001f _sizeof_fetch_expected_value diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_1Mb/baseline_0000.png b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_1Mb/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_1Mb/test.gb b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_1Mb/test.gb index 9b638d49813c0fa0cb71abfb8fdac0f5e63dcf24..cbb4634e054545ecf03906660b1f5489d0b42c40 100644 GIT binary patch delta 591 zcmZ9IKWGzC9LL|gY7-l@J*462(7p>nT?`e4IHbqrl1rXVn~J8?(M38qSk$4W#=InT z5kcMT=As!K&e+94F4YeHc;DZj&+qYmKOSR2#)7Z% zxcu;giflO~;b(|P_r)vwVvd%*zFmNnV&S(}*{ySE~~laC8#v zbo6W{lR?U`56<;L+y`(E$n0F&B*rrx;K@{BJ~`u4pI7#I*l?|FbXBbKn62S|8DE68Pf7mT{aJ-;w{DZU910`X5;dN% zHN798VthJgdo0mo!0tNZDP0tQZL?--ib3t%$Pso`0en?t0^p9Ivt$46{GTTMHQg delta 1738 zcma)6U5Fc16uxJ&o6T-^yE~nAJFe25q^(4$vRWaw*qFb`PcyqIn=C0RRP;rx;)5V1 zwa)C14?-VA5Z0HqQfMCvrdp&eg*q50I}B3_1?_{Byy(LgZ3+vOK~vAYcV=kN2Zzk$ ze&0Fw`_8@R&KO3-Fd`S`K~Me?Bc}MO05^zpzZfGo#Y6}Uz;TRjA`;{U9HuXLZ+;#dE&&h z?#el33V!6V-LrT-yL(@uP|%4y3Aa7^MMfu)rc>Y^qr-F6ysD7yso9{M(J`xD=HiG;q|6N98{$b4?kP zc17i_q!l9u5T(_2v7i=rHNK80YqHP&jP>bbSU0tZrCeq)2`g9}ar9=`gu$*Y7R#O-1{)!9HZFvhFzF|Iqw z9PDGL2^G40K_w7nqY%{`K+Q25Ats4m%?a3I zIMBqZt=NPiLK?b5`1!U*dL%Ir56KU#qCM;E)$Cb0if_apGhtF49kx>Ar+XtW3D<|N z&&DkYvKrmOu%cwJ4Eh>90gFCW@F+<_6A9kabT2m>*2*01|HwHY@9W~_y--=D9Zo< diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_1Mb/test.sym b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_1Mb/test.sym index bfe04a18b..6c53eaf47 100644 --- a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_1Mb/test.sym +++ b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_1Mb/test.sym @@ -1,226 +1,69 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/rom_1Mb.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/rom_1Mb.gb". [labels] -01:4c00 print_load_font -01:4c0d print_string -01:4c17 print_a -01:4c21 print_newline -01:4c2c print_digit -01:4c39 print_regs -01:4c42 _print_sl_data0 -01:4c48 _print_sl_out0 -01:4c55 _print_sl_data1 -01:4c5b _print_sl_out1 -01:4c6d _print_sl_data2 -01:4c73 _print_sl_out2 -01:4c80 _print_sl_data3 -01:4c86 _print_sl_out3 -01:4c98 _print_sl_data4 -01:4c9e _print_sl_out4 -01:4cab _print_sl_data5 -01:4cb1 _print_sl_out5 -01:4cc3 _print_sl_data6 -01:4cc9 _print_sl_out6 -01:4cd6 _print_sl_data7 -01:4cdc _print_sl_out7 +01:48bc clear_vram +01:487b disable_lcd_safe +01:4881 disable_lcd_safe@wait_ly_0 +01:48d0 memcpy +01:48d9 memset +01:4899 print_hex4 +01:48c6 print_hex8 +01:48e9 print_inline_string +01:48a5 print_load_font +01:48b1 print_newline +01:48e2 print_string +01:47f1 quit +01:4806 quit@cb_return +01:480b quit@wait_ly_1 +01:4811 quit@wait_ly_2 +01:4817 quit@wait_ly_3 +01:481d quit@wait_ly_4 +01:4827 quit@success +01:484e quit@failure +01:4863 quit@halt +01:4864 quit@halt_execution_0 +01:4867 reset_screen +01:488a serial_send_byte 01:4001 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f1 memcpy -01:47fa memset -01:4803 memcmp -01:4811 clear_vram -01:481b clear_oam -01:4825 disable_lcd_safe -01:482b _wait_ly_0 -01:4831 _wait_ly_1 -01:483a reset_screen -01:484e process_results -01:4862 _wait_ly_2 -01:4868 _wait_ly_3 -01:487e _print_results_halt_0 -01:4881 _process_results_cb -01:488c _print_sl_data8 -01:4896 _print_sl_out8 -01:48b0 _print_sl_data9 -01:48bb _print_sl_out9 -01:48d3 _print_sl_data10 -01:48df _print_sl_out10 -01:48e0 dump_mem -01:48ff _dump_mem_line -01:4929 _check_asserts -01:4937 _print_sl_data11 -01:493a _print_sl_out11 -01:4946 _print_sl_data12 -01:4948 _print_sl_out12 -01:4950 _print_sl_data13 -01:4953 _print_sl_out13 -01:495d __check_assert_fail0 -01:4968 _print_sl_data14 -01:496b _print_sl_out14 -01:496e __check_assert_ok0 -01:4976 _print_sl_data15 -01:497b _print_sl_out15 -01:497d __check_assert_skip0 -01:4985 _print_sl_data16 -01:498d _print_sl_out16 -01:498d __check_assert_out0 -01:4999 _print_sl_data17 -01:499b _print_sl_out17 -01:49a3 _print_sl_data18 -01:49a6 _print_sl_out18 -01:49b0 __check_assert_fail1 -01:49bb _print_sl_data19 -01:49be _print_sl_out19 -01:49c1 __check_assert_ok1 -01:49c9 _print_sl_data20 -01:49ce _print_sl_out20 -01:49d0 __check_assert_skip1 -01:49d8 _print_sl_data21 -01:49e0 _print_sl_out21 -01:49e0 __check_assert_out1 -01:49eb _print_sl_data22 -01:49ee _print_sl_out22 -01:49fa _print_sl_data23 -01:49fc _print_sl_out23 -01:4a04 _print_sl_data24 -01:4a07 _print_sl_out24 -01:4a11 __check_assert_fail2 -01:4a1c _print_sl_data25 -01:4a1f _print_sl_out25 -01:4a22 __check_assert_ok2 -01:4a2a _print_sl_data26 -01:4a2f _print_sl_out26 -01:4a31 __check_assert_skip2 -01:4a39 _print_sl_data27 -01:4a41 _print_sl_out27 -01:4a41 __check_assert_out2 -01:4a4d _print_sl_data28 -01:4a4f _print_sl_out28 -01:4a57 _print_sl_data29 -01:4a5a _print_sl_out29 -01:4a64 __check_assert_fail3 -01:4a6f _print_sl_data30 -01:4a72 _print_sl_out30 -01:4a75 __check_assert_ok3 -01:4a7d _print_sl_data31 -01:4a82 _print_sl_out31 -01:4a84 __check_assert_skip3 -01:4a8c _print_sl_data32 -01:4a94 _print_sl_out32 -01:4a94 __check_assert_out3 -01:4a9f _print_sl_data33 -01:4aa2 _print_sl_out33 -01:4aae _print_sl_data34 -01:4ab0 _print_sl_out34 -01:4ab8 _print_sl_data35 -01:4abb _print_sl_out35 -01:4ac5 __check_assert_fail4 -01:4ad0 _print_sl_data36 -01:4ad3 _print_sl_out36 -01:4ad6 __check_assert_ok4 -01:4ade _print_sl_data37 -01:4ae3 _print_sl_out37 -01:4ae5 __check_assert_skip4 -01:4aed _print_sl_data38 -01:4af5 _print_sl_out38 -01:4af5 __check_assert_out4 -01:4b01 _print_sl_data39 -01:4b03 _print_sl_out39 -01:4b0b _print_sl_data40 -01:4b0e _print_sl_out40 -01:4b18 __check_assert_fail5 -01:4b23 _print_sl_data41 -01:4b26 _print_sl_out41 -01:4b29 __check_assert_ok5 -01:4b31 _print_sl_data42 -01:4b36 _print_sl_out42 -01:4b38 __check_assert_skip5 -01:4b40 _print_sl_data43 -01:4b48 _print_sl_out43 -01:4b48 __check_assert_out5 -01:4b53 _print_sl_data44 -01:4b56 _print_sl_out44 -01:4b62 _print_sl_data45 -01:4b64 _print_sl_out45 -01:4b6c _print_sl_data46 -01:4b6f _print_sl_out46 -01:4b79 __check_assert_fail6 -01:4b84 _print_sl_data47 -01:4b87 _print_sl_out47 -01:4b8a __check_assert_ok6 -01:4b92 _print_sl_data48 -01:4b97 _print_sl_out48 -01:4b99 __check_assert_skip6 -01:4ba1 _print_sl_data49 -01:4ba9 _print_sl_out49 -01:4ba9 __check_assert_out6 -01:4bb5 _print_sl_data50 -01:4bb7 _print_sl_out50 -01:4bbf _print_sl_data51 -01:4bc2 _print_sl_out51 -01:4bcc __check_assert_fail7 -01:4bd7 _print_sl_data52 -01:4bda _print_sl_out52 -01:4bdd __check_assert_ok7 -01:4be5 _print_sl_data53 -01:4bea _print_sl_out53 -01:4bec __check_assert_skip7 -01:4bf4 _print_sl_data54 -01:4bfc _print_sl_out54 -01:4bfc __check_assert_out7 +00:0150 main 00:016b fail -00:017f _wait_ly_4 -00:0185 _wait_ly_5 -00:019b _print_results_halt_1 -00:019e _fail_cb -00:01a6 _print_sl_data55 -00:01b2 _print_sl_out55 -00:01c2 _print_sl_data56 -00:01ce _print_sl_out56 -00:01d8 _print_sl_data57 -00:01e4 _print_sl_out57 -00:01ef _print_sl_data58 -00:01f5 _print_sl_out58 -00:0208 _print_sl_data59 -00:0215 _print_sl_out59 -00:0225 _print_sl_data60 -00:0232 _print_sl_out60 -00:0242 _print_sl_data61 -00:024f _print_sl_out61 -00:025a c000_functions_start -00:025a run_test_suite -00:0284 _wait_ly_6 -00:028a _wait_ly_7 -00:02a0 _print_results_halt_2 -00:02a3 _test_ok_cb_0 -00:02ab _print_sl_data62 -00:02b3 _print_sl_out62 -00:02b6 run_tests -00:02c4 run_test_cases -00:02d2 test_case -00:02ef restore_mbc1 -00:02f8 switch_bank -00:0309 fetch_expected_value -00:0328 c000_functions_end -00:0328 expected_banks +00:0172 fail@quit_inline_1 +00:020b c000_functions_start +00:020b run_test_suite +00:0228 run_test_suite@quit_inline_2 +00:0239 run_tests +00:0247 run_test_cases +00:0255 test_case +00:0272 restore_mbc1 +00:027b switch_bank +00:028c fetch_expected_value +00:02ab c000_functions_end +00:02ab expected_banks + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000180 _sizeof_expected_banks +0000001b _sizeof_main +000000a0 _sizeof_fail +00000000 _sizeof_c000_functions_start +0000002e _sizeof_run_test_suite +0000000e _sizeof_run_tests +0000000e _sizeof_run_test_cases +0000001d _sizeof_test_case +00000009 _sizeof_restore_mbc1 +00000011 _sizeof_switch_bank +0000001f _sizeof_fetch_expected_value diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_2Mb/baseline_0000.png b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_2Mb/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_2Mb/test.gb b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_2Mb/test.gb index 8a9ce00e7d82b68930e1a62d98514942c6e14a37..4ff7eb0853a90e1a7208bc28f8cd2ec7172a1e1d 100644 GIT binary patch delta 597 zcmZ9IO=uHA6vt;a+Gv9|i!>}fw6h_o7ehrM3hA=hWRtOJQ?V)a=tX+)U{Mb>HD;33 z3SQKky?N0bJjB?G2a%PfAxjv@)!QIgXb)wBO08)0ZK^%^nE(6uyY-sd61sc)leVueR74gbsd0<3*n^49Lp%3r^Ihs>JpdqhWh-eOEd<@ibU`qj&wK zvq<0py78GWQ@%j?3;4Zfj;jA|_uN$PG5G=hN#7sjg&H|E;5&XebY%3{$>C^NU*eDG zT~GnE47vv@f|OxhGa&wVbfo;M3qvGDR!o*OS?JnNk+I)VZ|eQl{=oKoM_{cir1}H` zBYV!~P;c;p)buyU!;TtcGS;!{w>z}BIkqzve{i!Caa6=GB6a&C{nn20HQKe;=u)FK q5pJsMbHd!JnRP;rx;)5V1 zwa)C11)&cj2n9DC}q=MqHz8_t0sqU&*1g!?)`;AK_~JA-1g`f7(I(LodSO_Iy_g+s|x9^Iy*FEX&@p{i?M8G zzM{-8&SljFj2k=-dw5WN<%pWAt9b=4(p~m~Ssu*f>WdkThIATT;?c>h)!HO)bXJ|$ z%@p_}=ZpSrI4k_GZMeXkB5WI~6*5VzR%gX|$4sT!A0op!Zg%$?FZB#%%fj;4O? z&T_H4(%4C+u5NUe(7b&NXjLg_uU~2k!-u|0-yhPCf4ec2kfQQ~29BDEsQf2ot}BDm zuBf~}U_p5H`Z@eZ28#`|RsjMz)jdR62)KVke#Yt5a-?rM|8&mHuP7 z`oG#P5))3BXj?`W)MB|-R~KruiS&1XKHZ3UB{>ThSxz)ltEmh1a&fSO~z<}S{An$I&7Xr>tqBx%t#o==PZ01e(`P$&_2myUFq zISipg%y(GjGdzdS844V}W-xHDPoU;y#t9mMANW*SbQmSaeaTy#_ayH!#3b>n8G|i` z15K>jipLBQ($F2k&$l(wBguh8NPb`y?HOmUX3xk`d?S9J4wLHWu$3A=(;InFxG{8N zCSggC)#w(66(xgZ(AVe*SoEoaM@bTzNbsJfd%4*l*YI<5{kdyCpAS+m_>|h8+V=TU ekot>HX^*B_4=?Q-czpk|ams*GhH%aZ8UFx7+$u`| diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_2Mb/test.sym b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_2Mb/test.sym index e96b0029f..a42de7f05 100644 --- a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_2Mb/test.sym +++ b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_2Mb/test.sym @@ -1,226 +1,69 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/rom_2Mb.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/rom_2Mb.gb". [labels] -01:4c00 print_load_font -01:4c0d print_string -01:4c17 print_a -01:4c21 print_newline -01:4c2c print_digit -01:4c39 print_regs -01:4c42 _print_sl_data0 -01:4c48 _print_sl_out0 -01:4c55 _print_sl_data1 -01:4c5b _print_sl_out1 -01:4c6d _print_sl_data2 -01:4c73 _print_sl_out2 -01:4c80 _print_sl_data3 -01:4c86 _print_sl_out3 -01:4c98 _print_sl_data4 -01:4c9e _print_sl_out4 -01:4cab _print_sl_data5 -01:4cb1 _print_sl_out5 -01:4cc3 _print_sl_data6 -01:4cc9 _print_sl_out6 -01:4cd6 _print_sl_data7 -01:4cdc _print_sl_out7 +01:48bc clear_vram +01:487b disable_lcd_safe +01:4881 disable_lcd_safe@wait_ly_0 +01:48d0 memcpy +01:48d9 memset +01:4899 print_hex4 +01:48c6 print_hex8 +01:48e9 print_inline_string +01:48a5 print_load_font +01:48b1 print_newline +01:48e2 print_string +01:47f1 quit +01:4806 quit@cb_return +01:480b quit@wait_ly_1 +01:4811 quit@wait_ly_2 +01:4817 quit@wait_ly_3 +01:481d quit@wait_ly_4 +01:4827 quit@success +01:484e quit@failure +01:4863 quit@halt +01:4864 quit@halt_execution_0 +01:4867 reset_screen +01:488a serial_send_byte 01:4001 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f1 memcpy -01:47fa memset -01:4803 memcmp -01:4811 clear_vram -01:481b clear_oam -01:4825 disable_lcd_safe -01:482b _wait_ly_0 -01:4831 _wait_ly_1 -01:483a reset_screen -01:484e process_results -01:4862 _wait_ly_2 -01:4868 _wait_ly_3 -01:487e _print_results_halt_0 -01:4881 _process_results_cb -01:488c _print_sl_data8 -01:4896 _print_sl_out8 -01:48b0 _print_sl_data9 -01:48bb _print_sl_out9 -01:48d3 _print_sl_data10 -01:48df _print_sl_out10 -01:48e0 dump_mem -01:48ff _dump_mem_line -01:4929 _check_asserts -01:4937 _print_sl_data11 -01:493a _print_sl_out11 -01:4946 _print_sl_data12 -01:4948 _print_sl_out12 -01:4950 _print_sl_data13 -01:4953 _print_sl_out13 -01:495d __check_assert_fail0 -01:4968 _print_sl_data14 -01:496b _print_sl_out14 -01:496e __check_assert_ok0 -01:4976 _print_sl_data15 -01:497b _print_sl_out15 -01:497d __check_assert_skip0 -01:4985 _print_sl_data16 -01:498d _print_sl_out16 -01:498d __check_assert_out0 -01:4999 _print_sl_data17 -01:499b _print_sl_out17 -01:49a3 _print_sl_data18 -01:49a6 _print_sl_out18 -01:49b0 __check_assert_fail1 -01:49bb _print_sl_data19 -01:49be _print_sl_out19 -01:49c1 __check_assert_ok1 -01:49c9 _print_sl_data20 -01:49ce _print_sl_out20 -01:49d0 __check_assert_skip1 -01:49d8 _print_sl_data21 -01:49e0 _print_sl_out21 -01:49e0 __check_assert_out1 -01:49eb _print_sl_data22 -01:49ee _print_sl_out22 -01:49fa _print_sl_data23 -01:49fc _print_sl_out23 -01:4a04 _print_sl_data24 -01:4a07 _print_sl_out24 -01:4a11 __check_assert_fail2 -01:4a1c _print_sl_data25 -01:4a1f _print_sl_out25 -01:4a22 __check_assert_ok2 -01:4a2a _print_sl_data26 -01:4a2f _print_sl_out26 -01:4a31 __check_assert_skip2 -01:4a39 _print_sl_data27 -01:4a41 _print_sl_out27 -01:4a41 __check_assert_out2 -01:4a4d _print_sl_data28 -01:4a4f _print_sl_out28 -01:4a57 _print_sl_data29 -01:4a5a _print_sl_out29 -01:4a64 __check_assert_fail3 -01:4a6f _print_sl_data30 -01:4a72 _print_sl_out30 -01:4a75 __check_assert_ok3 -01:4a7d _print_sl_data31 -01:4a82 _print_sl_out31 -01:4a84 __check_assert_skip3 -01:4a8c _print_sl_data32 -01:4a94 _print_sl_out32 -01:4a94 __check_assert_out3 -01:4a9f _print_sl_data33 -01:4aa2 _print_sl_out33 -01:4aae _print_sl_data34 -01:4ab0 _print_sl_out34 -01:4ab8 _print_sl_data35 -01:4abb _print_sl_out35 -01:4ac5 __check_assert_fail4 -01:4ad0 _print_sl_data36 -01:4ad3 _print_sl_out36 -01:4ad6 __check_assert_ok4 -01:4ade _print_sl_data37 -01:4ae3 _print_sl_out37 -01:4ae5 __check_assert_skip4 -01:4aed _print_sl_data38 -01:4af5 _print_sl_out38 -01:4af5 __check_assert_out4 -01:4b01 _print_sl_data39 -01:4b03 _print_sl_out39 -01:4b0b _print_sl_data40 -01:4b0e _print_sl_out40 -01:4b18 __check_assert_fail5 -01:4b23 _print_sl_data41 -01:4b26 _print_sl_out41 -01:4b29 __check_assert_ok5 -01:4b31 _print_sl_data42 -01:4b36 _print_sl_out42 -01:4b38 __check_assert_skip5 -01:4b40 _print_sl_data43 -01:4b48 _print_sl_out43 -01:4b48 __check_assert_out5 -01:4b53 _print_sl_data44 -01:4b56 _print_sl_out44 -01:4b62 _print_sl_data45 -01:4b64 _print_sl_out45 -01:4b6c _print_sl_data46 -01:4b6f _print_sl_out46 -01:4b79 __check_assert_fail6 -01:4b84 _print_sl_data47 -01:4b87 _print_sl_out47 -01:4b8a __check_assert_ok6 -01:4b92 _print_sl_data48 -01:4b97 _print_sl_out48 -01:4b99 __check_assert_skip6 -01:4ba1 _print_sl_data49 -01:4ba9 _print_sl_out49 -01:4ba9 __check_assert_out6 -01:4bb5 _print_sl_data50 -01:4bb7 _print_sl_out50 -01:4bbf _print_sl_data51 -01:4bc2 _print_sl_out51 -01:4bcc __check_assert_fail7 -01:4bd7 _print_sl_data52 -01:4bda _print_sl_out52 -01:4bdd __check_assert_ok7 -01:4be5 _print_sl_data53 -01:4bea _print_sl_out53 -01:4bec __check_assert_skip7 -01:4bf4 _print_sl_data54 -01:4bfc _print_sl_out54 -01:4bfc __check_assert_out7 +00:0150 main 00:016b fail -00:017f _wait_ly_4 -00:0185 _wait_ly_5 -00:019b _print_results_halt_1 -00:019e _fail_cb -00:01a6 _print_sl_data55 -00:01b2 _print_sl_out55 -00:01c2 _print_sl_data56 -00:01ce _print_sl_out56 -00:01d8 _print_sl_data57 -00:01e4 _print_sl_out57 -00:01ef _print_sl_data58 -00:01f5 _print_sl_out58 -00:0208 _print_sl_data59 -00:0215 _print_sl_out59 -00:0225 _print_sl_data60 -00:0232 _print_sl_out60 -00:0242 _print_sl_data61 -00:024f _print_sl_out61 -00:025a c000_functions_start -00:025a run_test_suite -00:0284 _wait_ly_6 -00:028a _wait_ly_7 -00:02a0 _print_results_halt_2 -00:02a3 _test_ok_cb_0 -00:02ab _print_sl_data62 -00:02b3 _print_sl_out62 -00:02b6 run_tests -00:02c4 run_test_cases -00:02d2 test_case -00:02ef restore_mbc1 -00:02f8 switch_bank -00:0309 fetch_expected_value -00:0328 c000_functions_end -00:0328 expected_banks +00:0172 fail@quit_inline_1 +00:020b c000_functions_start +00:020b run_test_suite +00:0228 run_test_suite@quit_inline_2 +00:0239 run_tests +00:0247 run_test_cases +00:0255 test_case +00:0272 restore_mbc1 +00:027b switch_bank +00:028c fetch_expected_value +00:02ab c000_functions_end +00:02ab expected_banks + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000180 _sizeof_expected_banks +0000001b _sizeof_main +000000a0 _sizeof_fail +00000000 _sizeof_c000_functions_start +0000002e _sizeof_run_test_suite +0000000e _sizeof_run_tests +0000000e _sizeof_run_test_cases +0000001d _sizeof_test_case +00000009 _sizeof_restore_mbc1 +00000011 _sizeof_switch_bank +0000001f _sizeof_fetch_expected_value diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_4Mb/baseline_0000.png b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_4Mb/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_4Mb/test.gb b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_4Mb/test.gb index f51f7dbb0d7135e60518d524b7e231ea517b87ee..98d0276960ef0a9e1d29101d6cd5235b8937bd9f 100644 GIT binary patch delta 609 zcmZ9IO=uHA6vt;aZKDm^F4C~{(9VXSUJMn5cu1Gc$0lRbrlKkJ=tX+)U{Mb>ZOkO8 zd+?&(?9Gej;339dJcw*r8nT3eT)ho~g?f+;Rcb|}Z&U5T$Nb;N?+x=F!x&+Vyw2g$ z+LnqeIUwQZh!m+;5M9<{?|5K;7(z_4b=*nB<4nE#eU03rTHHsYM(H=`{@fks%)EB{LV+k7Z3jErgENGWuzMeFKG;6%DwdJ$wxgwit}m7TW4Zdj z+8!kaoG!7p3@@m~a;>f|)L0YQ?;v|RVdHXg7B2FfNTya(7wYBeyqEMuxp_Ici*@%$ zo-%NN%&n+#YHO$Q!B&hnLl=jVtT{2G;p{YyHL-&y@t(pv=0uId$uTzN*XiDbatB4_ z+k6#xJ~tXz$uXEMvs!)FeJhuI5eghi83IQ|;E+NbFsjb5@m(^CqVT5R;|iIOr*(Lr z!$7ry3i3F7#9^47D7=VOLCw!OClv^s6?2&;LCqmo^LxPyO)xp~ByVx(NwS@}Bl7Xo z603#|4#!fKfd2?z4s-CK!-(tfsNnk!Pjcir9OTe*uwFsQInGHr0u3>hNlGXgaV6hH zUdOHLYo6k1p5|!|Jxx~i7ea__%NywM6^Bxuz!ec-4gqx7;X2$DeBa!$IsIcWrDuD*I`x6=sSGMk>~Iwhn|CV5;ec&oTL%>K}=;u2T^j&mHb)oeaT-q;*$8)9EWX= zJx#3IjE~bOq@f$a&$l_;BT0Y4C*L!R){MPhvu5N7z7fAq2T65g$V`o$=?y. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/rom_4Mb.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/rom_4Mb.gb". [labels] -01:4c00 print_load_font -01:4c0d print_string -01:4c17 print_a -01:4c21 print_newline -01:4c2c print_digit -01:4c39 print_regs -01:4c42 _print_sl_data0 -01:4c48 _print_sl_out0 -01:4c55 _print_sl_data1 -01:4c5b _print_sl_out1 -01:4c6d _print_sl_data2 -01:4c73 _print_sl_out2 -01:4c80 _print_sl_data3 -01:4c86 _print_sl_out3 -01:4c98 _print_sl_data4 -01:4c9e _print_sl_out4 -01:4cab _print_sl_data5 -01:4cb1 _print_sl_out5 -01:4cc3 _print_sl_data6 -01:4cc9 _print_sl_out6 -01:4cd6 _print_sl_data7 -01:4cdc _print_sl_out7 +01:48bc clear_vram +01:487b disable_lcd_safe +01:4881 disable_lcd_safe@wait_ly_0 +01:48d0 memcpy +01:48d9 memset +01:4899 print_hex4 +01:48c6 print_hex8 +01:48e9 print_inline_string +01:48a5 print_load_font +01:48b1 print_newline +01:48e2 print_string +01:47f1 quit +01:4806 quit@cb_return +01:480b quit@wait_ly_1 +01:4811 quit@wait_ly_2 +01:4817 quit@wait_ly_3 +01:481d quit@wait_ly_4 +01:4827 quit@success +01:484e quit@failure +01:4863 quit@halt +01:4864 quit@halt_execution_0 +01:4867 reset_screen +01:488a serial_send_byte 01:4001 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f1 memcpy -01:47fa memset -01:4803 memcmp -01:4811 clear_vram -01:481b clear_oam -01:4825 disable_lcd_safe -01:482b _wait_ly_0 -01:4831 _wait_ly_1 -01:483a reset_screen -01:484e process_results -01:4862 _wait_ly_2 -01:4868 _wait_ly_3 -01:487e _print_results_halt_0 -01:4881 _process_results_cb -01:488c _print_sl_data8 -01:4896 _print_sl_out8 -01:48b0 _print_sl_data9 -01:48bb _print_sl_out9 -01:48d3 _print_sl_data10 -01:48df _print_sl_out10 -01:48e0 dump_mem -01:48ff _dump_mem_line -01:4929 _check_asserts -01:4937 _print_sl_data11 -01:493a _print_sl_out11 -01:4946 _print_sl_data12 -01:4948 _print_sl_out12 -01:4950 _print_sl_data13 -01:4953 _print_sl_out13 -01:495d __check_assert_fail0 -01:4968 _print_sl_data14 -01:496b _print_sl_out14 -01:496e __check_assert_ok0 -01:4976 _print_sl_data15 -01:497b _print_sl_out15 -01:497d __check_assert_skip0 -01:4985 _print_sl_data16 -01:498d _print_sl_out16 -01:498d __check_assert_out0 -01:4999 _print_sl_data17 -01:499b _print_sl_out17 -01:49a3 _print_sl_data18 -01:49a6 _print_sl_out18 -01:49b0 __check_assert_fail1 -01:49bb _print_sl_data19 -01:49be _print_sl_out19 -01:49c1 __check_assert_ok1 -01:49c9 _print_sl_data20 -01:49ce _print_sl_out20 -01:49d0 __check_assert_skip1 -01:49d8 _print_sl_data21 -01:49e0 _print_sl_out21 -01:49e0 __check_assert_out1 -01:49eb _print_sl_data22 -01:49ee _print_sl_out22 -01:49fa _print_sl_data23 -01:49fc _print_sl_out23 -01:4a04 _print_sl_data24 -01:4a07 _print_sl_out24 -01:4a11 __check_assert_fail2 -01:4a1c _print_sl_data25 -01:4a1f _print_sl_out25 -01:4a22 __check_assert_ok2 -01:4a2a _print_sl_data26 -01:4a2f _print_sl_out26 -01:4a31 __check_assert_skip2 -01:4a39 _print_sl_data27 -01:4a41 _print_sl_out27 -01:4a41 __check_assert_out2 -01:4a4d _print_sl_data28 -01:4a4f _print_sl_out28 -01:4a57 _print_sl_data29 -01:4a5a _print_sl_out29 -01:4a64 __check_assert_fail3 -01:4a6f _print_sl_data30 -01:4a72 _print_sl_out30 -01:4a75 __check_assert_ok3 -01:4a7d _print_sl_data31 -01:4a82 _print_sl_out31 -01:4a84 __check_assert_skip3 -01:4a8c _print_sl_data32 -01:4a94 _print_sl_out32 -01:4a94 __check_assert_out3 -01:4a9f _print_sl_data33 -01:4aa2 _print_sl_out33 -01:4aae _print_sl_data34 -01:4ab0 _print_sl_out34 -01:4ab8 _print_sl_data35 -01:4abb _print_sl_out35 -01:4ac5 __check_assert_fail4 -01:4ad0 _print_sl_data36 -01:4ad3 _print_sl_out36 -01:4ad6 __check_assert_ok4 -01:4ade _print_sl_data37 -01:4ae3 _print_sl_out37 -01:4ae5 __check_assert_skip4 -01:4aed _print_sl_data38 -01:4af5 _print_sl_out38 -01:4af5 __check_assert_out4 -01:4b01 _print_sl_data39 -01:4b03 _print_sl_out39 -01:4b0b _print_sl_data40 -01:4b0e _print_sl_out40 -01:4b18 __check_assert_fail5 -01:4b23 _print_sl_data41 -01:4b26 _print_sl_out41 -01:4b29 __check_assert_ok5 -01:4b31 _print_sl_data42 -01:4b36 _print_sl_out42 -01:4b38 __check_assert_skip5 -01:4b40 _print_sl_data43 -01:4b48 _print_sl_out43 -01:4b48 __check_assert_out5 -01:4b53 _print_sl_data44 -01:4b56 _print_sl_out44 -01:4b62 _print_sl_data45 -01:4b64 _print_sl_out45 -01:4b6c _print_sl_data46 -01:4b6f _print_sl_out46 -01:4b79 __check_assert_fail6 -01:4b84 _print_sl_data47 -01:4b87 _print_sl_out47 -01:4b8a __check_assert_ok6 -01:4b92 _print_sl_data48 -01:4b97 _print_sl_out48 -01:4b99 __check_assert_skip6 -01:4ba1 _print_sl_data49 -01:4ba9 _print_sl_out49 -01:4ba9 __check_assert_out6 -01:4bb5 _print_sl_data50 -01:4bb7 _print_sl_out50 -01:4bbf _print_sl_data51 -01:4bc2 _print_sl_out51 -01:4bcc __check_assert_fail7 -01:4bd7 _print_sl_data52 -01:4bda _print_sl_out52 -01:4bdd __check_assert_ok7 -01:4be5 _print_sl_data53 -01:4bea _print_sl_out53 -01:4bec __check_assert_skip7 -01:4bf4 _print_sl_data54 -01:4bfc _print_sl_out54 -01:4bfc __check_assert_out7 +00:0150 main 00:016b fail -00:017f _wait_ly_4 -00:0185 _wait_ly_5 -00:019b _print_results_halt_1 -00:019e _fail_cb -00:01a6 _print_sl_data55 -00:01b2 _print_sl_out55 -00:01c2 _print_sl_data56 -00:01ce _print_sl_out56 -00:01d8 _print_sl_data57 -00:01e4 _print_sl_out57 -00:01ef _print_sl_data58 -00:01f5 _print_sl_out58 -00:0208 _print_sl_data59 -00:0215 _print_sl_out59 -00:0225 _print_sl_data60 -00:0232 _print_sl_out60 -00:0242 _print_sl_data61 -00:024f _print_sl_out61 -00:025a c000_functions_start -00:025a run_test_suite -00:0284 _wait_ly_6 -00:028a _wait_ly_7 -00:02a0 _print_results_halt_2 -00:02a3 _test_ok_cb_0 -00:02ab _print_sl_data62 -00:02b3 _print_sl_out62 -00:02b6 run_tests -00:02c4 run_test_cases -00:02d2 test_case -00:02ef restore_mbc1 -00:02f8 switch_bank -00:0309 fetch_expected_value -00:0328 c000_functions_end -00:0328 expected_banks +00:0172 fail@quit_inline_1 +00:020b c000_functions_start +00:020b run_test_suite +00:0228 run_test_suite@quit_inline_2 +00:0239 run_tests +00:0247 run_test_cases +00:0255 test_case +00:0272 restore_mbc1 +00:027b switch_bank +00:028c fetch_expected_value +00:02ab c000_functions_end +00:02ab expected_banks + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000180 _sizeof_expected_banks +0000001b _sizeof_main +000000a0 _sizeof_fail +00000000 _sizeof_c000_functions_start +0000002e _sizeof_run_test_suite +0000000e _sizeof_run_tests +0000000e _sizeof_run_test_cases +0000001d _sizeof_test_case +00000009 _sizeof_restore_mbc1 +00000011 _sizeof_switch_bank +0000001f _sizeof_fetch_expected_value diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_512Kb/baseline_0000.png b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_512Kb/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_512Kb/test.gb b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_512Kb/test.gb index 6ad98dafc8c739a461b75c4fd4bcd44c3c28d851..748726c8babf2793a442aba6b85210e4ae9dc612 100644 GIT binary patch delta 588 zcmZ9IO=uHA6vt<_vC#%?7im~}XlIw8UJMn5cu1Gc$0lRbrlKkJ=tX+)U{Mb>HD=P( ziRA--Z1YmjD;8ry(r@9 z`fC;0azw&U5bshIb>-(0W*Bk@*I{ugOMOgckA3B&WS^0*E^M&`1+Up+HSg6I#?jcTwy42#&UNh1(Xq3%xhox+dNfjbY4pO? zGf3b;y7iH-P`*g{Gx)v7u4?@5^u26mCew}S7^Rurwz5is6!V@hG9yfpnWRyq7NyyTL@GJ-Foi5GeZ}BaM+o> z-*?XazH{%nGrAtu_3*g`(B`fth#|fvz;$BZFD1wgF%<$GaNHq=y{Bx?m2ILX)k8|Yp%i4iNcV&n%<*70-&o43G^Ek!GLKH?%=RXE(^<9O zFw)?U>@WMb;k59-w&5&uin48}RmmhV+s=ypu942LKSa8H)adTjU+(GhmWk!B8~A7& z&WTcYrMZ(#UD|M#(Y$j6XjN(Gte5V_rPv7 z`&ZjVV!+8VZOibYQmWJ&%3_^1k^c76ryDgcre@(B%ZX*{b!D+psVxLaPghzOQ#)vP zZ?crW17vQB#_`SV#>bm+)(njwO0wq0ji$TZINZVx9>aSI@3<=(2U25n%J0*?3Hc6+ zO1If6@O-wLSjl0St_;TeVkhy4r&4%X`^InOvDPoT-CQb_?NW4`1E z$ZNQDp5}3u7HFPiFwmq`f6ayHw!DoF-!mu_2wdU;>M(!~+kA%`oc9cFGZYy7L7^rE z4%QLWgeqOWpb&_$QHW}WQFGMS+{JlM^Ld5>%?yKqBrUqm^J&o^qQP4X3S|QC(UB%G zhe320_Z?RG4A0>Uh60Cg7z`Y&W2kw7ae_+VXFin{9YM)4U-DPZdy>B~#3b>nISyM4 z2bx&5nHbka$Ut`xKi}qXkEFuMko3STSu^%t)tZrF_(t5Fj*!~OkeMDk)f;|ExHfog zCTYeYr_wEq$Z{6Tps&#ru;f!kkBZ09Bo6PZnwOgka&. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/rom_512Kb.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/rom_512Kb.gb". [labels] -01:4c00 print_load_font -01:4c0d print_string -01:4c17 print_a -01:4c21 print_newline -01:4c2c print_digit -01:4c39 print_regs -01:4c42 _print_sl_data0 -01:4c48 _print_sl_out0 -01:4c55 _print_sl_data1 -01:4c5b _print_sl_out1 -01:4c6d _print_sl_data2 -01:4c73 _print_sl_out2 -01:4c80 _print_sl_data3 -01:4c86 _print_sl_out3 -01:4c98 _print_sl_data4 -01:4c9e _print_sl_out4 -01:4cab _print_sl_data5 -01:4cb1 _print_sl_out5 -01:4cc3 _print_sl_data6 -01:4cc9 _print_sl_out6 -01:4cd6 _print_sl_data7 -01:4cdc _print_sl_out7 +01:48bc clear_vram +01:487b disable_lcd_safe +01:4881 disable_lcd_safe@wait_ly_0 +01:48d0 memcpy +01:48d9 memset +01:4899 print_hex4 +01:48c6 print_hex8 +01:48e9 print_inline_string +01:48a5 print_load_font +01:48b1 print_newline +01:48e2 print_string +01:47f1 quit +01:4806 quit@cb_return +01:480b quit@wait_ly_1 +01:4811 quit@wait_ly_2 +01:4817 quit@wait_ly_3 +01:481d quit@wait_ly_4 +01:4827 quit@success +01:484e quit@failure +01:4863 quit@halt +01:4864 quit@halt_execution_0 +01:4867 reset_screen +01:488a serial_send_byte 01:4001 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f1 memcpy -01:47fa memset -01:4803 memcmp -01:4811 clear_vram -01:481b clear_oam -01:4825 disable_lcd_safe -01:482b _wait_ly_0 -01:4831 _wait_ly_1 -01:483a reset_screen -01:484e process_results -01:4862 _wait_ly_2 -01:4868 _wait_ly_3 -01:487e _print_results_halt_0 -01:4881 _process_results_cb -01:488c _print_sl_data8 -01:4896 _print_sl_out8 -01:48b0 _print_sl_data9 -01:48bb _print_sl_out9 -01:48d3 _print_sl_data10 -01:48df _print_sl_out10 -01:48e0 dump_mem -01:48ff _dump_mem_line -01:4929 _check_asserts -01:4937 _print_sl_data11 -01:493a _print_sl_out11 -01:4946 _print_sl_data12 -01:4948 _print_sl_out12 -01:4950 _print_sl_data13 -01:4953 _print_sl_out13 -01:495d __check_assert_fail0 -01:4968 _print_sl_data14 -01:496b _print_sl_out14 -01:496e __check_assert_ok0 -01:4976 _print_sl_data15 -01:497b _print_sl_out15 -01:497d __check_assert_skip0 -01:4985 _print_sl_data16 -01:498d _print_sl_out16 -01:498d __check_assert_out0 -01:4999 _print_sl_data17 -01:499b _print_sl_out17 -01:49a3 _print_sl_data18 -01:49a6 _print_sl_out18 -01:49b0 __check_assert_fail1 -01:49bb _print_sl_data19 -01:49be _print_sl_out19 -01:49c1 __check_assert_ok1 -01:49c9 _print_sl_data20 -01:49ce _print_sl_out20 -01:49d0 __check_assert_skip1 -01:49d8 _print_sl_data21 -01:49e0 _print_sl_out21 -01:49e0 __check_assert_out1 -01:49eb _print_sl_data22 -01:49ee _print_sl_out22 -01:49fa _print_sl_data23 -01:49fc _print_sl_out23 -01:4a04 _print_sl_data24 -01:4a07 _print_sl_out24 -01:4a11 __check_assert_fail2 -01:4a1c _print_sl_data25 -01:4a1f _print_sl_out25 -01:4a22 __check_assert_ok2 -01:4a2a _print_sl_data26 -01:4a2f _print_sl_out26 -01:4a31 __check_assert_skip2 -01:4a39 _print_sl_data27 -01:4a41 _print_sl_out27 -01:4a41 __check_assert_out2 -01:4a4d _print_sl_data28 -01:4a4f _print_sl_out28 -01:4a57 _print_sl_data29 -01:4a5a _print_sl_out29 -01:4a64 __check_assert_fail3 -01:4a6f _print_sl_data30 -01:4a72 _print_sl_out30 -01:4a75 __check_assert_ok3 -01:4a7d _print_sl_data31 -01:4a82 _print_sl_out31 -01:4a84 __check_assert_skip3 -01:4a8c _print_sl_data32 -01:4a94 _print_sl_out32 -01:4a94 __check_assert_out3 -01:4a9f _print_sl_data33 -01:4aa2 _print_sl_out33 -01:4aae _print_sl_data34 -01:4ab0 _print_sl_out34 -01:4ab8 _print_sl_data35 -01:4abb _print_sl_out35 -01:4ac5 __check_assert_fail4 -01:4ad0 _print_sl_data36 -01:4ad3 _print_sl_out36 -01:4ad6 __check_assert_ok4 -01:4ade _print_sl_data37 -01:4ae3 _print_sl_out37 -01:4ae5 __check_assert_skip4 -01:4aed _print_sl_data38 -01:4af5 _print_sl_out38 -01:4af5 __check_assert_out4 -01:4b01 _print_sl_data39 -01:4b03 _print_sl_out39 -01:4b0b _print_sl_data40 -01:4b0e _print_sl_out40 -01:4b18 __check_assert_fail5 -01:4b23 _print_sl_data41 -01:4b26 _print_sl_out41 -01:4b29 __check_assert_ok5 -01:4b31 _print_sl_data42 -01:4b36 _print_sl_out42 -01:4b38 __check_assert_skip5 -01:4b40 _print_sl_data43 -01:4b48 _print_sl_out43 -01:4b48 __check_assert_out5 -01:4b53 _print_sl_data44 -01:4b56 _print_sl_out44 -01:4b62 _print_sl_data45 -01:4b64 _print_sl_out45 -01:4b6c _print_sl_data46 -01:4b6f _print_sl_out46 -01:4b79 __check_assert_fail6 -01:4b84 _print_sl_data47 -01:4b87 _print_sl_out47 -01:4b8a __check_assert_ok6 -01:4b92 _print_sl_data48 -01:4b97 _print_sl_out48 -01:4b99 __check_assert_skip6 -01:4ba1 _print_sl_data49 -01:4ba9 _print_sl_out49 -01:4ba9 __check_assert_out6 -01:4bb5 _print_sl_data50 -01:4bb7 _print_sl_out50 -01:4bbf _print_sl_data51 -01:4bc2 _print_sl_out51 -01:4bcc __check_assert_fail7 -01:4bd7 _print_sl_data52 -01:4bda _print_sl_out52 -01:4bdd __check_assert_ok7 -01:4be5 _print_sl_data53 -01:4bea _print_sl_out53 -01:4bec __check_assert_skip7 -01:4bf4 _print_sl_data54 -01:4bfc _print_sl_out54 -01:4bfc __check_assert_out7 +00:0150 main 00:016b fail -00:017f _wait_ly_4 -00:0185 _wait_ly_5 -00:019b _print_results_halt_1 -00:019e _fail_cb -00:01a6 _print_sl_data55 -00:01b2 _print_sl_out55 -00:01c2 _print_sl_data56 -00:01ce _print_sl_out56 -00:01d8 _print_sl_data57 -00:01e4 _print_sl_out57 -00:01ef _print_sl_data58 -00:01f5 _print_sl_out58 -00:0208 _print_sl_data59 -00:0215 _print_sl_out59 -00:0225 _print_sl_data60 -00:0232 _print_sl_out60 -00:0242 _print_sl_data61 -00:024f _print_sl_out61 -00:025a c000_functions_start -00:025a run_test_suite -00:0284 _wait_ly_6 -00:028a _wait_ly_7 -00:02a0 _print_results_halt_2 -00:02a3 _test_ok_cb_0 -00:02ab _print_sl_data62 -00:02b3 _print_sl_out62 -00:02b6 run_tests -00:02c4 run_test_cases -00:02d2 test_case -00:02ef restore_mbc1 -00:02f8 switch_bank -00:0309 fetch_expected_value -00:0328 c000_functions_end -00:0328 expected_banks +00:0172 fail@quit_inline_1 +00:020b c000_functions_start +00:020b run_test_suite +00:0228 run_test_suite@quit_inline_2 +00:0239 run_tests +00:0247 run_test_cases +00:0255 test_case +00:0272 restore_mbc1 +00:027b switch_bank +00:028c fetch_expected_value +00:02ab c000_functions_end +00:02ab expected_banks + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000180 _sizeof_expected_banks +0000001b _sizeof_main +000000a0 _sizeof_fail +00000000 _sizeof_c000_functions_start +0000002e _sizeof_run_test_suite +0000000e _sizeof_run_tests +0000000e _sizeof_run_test_cases +0000001d _sizeof_test_case +00000009 _sizeof_restore_mbc1 +00000011 _sizeof_switch_bank +0000001f _sizeof_fetch_expected_value diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_8Mb/baseline_0000.png b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_8Mb/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_8Mb/test.gb b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_8Mb/test.gb index a7a41958e3b5231fee5004ec061346591f6d8230..3cdacce6a91ed004ce01efcadb37bd568e93a8af 100644 GIT binary patch delta 637 zcmZ9IO-vI(6vt<_&_XMe#?UkzVB0k6#Rh{39?E9>vF%7dFj|5~FNT8$33|X{?Q4s3 z@S@)2=0$t(P=SjFW7ceFx@jhboG)eI5xvMXW=DsN;JfVZb6ckp3mOij8iX?URCbr68wb7qeOtu`OcN>atJZ@U*bA z;h9t_g#un1obQ8K8;E;?5w5yl2L_tf+ z!jM%x=CMR!F_yKd%_~RTA2%DH&^5lnBD#YAWo%ijeMYj^?$0V*zja$)$RIy58@$G% zx}x@jsDRB!bPJ+AkiVK@ixp9@iq5NPtF|kInXqT#_nw$R^>@2xC3_F$AHqNC`{TS=mrpw#ql5mT$&pjzk&wE^ z9*{diMWJ<}yFw+Qz__Z!Mf~rmDDbPn<2=DLe7>ysxT^f*Y2!7qr`~HF4Q#(LIaVrM zYRn;F@}ars?YS>VO;>X|WCq8;hgEF3j1DR7O?{q<-oM!in?VE^$qnN@`PQCgo1|-O zlC`bYMCha^aIhq@V#pKt?sn8$p}^r=_JQo0JKd~zW;-VhRDlAfAW?8o7@#mn!AZeI WVTi&o1vdo`g%cD;D2zS_FZ=-y+Z(+A delta 1780 zcma)6U5Fc16uxJ&$!7DjyJ^<#xN3K@Z6!*Tl?rQ%jrp7WG_#ws$r4eaqAy|<9|S3> zb?*K+AoM{5VSQOEh4!Ifszq86>d-*hAxtRKb` zyx;0|vb~R#E3?m*MegM1+fXi%Nn$nHtM;2_BFX;{QTwFXIY6K9QDw)%@;6L;G|cu& zzO!1}L#D27wwKYoc>-8f321Iyu1h0FzE0j9)=z%5IW-dv%J*tGs?P-FKN)jP@kaLs z<()YzMko-a(d=SJdvKQU5q9r`%?I1px`t(>+nIK$eKZkiCli0Q^UX+MpzF(p|5&d6 zueL{s31uHU>8pMy(0Czz^K)WvGCyx=B1QLJBy?`GZo zfu{@{AZt5fp5ESNzP}yi&Ctc6Bh-*8US2z)Q5vZ8$`Ip#?IB>2AM&m3_{{A!NF z4#%!0R&B+`X#|qc8OG1I73h)p(2PgEXXRV7_5rOmD+lq7_-)!p%ApY}F?O~Wcuu-8 zd}DUTib7grTj*1i6qdnWqeo!Lp>lmH8by;Ryshc|+_alZo!rb|?z+Qg-PDT?r4FVx z9lqeE{^(HJgQ?d2%YPIeKDa^+3I>%7>M`h$LA?g`8Fbj7euIt}G+@x6K|=-&8+7zM H9i#sMbm2Jc diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_8Mb/test.sym b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_8Mb/test.sym index 9217d7990..6f9af044c 100644 --- a/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_8Mb/test.sym +++ b/cinema/gb/mooneye-gb/emulator-only/mbc1/rom_8Mb/test.sym @@ -1,226 +1,69 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/rom_8Mb.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/emulator-only/mbc1/rom_8Mb.gb". [labels] -01:4c00 print_load_font -01:4c0d print_string -01:4c17 print_a -01:4c21 print_newline -01:4c2c print_digit -01:4c39 print_regs -01:4c42 _print_sl_data0 -01:4c48 _print_sl_out0 -01:4c55 _print_sl_data1 -01:4c5b _print_sl_out1 -01:4c6d _print_sl_data2 -01:4c73 _print_sl_out2 -01:4c80 _print_sl_data3 -01:4c86 _print_sl_out3 -01:4c98 _print_sl_data4 -01:4c9e _print_sl_out4 -01:4cab _print_sl_data5 -01:4cb1 _print_sl_out5 -01:4cc3 _print_sl_data6 -01:4cc9 _print_sl_out6 -01:4cd6 _print_sl_data7 -01:4cdc _print_sl_out7 +01:48bc clear_vram +01:487b disable_lcd_safe +01:4881 disable_lcd_safe@wait_ly_0 +01:48d0 memcpy +01:48d9 memset +01:4899 print_hex4 +01:48c6 print_hex8 +01:48e9 print_inline_string +01:48a5 print_load_font +01:48b1 print_newline +01:48e2 print_string +01:47f1 quit +01:4806 quit@cb_return +01:480b quit@wait_ly_1 +01:4811 quit@wait_ly_2 +01:4817 quit@wait_ly_3 +01:481d quit@wait_ly_4 +01:4827 quit@success +01:484e quit@failure +01:4863 quit@halt +01:4864 quit@halt_execution_0 +01:4867 reset_screen +01:488a serial_send_byte 01:4001 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f1 memcpy -01:47fa memset -01:4803 memcmp -01:4811 clear_vram -01:481b clear_oam -01:4825 disable_lcd_safe -01:482b _wait_ly_0 -01:4831 _wait_ly_1 -01:483a reset_screen -01:484e process_results -01:4862 _wait_ly_2 -01:4868 _wait_ly_3 -01:487e _print_results_halt_0 -01:4881 _process_results_cb -01:488c _print_sl_data8 -01:4896 _print_sl_out8 -01:48b0 _print_sl_data9 -01:48bb _print_sl_out9 -01:48d3 _print_sl_data10 -01:48df _print_sl_out10 -01:48e0 dump_mem -01:48ff _dump_mem_line -01:4929 _check_asserts -01:4937 _print_sl_data11 -01:493a _print_sl_out11 -01:4946 _print_sl_data12 -01:4948 _print_sl_out12 -01:4950 _print_sl_data13 -01:4953 _print_sl_out13 -01:495d __check_assert_fail0 -01:4968 _print_sl_data14 -01:496b _print_sl_out14 -01:496e __check_assert_ok0 -01:4976 _print_sl_data15 -01:497b _print_sl_out15 -01:497d __check_assert_skip0 -01:4985 _print_sl_data16 -01:498d _print_sl_out16 -01:498d __check_assert_out0 -01:4999 _print_sl_data17 -01:499b _print_sl_out17 -01:49a3 _print_sl_data18 -01:49a6 _print_sl_out18 -01:49b0 __check_assert_fail1 -01:49bb _print_sl_data19 -01:49be _print_sl_out19 -01:49c1 __check_assert_ok1 -01:49c9 _print_sl_data20 -01:49ce _print_sl_out20 -01:49d0 __check_assert_skip1 -01:49d8 _print_sl_data21 -01:49e0 _print_sl_out21 -01:49e0 __check_assert_out1 -01:49eb _print_sl_data22 -01:49ee _print_sl_out22 -01:49fa _print_sl_data23 -01:49fc _print_sl_out23 -01:4a04 _print_sl_data24 -01:4a07 _print_sl_out24 -01:4a11 __check_assert_fail2 -01:4a1c _print_sl_data25 -01:4a1f _print_sl_out25 -01:4a22 __check_assert_ok2 -01:4a2a _print_sl_data26 -01:4a2f _print_sl_out26 -01:4a31 __check_assert_skip2 -01:4a39 _print_sl_data27 -01:4a41 _print_sl_out27 -01:4a41 __check_assert_out2 -01:4a4d _print_sl_data28 -01:4a4f _print_sl_out28 -01:4a57 _print_sl_data29 -01:4a5a _print_sl_out29 -01:4a64 __check_assert_fail3 -01:4a6f _print_sl_data30 -01:4a72 _print_sl_out30 -01:4a75 __check_assert_ok3 -01:4a7d _print_sl_data31 -01:4a82 _print_sl_out31 -01:4a84 __check_assert_skip3 -01:4a8c _print_sl_data32 -01:4a94 _print_sl_out32 -01:4a94 __check_assert_out3 -01:4a9f _print_sl_data33 -01:4aa2 _print_sl_out33 -01:4aae _print_sl_data34 -01:4ab0 _print_sl_out34 -01:4ab8 _print_sl_data35 -01:4abb _print_sl_out35 -01:4ac5 __check_assert_fail4 -01:4ad0 _print_sl_data36 -01:4ad3 _print_sl_out36 -01:4ad6 __check_assert_ok4 -01:4ade _print_sl_data37 -01:4ae3 _print_sl_out37 -01:4ae5 __check_assert_skip4 -01:4aed _print_sl_data38 -01:4af5 _print_sl_out38 -01:4af5 __check_assert_out4 -01:4b01 _print_sl_data39 -01:4b03 _print_sl_out39 -01:4b0b _print_sl_data40 -01:4b0e _print_sl_out40 -01:4b18 __check_assert_fail5 -01:4b23 _print_sl_data41 -01:4b26 _print_sl_out41 -01:4b29 __check_assert_ok5 -01:4b31 _print_sl_data42 -01:4b36 _print_sl_out42 -01:4b38 __check_assert_skip5 -01:4b40 _print_sl_data43 -01:4b48 _print_sl_out43 -01:4b48 __check_assert_out5 -01:4b53 _print_sl_data44 -01:4b56 _print_sl_out44 -01:4b62 _print_sl_data45 -01:4b64 _print_sl_out45 -01:4b6c _print_sl_data46 -01:4b6f _print_sl_out46 -01:4b79 __check_assert_fail6 -01:4b84 _print_sl_data47 -01:4b87 _print_sl_out47 -01:4b8a __check_assert_ok6 -01:4b92 _print_sl_data48 -01:4b97 _print_sl_out48 -01:4b99 __check_assert_skip6 -01:4ba1 _print_sl_data49 -01:4ba9 _print_sl_out49 -01:4ba9 __check_assert_out6 -01:4bb5 _print_sl_data50 -01:4bb7 _print_sl_out50 -01:4bbf _print_sl_data51 -01:4bc2 _print_sl_out51 -01:4bcc __check_assert_fail7 -01:4bd7 _print_sl_data52 -01:4bda _print_sl_out52 -01:4bdd __check_assert_ok7 -01:4be5 _print_sl_data53 -01:4bea _print_sl_out53 -01:4bec __check_assert_skip7 -01:4bf4 _print_sl_data54 -01:4bfc _print_sl_out54 -01:4bfc __check_assert_out7 +00:0150 main 00:016b fail -00:017f _wait_ly_4 -00:0185 _wait_ly_5 -00:019b _print_results_halt_1 -00:019e _fail_cb -00:01a6 _print_sl_data55 -00:01b2 _print_sl_out55 -00:01c2 _print_sl_data56 -00:01ce _print_sl_out56 -00:01d8 _print_sl_data57 -00:01e4 _print_sl_out57 -00:01ef _print_sl_data58 -00:01f5 _print_sl_out58 -00:0208 _print_sl_data59 -00:0215 _print_sl_out59 -00:0225 _print_sl_data60 -00:0232 _print_sl_out60 -00:0242 _print_sl_data61 -00:024f _print_sl_out61 -00:025a c000_functions_start -00:025a run_test_suite -00:0284 _wait_ly_6 -00:028a _wait_ly_7 -00:02a0 _print_results_halt_2 -00:02a3 _test_ok_cb_0 -00:02ab _print_sl_data62 -00:02b3 _print_sl_out62 -00:02b6 run_tests -00:02c4 run_test_cases -00:02d2 test_case -00:02ef restore_mbc1 -00:02f8 switch_bank -00:0309 fetch_expected_value -00:0328 c000_functions_end -00:0328 expected_banks +00:0172 fail@quit_inline_1 +00:020b c000_functions_start +00:020b run_test_suite +00:0228 run_test_suite@quit_inline_2 +00:0239 run_tests +00:0247 run_test_cases +00:0255 test_case +00:0272 restore_mbc1 +00:027b switch_bank +00:028c fetch_expected_value +00:02ab c000_functions_end +00:02ab expected_banks + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000180 _sizeof_expected_banks +0000001b _sizeof_main +000000a0 _sizeof_fail +00000000 _sizeof_c000_functions_start +0000002e _sizeof_run_test_suite +0000000e _sizeof_run_tests +0000000e _sizeof_run_test_cases +0000001d _sizeof_test_case +00000009 _sizeof_restore_mbc1 +00000011 _sizeof_switch_bank +0000001f _sizeof_fetch_expected_value diff --git a/cinema/gb/mooneye-gb/emulator-only/mbc1_rom_4banks/baseline_0000.png b/cinema/gb/mooneye-gb/emulator-only/mbc1_rom_4banks/baseline_0000.png deleted file mode 100644 index 30590ffab18e5deb12be845930a52ab18642fc14..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 518 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|Vn(PZ!6KiaBquU+ii&U|?{x z{qsNmo1B;Hnym>_oA=IKKFMK%PG{+y=amayKVL83P|Yc$UNGlCA=7aXVT-=? z!k=yOkD14xIsL}yU*6ou>NjH3zniQ39G*S5wqpCv-MoGwmU%1ReYcCb`1o>KP3^w? ztOf5>mpy*jtQ#kFe`4bIZO>aK*KeA(W&QeB-gmZts{j0uW&QSw+MxBj7WH4RJhN-X q{>0ypYS_V6!tEYqAjbqaH2yLz>&fNk@rld;#jmHUpUXO@geCx}Th!

. -; wla symbolic information for "/Users/jeffrey/Scratch/mooneye-gb/tests/build/emulator-only/mbc1_rom_4banks.gb". - -[labels] -0001:4bf3 print_load_font -0001:4c00 print_string -0001:4c0a print_a -0001:4c14 print_newline -0001:4c1f print_digit -0001:4c2c print_regs -0001:4c35 _print_sl_data0 -0001:4c3b _print_sl_out0 -0001:4c48 _print_sl_data1 -0001:4c4e _print_sl_out1 -0001:4c60 _print_sl_data2 -0001:4c66 _print_sl_out2 -0001:4c73 _print_sl_data3 -0001:4c79 _print_sl_out3 -0001:4c8b _print_sl_data4 -0001:4c91 _print_sl_out4 -0001:4c9e _print_sl_data5 -0001:4ca4 _print_sl_out5 -0001:4cb6 _print_sl_data6 -0001:4cbc _print_sl_out6 -0001:4cc9 _print_sl_data7 -0001:4ccf _print_sl_out7 -0001:4001 font -0000:c000 regs_save -0000:c000 regs_save.f -0000:c001 regs_save.a -0000:c002 regs_save.c -0000:c003 regs_save.b -0000:c004 regs_save.e -0000:c005 regs_save.d -0000:c006 regs_save.l -0000:c007 regs_save.h -0000:c008 regs_flags -0000:c009 regs_assert -0000:c009 regs_assert.f -0000:c00a regs_assert.a -0000:c00b regs_assert.c -0000:c00c regs_assert.b -0000:c00d regs_assert.e -0000:c00e regs_assert.d -0000:c00f regs_assert.l -0000:c010 regs_assert.h -0000:c011 memdump_len -0000:c012 memdump_addr -0001:47f1 memcpy -0001:47fa memset -0001:4803 clear_vram -0001:480e reset_screen -0001:481b process_results -0001:4820 _wait_ly_0 -0001:4826 _wait_ly_1 -0001:4842 _wait_ly_2 -0001:4848 _wait_ly_3 -0001:4861 _process_results_cb -0001:486c _print_sl_data8 -0001:4876 _print_sl_out8 -0001:4890 _print_sl_data9 -0001:489b _print_sl_out9 -0001:48b3 _print_sl_data10 -0001:48bf _print_sl_out10 -0001:48c0 dump_mem -0001:48d0 _wait_ly_4 -0001:48d6 _wait_ly_5 -0001:48f2 _dump_mem_line -0001:491c _check_asserts -0001:492a _print_sl_data11 -0001:492d _print_sl_out11 -0001:4939 _print_sl_data12 -0001:493b _print_sl_out12 -0001:4943 _print_sl_data13 -0001:4946 _print_sl_out13 -0001:4950 __check_assert_fail0 -0001:495b _print_sl_data14 -0001:495e _print_sl_out14 -0001:4961 __check_assert_ok0 -0001:4969 _print_sl_data15 -0001:496e _print_sl_out15 -0001:4970 __check_assert_skip0 -0001:4978 _print_sl_data16 -0001:4980 _print_sl_out16 -0001:4980 __check_assert_out0 -0001:498c _print_sl_data17 -0001:498e _print_sl_out17 -0001:4996 _print_sl_data18 -0001:4999 _print_sl_out18 -0001:49a3 __check_assert_fail1 -0001:49ae _print_sl_data19 -0001:49b1 _print_sl_out19 -0001:49b4 __check_assert_ok1 -0001:49bc _print_sl_data20 -0001:49c1 _print_sl_out20 -0001:49c3 __check_assert_skip1 -0001:49cb _print_sl_data21 -0001:49d3 _print_sl_out21 -0001:49d3 __check_assert_out1 -0001:49de _print_sl_data22 -0001:49e1 _print_sl_out22 -0001:49ed _print_sl_data23 -0001:49ef _print_sl_out23 -0001:49f7 _print_sl_data24 -0001:49fa _print_sl_out24 -0001:4a04 __check_assert_fail2 -0001:4a0f _print_sl_data25 -0001:4a12 _print_sl_out25 -0001:4a15 __check_assert_ok2 -0001:4a1d _print_sl_data26 -0001:4a22 _print_sl_out26 -0001:4a24 __check_assert_skip2 -0001:4a2c _print_sl_data27 -0001:4a34 _print_sl_out27 -0001:4a34 __check_assert_out2 -0001:4a40 _print_sl_data28 -0001:4a42 _print_sl_out28 -0001:4a4a _print_sl_data29 -0001:4a4d _print_sl_out29 -0001:4a57 __check_assert_fail3 -0001:4a62 _print_sl_data30 -0001:4a65 _print_sl_out30 -0001:4a68 __check_assert_ok3 -0001:4a70 _print_sl_data31 -0001:4a75 _print_sl_out31 -0001:4a77 __check_assert_skip3 -0001:4a7f _print_sl_data32 -0001:4a87 _print_sl_out32 -0001:4a87 __check_assert_out3 -0001:4a92 _print_sl_data33 -0001:4a95 _print_sl_out33 -0001:4aa1 _print_sl_data34 -0001:4aa3 _print_sl_out34 -0001:4aab _print_sl_data35 -0001:4aae _print_sl_out35 -0001:4ab8 __check_assert_fail4 -0001:4ac3 _print_sl_data36 -0001:4ac6 _print_sl_out36 -0001:4ac9 __check_assert_ok4 -0001:4ad1 _print_sl_data37 -0001:4ad6 _print_sl_out37 -0001:4ad8 __check_assert_skip4 -0001:4ae0 _print_sl_data38 -0001:4ae8 _print_sl_out38 -0001:4ae8 __check_assert_out4 -0001:4af4 _print_sl_data39 -0001:4af6 _print_sl_out39 -0001:4afe _print_sl_data40 -0001:4b01 _print_sl_out40 -0001:4b0b __check_assert_fail5 -0001:4b16 _print_sl_data41 -0001:4b19 _print_sl_out41 -0001:4b1c __check_assert_ok5 -0001:4b24 _print_sl_data42 -0001:4b29 _print_sl_out42 -0001:4b2b __check_assert_skip5 -0001:4b33 _print_sl_data43 -0001:4b3b _print_sl_out43 -0001:4b3b __check_assert_out5 -0001:4b46 _print_sl_data44 -0001:4b49 _print_sl_out44 -0001:4b55 _print_sl_data45 -0001:4b57 _print_sl_out45 -0001:4b5f _print_sl_data46 -0001:4b62 _print_sl_out46 -0001:4b6c __check_assert_fail6 -0001:4b77 _print_sl_data47 -0001:4b7a _print_sl_out47 -0001:4b7d __check_assert_ok6 -0001:4b85 _print_sl_data48 -0001:4b8a _print_sl_out48 -0001:4b8c __check_assert_skip6 -0001:4b94 _print_sl_data49 -0001:4b9c _print_sl_out49 -0001:4b9c __check_assert_out6 -0001:4ba8 _print_sl_data50 -0001:4baa _print_sl_out50 -0001:4bb2 _print_sl_data51 -0001:4bb5 _print_sl_out51 -0001:4bbf __check_assert_fail7 -0001:4bca _print_sl_data52 -0001:4bcd _print_sl_out52 -0001:4bd0 __check_assert_ok7 -0001:4bd8 _print_sl_data53 -0001:4bdd _print_sl_out53 -0001:4bdf __check_assert_skip7 -0001:4be7 _print_sl_data54 -0001:4bef _print_sl_out54 -0001:4bef __check_assert_out7 -0000:01c8 _wait_ly_6 -0000:01ce _wait_ly_7 -0000:01ea _wait_ly_8 -0000:01f0 _wait_ly_9 -0000:0209 _test_ok_cb_0 -0000:0211 _print_sl_data55 -0000:0219 _print_sl_out55 -0000:021c switch_bank -0000:0225 test_mbc -0000:0236 _wait_ly_10 -0000:023c _wait_ly_11 -0000:0258 _wait_ly_12 -0000:025e _wait_ly_13 -0000:0277 _test_failure_cb_0 -0000:027f _print_sl_data56 -0000:028b _print_sl_out56 diff --git a/cinema/gb/mooneye-gb/madness/mgb_oam_dma_halt_sprites/test.gb b/cinema/gb/mooneye-gb/madness/mgb_oam_dma_halt_sprites/test.gb index 05b502f2679fe959f5593400f6298c75dc42c4a4..e6393560ebadcda7fbfbc14e257185054f8e1047 100644 GIT binary patch delta 243 zcmZo@U}|V!+Th1npL*f*Sr(78AKcFhd)WPd+N|N0ev0m%spzZ4t(3vOX# zOaQ4k+yFG{ADafUyq&@WH-<6>hRtUgmEA(uKX7{B{J{Hxm!04P2fIHH+z)Gl&8<5D zG41relZpZjf(#CfAJ`8Atz`JexPW2(VUW8T7#S2mtcr~%q?ClYCBBCPSyf8h5f{DD;nM079%0If4>82|tP delta 1432 zcmZXUL1^1n9LE1oj-AwY6D#UckwWw2mf}(vIW5^>Zk)unT#FiF(;Rw8M-Mx+^fER^ zl1+l`u+htQT23SMG6;;cBoNv|5DkRAMkWGH~+fnGZh9gZ^Fxm)tai ztfi;t%GFx4Ri0}?KrQy2Wan_e-6~9wb)LzTn$7ZDtJb(ELxtMnR^d1X$rB#Qw#v;G zt(0n3c^15m>VDH1c9%Pv%cisW?&BVZnmZp3y9~m z2-RQmr@%qi=W&t+@==Y=nxGW?nZkKe=29sEX^0!2PzZ_J2-EJ}f{IY`x$q4N$Mi9q ze92|9QAdKFBj0m5K*b0AIx<(dr&NI45^EU~ka;9#-V?rHl3lJO@;R3h$#$kA@|4=( zH?iRz*UB`I#0CC1tRaC7*|_0^@OuqsxsnZ&T*?OjG9oSRDKkJWiKPswATkppZ=i4E z*7canJSLepxs*&c^{)cNw)!eI{LZB^3uH^&U=2xZ7>pYp3%^(Jf-70@50kbo8~kg? zggSeCr3@s^uM&*ehs>ifGcWuebDS&5JkO;>vZ3cho(=s47JSB~Vgk9wu56t*^kYLV zZum~D=r#Pzm26n$Qa1QY$lT=CaxwAxKiDi8V}jORU#lq|M| zDN0K?278T8kXCF}dX}bPiAJtlb}u_Evv!=FIh_3^_Ge{uEw;*sqxWOql+mZLWgU!q P(Z(N1I=Zo!4E6s2G1tW; diff --git a/cinema/gb/mooneye-gb/madness/mgb_oam_dma_halt_sprites/test.sym b/cinema/gb/mooneye-gb/madness/mgb_oam_dma_halt_sprites/test.sym index cfaa2ab88..a1b80f1ce 100644 --- a/cinema/gb/mooneye-gb/madness/mgb_oam_dma_halt_sprites/test.sym +++ b/cinema/gb/mooneye-gb/madness/mgb_oam_dma_halt_sprites/test.sym @@ -1,200 +1,38 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/madness/mgb_oam_dma_halt_sprites.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/madness/mgb_oam_dma_halt_sprites.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:481f clear_oam +01:4829 clear_vram +01:4804 disable_lcd_safe +01:480a disable_lcd_safe@wait_ly_0 +01:4833 memcpy +01:483c memset +01:4813 print_load_font +01:47f0 reset_screen 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0199 _wait_ly_4 -00:019f _wait_ly_5 +00:0150 main +00:0199 main@wait_ly_5 +00:019f main@wait_ly_6 00:01b4 hiram_test -00:01b9 _wait_ly_6 -00:01bf _wait_ly_7 +00:01b9 hiram_test@wait_ly_7 +00:01bf hiram_test@wait_ly_8 00:01cc vram_checkerboard 00:05cc vram_checkerboard_end 00:05cc initial_data 00:05d4 initial_data_end + +[definitions] +0000000a _sizeof_clear_oam +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_load_font +00000014 _sizeof_reset_screen +000007f0 _sizeof_font +00000064 _sizeof_main +00000018 _sizeof_hiram_test +00000400 _sizeof_vram_checkerboard +00000000 _sizeof_vram_checkerboard_end +00000008 _sizeof_initial_data diff --git a/cinema/gb/mooneye-gb/manual-only/sprite_priority/test.gb b/cinema/gb/mooneye-gb/manual-only/sprite_priority/test.gb index 9df4d749dac105b324ce16c667aba189ff236fce..734b3f64a122133374a024f950c8f1d848bb7c65 100644 GIT binary patch delta 182 zcmZo@U}|V!+Th3N!BPMDEQ`n45AJ7$J?#F!^7wBT`pWbFS$PjdhJS)H85yTAoHh1P zbohVz9EkY$!R24S!Y?2>0ZhW#4x4Kkv+OoGd|(e<|G?>i^8@b(UUq^H9PIu)a6haG zHlXeVMBC|oClv)61Q{F{Kd>JLn$7T!aRI~n!!|%x10#b1h*h!igp`snx5W2wAgfA= MTjIxNMW)^60GX;(vj6}9 delta 1365 zcmY+EQAiVU9LN9vo71^X-8{2PA^%$uiy%gUTF~6oxtlv2Y%3pnkm#WYqn8LmtsB%! z_>vUlQ&=xS5LO0KkR1u)aa=)AJr#S19#({4V2;}Q{r~^nA04~nzTf-)Ki}W|*{xWV zibd(^81A)RZ`ub{`-E!OGO=1&t;J54(>1$G4WVkVi1A%yZ=^!;n)QyJsz~`qJlVjV z2ROX+1}9>3fql>88%_GvXX{;I*{5uc!_`#Sr~IML3USK^e9G@WGlYs5k;T>R6manZ zVpjmXzP>SBy+tZ;zD+9Din&-CEDe=1rO{Zh6p#HarB(x~7%)WU?V`#C*|}`$kxu-L zu2y%aXMf9~Jx9YZWe^#7R<-?_;>{&f>3kuX%Ojg;^xIF*6_2qT>BEaG<4ff8$y_0w z9TTBQdTKec7lQZ$i}(x4e1VK4(pqvDndP8yt=w+Rlx2fXr?dSFq4|nzj91!?i7C5N zn}(wc4!IIEPDR@2lJ7m$4)Oz_%2#JQ7sp|e3EZ2ev$_aD)=*>sCz+HI2xs|?lLS?; zk*#=*mysYq@dfUO2%Mm z%#(%?KEsz%qy$KxgS-U34qI1e&ajwZ&N3;Obn5#YM7R1pG(2Ha8b)}T-=Ga{XlQjB z-gCcR@P#Q+@RLei5e?QPFj0m+zLZ4R%dT9M*#OKIhZ*L6of&0HFb9|vNIGhw3a$+Td?)MhA945B#RXo5cx(_2N6hOkT7GE-L6KB8Gs#RqT1ubxJf^*5Wb zwuP#%. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/manual-only/sprite_priority.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/manual-only/sprite_priority.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:481f clear_oam +01:4829 clear_vram +01:4804 disable_lcd_safe +01:480a disable_lcd_safe@wait_ly_0 +01:4833 memcpy +01:483c memset +01:4813 print_load_font +01:47f0 reset_screen 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0180 data -00:0214 data_end +00:0150 main +00:017d main@wait_ly_5 +00:0183 main@wait_ly_6 +00:0189 main@wait_ly_7 +00:018f main@wait_ly_8 +00:0196 main@halt_execution_1 +00:0199 data +00:022d data_end + +[definitions] +0000000a _sizeof_clear_oam +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_load_font +00000014 _sizeof_reset_screen +000007f0 _sizeof_font +00000049 _sizeof_main +00000094 _sizeof_data diff --git a/cinema/gb/mooneye-gb/misc/bits/unused_hwio-C/baseline_0000.png b/cinema/gb/mooneye-gb/misc/bits/unused_hwio-C/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/misc/bits/unused_hwio-C/test.gb b/cinema/gb/mooneye-gb/misc/bits/unused_hwio-C/test.gb index d2d4e08ae27f5cff09a913562763be80e65be196..3c2b2029ac27dcc90652be06f1768589aae2145b 100644 GIT binary patch literal 32768 zcmeI4e{9re9mk)$miGFSFDsNUc&>NtSy}{aOD7d?$Mv|DD|EI%Ye(q>T3eV1?F3vY z$MrfSlNiNCjF4eEq6;x*!Nr(m61AjZ(v%aIWzoeEZ|az$Q;;kx)%AQn_uTicpC_OA z_oAOCy&uo_d41o{=XrgfZ__l_CKCVOO-#1ie)aCa!1W?gkab9$5QU;hI2M(C^^_=n z^ZLPCH*dai?(*fmeFuyGcKzm?=f*F;yw-PMaPVON(f-wYdtHb74;>cW-9k3oTCqC! z&OP@Y+wt4cMELetBGzP@rD7s6QJZR_w$_zw!u_;PZJ4O3QP@1{1x(o^kw^-v5iUi$ zg!?s}5|Nrzn@8QpRPM~oOfo@|az@!?Wx`!%N7d)fh?#U&hHApp!gxF`2a_OVrPjD# zr$l^yR*HHCQ;pGRR3$-ONe1eANvA|Kla;1!V#ymE(l3CL_Mef48m};97bLlL#h+3JobOAEaHa9ny8cf|Cask5q zFsAnTg+HC;N?YyIDZjrar9!STS-i|Tg{d#lS(kK*%z7PDUrJzK$r^?GUpkdYq}Es~ z_k?P~?ao0a4$)bgbc)P6fT<%1aXRe_jKG}2{Vkm$vtGv3m+88GuTzQ4($Z7A7v!Qf zK1pYNT&Kvat(eM6h(vm#lvKIKCv}Qk<99LTptB}*ip=^8rt;{lg$`sQPyRHJE;{|j z{Sc<|>8zbPMP`j*s({YAs8eKC3{!=4);*mfvzFx{6Ge2^2Av|a`Y}~ZXMIhl$gCGJ zwS><4jZTqSA7HAC&Z@{qCd%kN(SoTJbk?9wk#&6=Q&n`uui zaW$q|>8$NKMb>o`Q;*PD<2prVUB%RA=&Zl$6q&WC5Se(K&RVBaWY%MtI!tGs&?z$O z2bgN7vu@}Vne`r~w$fQ2DMBW;(tDy2Q`_jQy*fqK^>s{br?Y;nQ)Jc~nChUj5;{d@ zeXJOn=%ll@=oFdt1g1VqXMIPf$gH1Xs*BG0qfU`oc?;1RAEmQCp;Kg5C#H7LS;usW z%({T7ZaV9iIz?u^i>aM-R*8X3?4vmU`zADwkb zr^u{xnEE`O^$VRMv);y3Kb=)jf=u+&`@R-a19VoGPLXvT$JAar>w7vyW=&ygKb`dt zog%ZAEJh~2NN0Uor^u{5m^wgbJ*`t@)(eQ+CmYT@KD7h!@x$Diz zJDXxZ3dQ~$>X5(scC~F0rD7`5RuS1$5&6SEpX;iKJonRUBe$PQ#BQ1Q+nFE5c_B_*~8MC?XrYWAr_ z*X&mkyNaX7E>x9_TySOQ2-BWpyZU<~18jf|umLu}2G{@_U;}J`4X^<=zy{a=8(;$;9s}|( z%F_-0iap(tZ@B-z=L4?k{N_kCAsh}kUM1W7aX1nVs|Or+I39eks> zoY}Xpw6wZ9CkMuzPWbHQvSpQ(%a$o#<-&Vt4u@d?VHoN-yk^S=$6L-yaU!?bf*03w@YD@sS9gAM)T~jjQ)QpWU8W zgG$b<*Xk=nIXR}ed$(yS-%vADs;Y&a8UqG;4GqB{tValSHmoohJb(VonVue(%jq;_ z^LSJhzz+`xgYbZ7>wNkD5u(9hLxVLAqt}-n<21B9t_MxFrC>Vrsm`OFY;>O0lzRu2;mPXlNJP_#Z z-L`G>=H_OV?{t=@n!3JfeJTO?`QvuGwf^>YYd#n^jKae5a&`XbDAcN&noq68x}IZW z(D%ru_7~LE($d-4*JsrSBWf4I`HhX`<%<_*@-q8Ht*@a0?iOguzu&L!o$PF=7Orpd z+`PO3HEtOC{RKHtGy>`3L*WA2*J@mi~?BCwro*w8!Q}?u5zg;$;FA%VJ zb;rP6VC`SiG>nD@LpF7`5cTz~t-)Y@eRj55O+y3t@pxby_I65V^8SXtbw@fJLqo7~ zkEg1tre@VD;2~EvJ8xag{gr%#7*ne^O{iV<4a4h&3NrJX`=pS`oJ` z2wirgks+hxy9Kjw?8pGcPBV^+BGYmznOeazaP2iT9K1gyr9(aU{U3gHRb-{ z*s0J_`52LpWAYJ}kK^)TF7f*U@>Tot3-g0Z@j!fId`o<@Z&BRu`*(cPc8Jxsx|S$8VMWz07-Z@YkLx zw}{$=>(bHY%q{Vw@#q`bhK$<~18jf|umLu}2G{@_U;}J`4X^<=zy{a=8(;%$fDNz#Hoykh u02^QfY=8~00XDz}*Z><~18jf|umLu}2G{@_U;}J`4X^<=zy|)Sf&T!aEe{U> literal 32768 zcmeI4e{ht=8OQg16T;;uZw!PtaFX|uGhPtvC7_%%UM|O7av`S|lVBu7fusa10rmfW}YKx^EAg#IX^X~h; zmtCJf{I~7ykmPpv^M3Z(@4GL9&Ruf3|L;c5bSuC4WMt%AIVmmJOAeDVQchfzwck2I zD&9S}`-Ai6-+AKn>FvY2D?UDV{@o{zpMHK-aMzwaySF{KZRPeMW8b#D`^dlmp-ovu zR(|xxCC^sn;02ONUQjaGy}DjaGPz8X)kss5VK(A2>Q{+WE2Ye`=pI?|l-kHs4WsE%=RN`iYZA|dNL?HS z6Rc|H#i*xwDmP7tQx|;!5Oqz76nY9j<*CFhnRQ%j6HU~$cpjHTVs>`cnzWt{x&h+3 zm8W)uNXT&+PO8Hq6$<&SDCi!|;;HKhPkj}4ofIk5^%hTkEyw3&)<``65~*Cy+G7(v z6RZ)Br-(~pFYf9PDb%%#r}pQ_BTinB2&_pw-xVp;^*m2~9k1&>k;>(_<}B@*H=o<% z1Gwu3kwRT}@KiyLAwb?qMa9> zn|P`OcWn|W)OCobN^#dSB89rLJXMCfE{PQCsww7@D92r`B89rP@l*xwdRU}T*K<6z z2zR|LQmE@Qo~p%N^(9;qwfLFn-ru~`Eb{1kwRU6;HgI3HNTYGVZ&Z`lDHRltr02IbvIA#!(E3(3U&RM zr@C?1Ya)fZ{>f8!;I5_RToQNSXQGX#dT`fvkwWYGHc$29uAhk%>UxK#`fyiHq)^v& z6Q3DCm`I_n7kR25cl}AEP*?E+ZjX22t}lrc>e|3l8*$eGkwRTh z@zenB`n5=*u1|Ps6Yi?gxFj~==l&L+8pK_jMGCF!n>=+l?)s@np|00?>K@#6S)@?c zwUt~Fn{n4VkwRVf^3)dG^@vEJu3zxfR^0VFkwRU{HQXMDaM$%Bg}QFzsbSo;SENwa z6Fl`5-1SS5LS296scpEcw2Dh&8-DJacxnW9^@|i**Fm1zj=O#&QmAW^r*`75zljv; zTC|W$;y&E;jVQ}^SpQzC`B&hyk5?kcF}_Be*`v5}`9#9axILhIVkQ{%YnNs&TbFZ0v^-1VVI zp|0}9ToOs#wMwK=*G8T?h`T043UxirQz_gvB~qyCQ=Xc@U5j-ti3#*fWWBNMEwOB_ z%VRvA-J*L!xvANUk=Y~04E_EcV`lsrqpYZ)VqUdtS$V^v8|#SvnX*IAmc?~fU$nQ+ zNOX~EGMP%$r#k9WfBgH2{`%C37tW4fP&3(kYB>3eUrhdrDK9hS?QNa$XoO^qIQ^r% zXU-IQ+uO-ZK_*)rS3WgIH1@yWj5Rmkw0c!@li%hS)Igc#{XL1ksD%(^UWN{WZ6%wH z-qjsl*B6ZdK$Hr5wu{YnB>Jo?>1=karaC-1Lo%CZluW;;AhV>divFppQm!G{iyf0Q zYNmgtFtfQLec&ly)%a6JVG+^QBIT90vNyzEe_2=Rr;7dWPtw~Un@m6^AQO-Y$OL2p zG69)@Oh6_e6OakW1Y`m-0hxeIKqep)kO{~HWCAh)nSe|{CLj}#3CILw0x|)afJ{Ip zAQO-Y$OJy00R2R{)8JF=PKUmb{r|l@;GWKHE~^pZa>2Ndwz=~#l1#EM7)>{|+-~T%w1mTjg}QDS?EKsPaG0$Dyw4YlC6mmbN`*qnq^jEUEiKT86&RmN@#}*R zzU+DSIv7;d{2rJ&zhAr05-KXv^(|X;o#hQRL#3=*=&?Cqpce>4BCsDq*wwJZNaWbD zqelk^4a4o$Y4dtn6~K>;MI!J8-|g$^??*^SB7uNC53}}sG8qbujfH4SCSg9`XL-Z= z>GZK<_VuvyR0_U_!@#pU3;73w(09AxG!z!vd?XT!b$5@B#$u5O%)?5ou^qRy4G(YF z(An8W8_b8pLqk11>({rpGr!wiXEkP? zKanoi=qT*o>-G8k{uL{L2QOjXu4-i<|X=^<%_7$?tM?eLIUH>!!P=*9R-7L&1Mfcbw5;+*|n5u`lxZfXc-g<>45-_r9bj+R@qD z7wze_-jkmVzt5pkGVqSJjL!bE|IwT=7Be>_X!s>ePR4?ty-e z;bcE8WV3Q}CzM)1&&Jd`U#k)|yJ{Oz5^Q3vL1y$!V#bqs-d72qI@r#}JqB5**DCwX z-n>K?73iAs4YTWlvql@4>Y~cW%`vr|C_iMEf^soc8n*HUHf|};nmtGPw%K)*kjn+e z!vei@fvaX$4HKncy}21!Uyf zm36jqHygK;+z9+J;&vvF&IN6ntIzzMVKEHHI|Dt~T{sd1vb#4ZKpwN%+)D}T$zE#>=W z&rx17yN;69Jn7NWl_aEGoDZK#DVZg{!ny+e@?^)9pMDHw%CDEwXW_54MI=#HJQ-YY zVzwlpzB>O^f8Au2(iVpRiwvWURsj#tQl-xxYPW`}s^}tB%6;~D*g+@kp>;g^m^~hG z(4W{tQ6Bx3Jsxw=x9p+#TvUFF=JWsECr4xgG69)@Oh6_e6OakW1Y`m-0hxeIKqep) zkO{~HWCAh)nSe|{CLj}#3CILw0x|)afJ{IpAQO-Y$OL2pG69)@Oh6_e6OakW1Y`m- U0hxeIKqep)kO{~H{yP%*4_)>1YybcN diff --git a/cinema/gb/mooneye-gb/misc/bits/unused_hwio-C/test.sym b/cinema/gb/mooneye-gb/misc/bits/unused_hwio-C/test.sym index fdf31f0d3..a4dce82de 100644 --- a/cinema/gb/mooneye-gb/misc/bits/unused_hwio-C/test.sym +++ b/cinema/gb/mooneye-gb/misc/bits/unused_hwio-C/test.sym @@ -1,194 +1,32 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/misc/bits/unused_hwio-C.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/misc/bits/unused_hwio-C.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48bb clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48cf memcpy +01:48d8 memset +01:4898 print_hex4 +01:48c5 print_hex8 +01:48e8 print_inline_string +01:48a4 print_load_font +01:48b0 print_newline +01:48e1 print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c017 regs_save -00:c017 regs_save.f -00:c018 regs_save.a -00:c019 regs_save.c -00:c01a regs_save.b -00:c01b regs_save.e -00:c01c regs_save.d -00:c01d regs_save.l -00:c01e regs_save.h -00:c01f regs_flags -00:c020 regs_assert -00:c020 regs_assert.f -00:c021 regs_assert.a -00:c022 regs_assert.c -00:c023 regs_assert.b -00:c024 regs_assert.e -00:c025 regs_assert.d -00:c026 regs_assert.l -00:c027 regs_assert.h -00:c028 memdump_len -00:c029 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 +00:0150 main 00:0161 _test_data_0 00:0177 _finish_0 00:0187 _test_data_1 @@ -497,39 +335,357 @@ 00:1807 _finish_152 00:1817 _test_data_153 00:182d _finish_153 -00:1841 _wait_ly_4 -00:1847 _wait_ly_5 -00:185d _print_results_halt_1 -00:1860 _test_ok_cb_0 -00:1868 _print_sl_data55 -00:1870 _print_sl_out55 -00:1873 run_testcase -00:189e _wait_ly_6 -00:18a4 _wait_ly_7 -00:18ba _print_results_halt_2 -00:18bd test_failure_cb -00:18c5 _print_sl_data56 -00:18d1 _print_sl_out56 -00:18df _print_sl_data57 -00:18e3 _print_sl_out57 -00:18f1 _print_sl_data58 -00:1901 _print_sl_out58 -00:190f _print_sl_data59 -00:191c _print_sl_out59 -00:192d _print_sl_data60 -00:193a _print_sl_out60 -00:194b _print_sl_data61 -00:1958 _print_sl_out61 -00:195e fetch_test_data -00:1978 print_got -00:198a _print_zero -00:198e _print_one -00:1990 _print_bit -00:1999 _skip -00:199a _next -00:c000 test_addr -00:c002 test_got -00:c003 test_reg -00:c004 test_mask -00:c005 test_str_write -00:c00e test_str_expect +00:1834 _finish_153@quit_inline_1 +00:1845 run_testcase +00:1863 run_testcase@quit_inline_2 +00:18e6 fetch_test_data +00:1900 print_got +00:1912 _print_zero +00:1916 _print_one +00:1918 _print_bit +00:1921 _skip +00:1922 _next +00:ff80 test_addr +00:ff82 test_got +00:ff83 test_reg +00:ff84 test_mask +00:ff85 test_str_write +00:ff8e test_str_expect + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000002 _sizeof_test_addr +00000001 _sizeof_test_got +00000001 _sizeof_test_reg +00000001 _sizeof_test_mask +00000009 _sizeof_test_str_write +00000009 _sizeof_test_str_expect +00000011 _sizeof_main +00000016 _sizeof__test_data_0 +00000010 _sizeof__finish_0 +00000016 _sizeof__test_data_1 +00000010 _sizeof__finish_1 +00000016 _sizeof__test_data_2 +00000010 _sizeof__finish_2 +00000016 _sizeof__test_data_3 +00000010 _sizeof__finish_3 +00000016 _sizeof__test_data_4 +00000010 _sizeof__finish_4 +00000016 _sizeof__test_data_5 +00000010 _sizeof__finish_5 +00000016 _sizeof__test_data_6 +00000010 _sizeof__finish_6 +00000016 _sizeof__test_data_7 +00000010 _sizeof__finish_7 +00000016 _sizeof__test_data_8 +00000010 _sizeof__finish_8 +00000016 _sizeof__test_data_9 +00000010 _sizeof__finish_9 +00000016 _sizeof__test_data_10 +00000010 _sizeof__finish_10 +00000016 _sizeof__test_data_11 +00000010 _sizeof__finish_11 +00000016 _sizeof__test_data_12 +00000010 _sizeof__finish_12 +00000016 _sizeof__test_data_13 +00000010 _sizeof__finish_13 +00000016 _sizeof__test_data_14 +00000010 _sizeof__finish_14 +00000016 _sizeof__test_data_15 +00000010 _sizeof__finish_15 +00000016 _sizeof__test_data_16 +00000010 _sizeof__finish_16 +00000016 _sizeof__test_data_17 +00000010 _sizeof__finish_17 +00000016 _sizeof__test_data_18 +00000010 _sizeof__finish_18 +00000016 _sizeof__test_data_19 +00000010 _sizeof__finish_19 +00000016 _sizeof__test_data_20 +00000010 _sizeof__finish_20 +00000016 _sizeof__test_data_21 +00000010 _sizeof__finish_21 +00000016 _sizeof__test_data_22 +00000010 _sizeof__finish_22 +00000016 _sizeof__test_data_23 +00000010 _sizeof__finish_23 +00000016 _sizeof__test_data_24 +00000010 _sizeof__finish_24 +00000016 _sizeof__test_data_25 +00000010 _sizeof__finish_25 +00000016 _sizeof__test_data_26 +00000010 _sizeof__finish_26 +00000016 _sizeof__test_data_27 +00000010 _sizeof__finish_27 +00000016 _sizeof__test_data_28 +00000010 _sizeof__finish_28 +00000016 _sizeof__test_data_29 +00000010 _sizeof__finish_29 +00000016 _sizeof__test_data_30 +00000010 _sizeof__finish_30 +00000016 _sizeof__test_data_31 +00000010 _sizeof__finish_31 +00000016 _sizeof__test_data_32 +00000010 _sizeof__finish_32 +00000016 _sizeof__test_data_33 +00000010 _sizeof__finish_33 +00000016 _sizeof__test_data_34 +00000010 _sizeof__finish_34 +00000016 _sizeof__test_data_35 +00000010 _sizeof__finish_35 +00000016 _sizeof__test_data_36 +00000010 _sizeof__finish_36 +00000016 _sizeof__test_data_37 +00000010 _sizeof__finish_37 +00000016 _sizeof__test_data_38 +00000010 _sizeof__finish_38 +00000016 _sizeof__test_data_39 +00000010 _sizeof__finish_39 +00000016 _sizeof__test_data_40 +00000010 _sizeof__finish_40 +00000016 _sizeof__test_data_41 +00000010 _sizeof__finish_41 +00000016 _sizeof__test_data_42 +00000010 _sizeof__finish_42 +00000016 _sizeof__test_data_43 +00000010 _sizeof__finish_43 +00000016 _sizeof__test_data_44 +00000010 _sizeof__finish_44 +00000016 _sizeof__test_data_45 +00000010 _sizeof__finish_45 +00000016 _sizeof__test_data_46 +00000010 _sizeof__finish_46 +00000016 _sizeof__test_data_47 +00000010 _sizeof__finish_47 +00000016 _sizeof__test_data_48 +00000010 _sizeof__finish_48 +00000016 _sizeof__test_data_49 +00000010 _sizeof__finish_49 +00000016 _sizeof__test_data_50 +00000010 _sizeof__finish_50 +00000016 _sizeof__test_data_51 +00000010 _sizeof__finish_51 +00000016 _sizeof__test_data_52 +00000010 _sizeof__finish_52 +00000016 _sizeof__test_data_53 +00000010 _sizeof__finish_53 +00000016 _sizeof__test_data_54 +00000010 _sizeof__finish_54 +00000016 _sizeof__test_data_55 +00000010 _sizeof__finish_55 +00000016 _sizeof__test_data_56 +00000010 _sizeof__finish_56 +00000016 _sizeof__test_data_57 +00000010 _sizeof__finish_57 +00000016 _sizeof__test_data_58 +00000010 _sizeof__finish_58 +00000016 _sizeof__test_data_59 +00000010 _sizeof__finish_59 +00000016 _sizeof__test_data_60 +00000010 _sizeof__finish_60 +00000016 _sizeof__test_data_61 +00000010 _sizeof__finish_61 +00000016 _sizeof__test_data_62 +00000010 _sizeof__finish_62 +00000016 _sizeof__test_data_63 +00000010 _sizeof__finish_63 +00000016 _sizeof__test_data_64 +00000010 _sizeof__finish_64 +00000016 _sizeof__test_data_65 +00000010 _sizeof__finish_65 +00000016 _sizeof__test_data_66 +00000010 _sizeof__finish_66 +00000016 _sizeof__test_data_67 +00000010 _sizeof__finish_67 +00000016 _sizeof__test_data_68 +00000010 _sizeof__finish_68 +00000016 _sizeof__test_data_69 +00000010 _sizeof__finish_69 +00000016 _sizeof__test_data_70 +00000010 _sizeof__finish_70 +00000016 _sizeof__test_data_71 +00000010 _sizeof__finish_71 +00000016 _sizeof__test_data_72 +00000010 _sizeof__finish_72 +00000016 _sizeof__test_data_73 +00000010 _sizeof__finish_73 +00000016 _sizeof__test_data_74 +00000010 _sizeof__finish_74 +00000016 _sizeof__test_data_75 +00000010 _sizeof__finish_75 +00000016 _sizeof__test_data_76 +00000010 _sizeof__finish_76 +00000016 _sizeof__test_data_77 +00000010 _sizeof__finish_77 +00000016 _sizeof__test_data_78 +00000010 _sizeof__finish_78 +00000016 _sizeof__test_data_79 +00000010 _sizeof__finish_79 +00000016 _sizeof__test_data_80 +00000010 _sizeof__finish_80 +00000016 _sizeof__test_data_81 +00000010 _sizeof__finish_81 +00000016 _sizeof__test_data_82 +00000010 _sizeof__finish_82 +00000016 _sizeof__test_data_83 +00000010 _sizeof__finish_83 +00000016 _sizeof__test_data_84 +00000010 _sizeof__finish_84 +00000016 _sizeof__test_data_85 +00000010 _sizeof__finish_85 +00000016 _sizeof__test_data_86 +00000010 _sizeof__finish_86 +00000016 _sizeof__test_data_87 +00000010 _sizeof__finish_87 +00000016 _sizeof__test_data_88 +00000010 _sizeof__finish_88 +00000016 _sizeof__test_data_89 +00000010 _sizeof__finish_89 +00000016 _sizeof__test_data_90 +00000010 _sizeof__finish_90 +00000016 _sizeof__test_data_91 +00000010 _sizeof__finish_91 +00000016 _sizeof__test_data_92 +00000010 _sizeof__finish_92 +00000016 _sizeof__test_data_93 +00000010 _sizeof__finish_93 +00000016 _sizeof__test_data_94 +00000010 _sizeof__finish_94 +00000016 _sizeof__test_data_95 +00000010 _sizeof__finish_95 +00000016 _sizeof__test_data_96 +00000010 _sizeof__finish_96 +00000016 _sizeof__test_data_97 +00000010 _sizeof__finish_97 +00000016 _sizeof__test_data_98 +00000010 _sizeof__finish_98 +00000016 _sizeof__test_data_99 +00000010 _sizeof__finish_99 +00000016 _sizeof__test_data_100 +00000010 _sizeof__finish_100 +00000016 _sizeof__test_data_101 +00000010 _sizeof__finish_101 +00000016 _sizeof__test_data_102 +00000010 _sizeof__finish_102 +00000016 _sizeof__test_data_103 +00000010 _sizeof__finish_103 +00000016 _sizeof__test_data_104 +00000010 _sizeof__finish_104 +00000016 _sizeof__test_data_105 +00000010 _sizeof__finish_105 +00000016 _sizeof__test_data_106 +00000010 _sizeof__finish_106 +00000016 _sizeof__test_data_107 +00000010 _sizeof__finish_107 +00000016 _sizeof__test_data_108 +00000010 _sizeof__finish_108 +00000016 _sizeof__test_data_109 +00000010 _sizeof__finish_109 +00000016 _sizeof__test_data_110 +00000010 _sizeof__finish_110 +00000016 _sizeof__test_data_111 +00000010 _sizeof__finish_111 +00000016 _sizeof__test_data_112 +00000010 _sizeof__finish_112 +00000016 _sizeof__test_data_113 +00000010 _sizeof__finish_113 +00000016 _sizeof__test_data_114 +00000010 _sizeof__finish_114 +00000016 _sizeof__test_data_115 +00000010 _sizeof__finish_115 +00000016 _sizeof__test_data_116 +00000010 _sizeof__finish_116 +00000016 _sizeof__test_data_117 +00000010 _sizeof__finish_117 +00000016 _sizeof__test_data_118 +00000010 _sizeof__finish_118 +00000016 _sizeof__test_data_119 +00000010 _sizeof__finish_119 +00000016 _sizeof__test_data_120 +00000010 _sizeof__finish_120 +00000016 _sizeof__test_data_121 +00000010 _sizeof__finish_121 +00000016 _sizeof__test_data_122 +00000010 _sizeof__finish_122 +00000016 _sizeof__test_data_123 +00000010 _sizeof__finish_123 +00000016 _sizeof__test_data_124 +00000010 _sizeof__finish_124 +00000016 _sizeof__test_data_125 +00000010 _sizeof__finish_125 +00000016 _sizeof__test_data_126 +00000010 _sizeof__finish_126 +00000016 _sizeof__test_data_127 +00000010 _sizeof__finish_127 +00000016 _sizeof__test_data_128 +00000010 _sizeof__finish_128 +00000016 _sizeof__test_data_129 +00000010 _sizeof__finish_129 +00000016 _sizeof__test_data_130 +00000010 _sizeof__finish_130 +00000016 _sizeof__test_data_131 +00000010 _sizeof__finish_131 +00000016 _sizeof__test_data_132 +00000010 _sizeof__finish_132 +00000016 _sizeof__test_data_133 +00000010 _sizeof__finish_133 +00000016 _sizeof__test_data_134 +00000010 _sizeof__finish_134 +00000016 _sizeof__test_data_135 +00000010 _sizeof__finish_135 +00000016 _sizeof__test_data_136 +00000010 _sizeof__finish_136 +00000016 _sizeof__test_data_137 +00000010 _sizeof__finish_137 +00000016 _sizeof__test_data_138 +00000010 _sizeof__finish_138 +00000016 _sizeof__test_data_139 +00000010 _sizeof__finish_139 +00000016 _sizeof__test_data_140 +00000010 _sizeof__finish_140 +00000016 _sizeof__test_data_141 +00000010 _sizeof__finish_141 +00000016 _sizeof__test_data_142 +00000010 _sizeof__finish_142 +00000016 _sizeof__test_data_143 +00000010 _sizeof__finish_143 +00000016 _sizeof__test_data_144 +00000010 _sizeof__finish_144 +00000016 _sizeof__test_data_145 +00000010 _sizeof__finish_145 +00000016 _sizeof__test_data_146 +00000010 _sizeof__finish_146 +00000016 _sizeof__test_data_147 +00000010 _sizeof__finish_147 +00000016 _sizeof__test_data_148 +00000010 _sizeof__finish_148 +00000016 _sizeof__test_data_149 +00000010 _sizeof__finish_149 +00000016 _sizeof__test_data_150 +00000010 _sizeof__finish_150 +00000016 _sizeof__test_data_151 +00000010 _sizeof__finish_151 +00000016 _sizeof__test_data_152 +00000010 _sizeof__finish_152 +00000016 _sizeof__test_data_153 +00000018 _sizeof__finish_153 +000000a1 _sizeof_run_testcase +0000001a _sizeof_fetch_test_data +00000012 _sizeof_print_got +00000004 _sizeof__print_zero +00000002 _sizeof__print_one +00000009 _sizeof__print_bit +00000001 _sizeof__skip diff --git a/cinema/gb/mooneye-gb/misc/boot_div-A/manifest.yml b/cinema/gb/mooneye-gb/misc/boot_div-A/manifest.yml new file mode 100644 index 000000000..82bc08df2 --- /dev/null +++ b/cinema/gb/mooneye-gb/misc/boot_div-A/manifest.yml @@ -0,0 +1,3 @@ +config: + gb.model: AGB +fail: true diff --git a/cinema/gb/mooneye-gb/misc/boot_div-A/test.gb b/cinema/gb/mooneye-gb/misc/boot_div-A/test.gb new file mode 100644 index 0000000000000000000000000000000000000000..b12fac773f9b54a43a126de2e4b4d62672116ab2 GIT binary patch literal 32768 zcmeI4UrZE79LJaQiYuU9ikgLPbh%vcplA?DdLh@%vaEQpBu8wChLT7@K+_h8@PK%p zP-}~S;eiL6kTiX=Z?sRwm^5h!#>;t4U)rRJHv1w^tyyAhYtu^Sd&793K3rm&n)>_Y zc5Z(2`#1BMnM-(JmzQ5|k>=a-zWcSW@76}CaNV$US}Kw@N^ZBa_i3R&py9?ZIAKc;NU>-@!p;N-TFxH@QBpWAu-9@BkkNVgWj{n^FMgD zA&1fDh<%Pw>A#9a;ibW){-r}p2bN+>`|j_aT)z9m!h_wCJLgWi=iIaI1^2vr$-U@K zyHmyv_d@yPa_UDT>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&I zhyW2F0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01|^FZvK!Rup(B3LnR}p9#icud32C!_c&o8& zdHzJgG~;ofPuL?7=%~Q`6N$C;kq?is^S)vDeAzYd%-Qt{ofFE>SJkdARpq=fXUvq( z78EZD=SOwQbl@ zi3?wGLqktbdwX+p0~6RStGj#u{+5=eCZ1o@0xQDzm#>d!fd6W{&nMR3)+Xw~t|&!C zfdG#`bqaIk!t3$1i2aRMZEyROdf=c@^a!6z7m9cOz5XXbuG z7dKLthla57U@#P_sj04pKk{<`8|JG;9r3n$ey zq1V^rwBQcSGt{e8jM1e1=AzP_v- zXJEC?&w!%vJBwddRDr*yDM}3!MdADfD{*45|3yq>S%`!y7P1~7Gm%nG zCay`ujmNyRxy13=Ai>+21eQo}I_6!-B|+-lOkAUg`zYp}&m}HfxF?gq775P8yi2(x zNWGtl+biNej(HbziOUuq&LoJ61fRyd>0A<|PGsU*McgMbZz`9#`5~tyvttcxW6Ri% zzMj#VRZCa;(JCh6uG6RvOWEnG7FVRG@+M+ITu zjrBKb0?Be^yjU{xy!G=_&dJ5?_qIpQ41OO>mP_M#l0G+o*?Ew9Gkwrmnm_1_etokn zP*SM=et`AH0)^@y1?#Td45$ykO@HAmBwwVz9B3{?fCvx)B0vO)01+SpM1Tko0U|&I zhyW2F0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&I QhyW2F0z`la{M!Wn0hcW=D*ylh literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/misc/boot_div-A/test.sym b/cinema/gb/mooneye-gb/misc/boot_div-A/test.sym new file mode 100644 index 000000000..4dd91c531 --- /dev/null +++ b/cinema/gb/mooneye-gb/misc/boot_div-A/test.sym @@ -0,0 +1,120 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/misc/boot_div-A.gb". + +[labels] +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h diff --git a/cinema/gb/mooneye-gb/misc/boot_div-cgb0/manifest.yml b/cinema/gb/mooneye-gb/misc/boot_div-cgb0/manifest.yml new file mode 100644 index 000000000..a697ada66 --- /dev/null +++ b/cinema/gb/mooneye-gb/misc/boot_div-cgb0/manifest.yml @@ -0,0 +1 @@ +fail: true diff --git a/cinema/gb/mooneye-gb/misc/boot_div-cgb0/test.gb b/cinema/gb/mooneye-gb/misc/boot_div-cgb0/test.gb new file mode 100644 index 0000000000000000000000000000000000000000..c6e6a73082b47511ae45c703037a5502b63a7027 GIT binary patch literal 32768 zcmeI4UrZE77{G_~iYuU9ikgLPbh%vUfk+TZdLh@%-m>Dsk{q!m8cHGs0Zm&V!UN)Y zLai^52c4gJ=OT2L^c~Ix=-kt5omuGorq?+$(0O#f(%qZ*s_o@I`?Pu@ zKm>>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3;AOb{y2oM1x zKm>>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1YRrx@l^u?Ef7%EqM}d;B6@n}<_;g;y0yBxun_F3 zs&OeVuc|69M}N!YfU7Cg|3_(?976$}bHScN?n zGmPt*xD%eSKnnV8K%e@!_z~w|R3eU+%o%`hr2Y zEg;C>F!1hpy)awY-)!uL4aI1ej(e;*=rY6vU44mKI-tKPD zLGVuF`aN89-86+i-Wa$A;`}O#EC+)!7mQ}Cv9Z0~vKkw`UR+Hu2z>m0u*2D2!I{0^ zpo<$RNh2e$a=$+isIRZB1%Jqkf_!0YV4$lDs6!v5uCAd0HXSvbq1Yc7>+bIDHBC6F zh5>q06Py;fgPttY+S-N&s0%h+y`sR}QJ3XV2xgG054EbQDk{(pXE68s0%KELy1E7i za&|Zat93jBvW#~Yep#Uk_^YZc*K?6&69fBS!bOtA{2;2Kp}ifxVb^m4dg|Szx75N zc<;yu{fAg`VZS?lkcV(yspdd61T)?=Y0RC9x@WHiO46sHV5P=3D_eLc3a&~q?*U{k zEM;foT14Dr)IF0=9L@$3yq!&8iUg;k?)iKYq~6WOHH)~9qVBnT;&O%ivI#7a;B?fz zm`{S#``NfXBJSg;dm*2=T;b7df`~})Y1Ey~Cqe3XHm+U7eG+wN@`+1~*k#!r3-gVw z;5+(yR%=<&%F6i6(7{~e(EPN6wZ>u3(+-g}4(+QQlKdq=1&eKqchgOFy2?%;vMbr8 zWTnAh>El|DX0$(fJDY7E_b0AsZxpWE^vYIg+s3Lbbv|P}-D)4>&jf#t^C!li6Z}!O z7`n;7pZFL|`Fp`Joo2^&+VoP#(EoDwCXU-sG=3B7rM^iz1^SfZS$GRBnf5Tb^y;Ic zpy$T=8}+_qr94^6i~@IkV#YqPwEf=p(COjt{mDu;S-`Y~#3lPd>do{4JCitIkAHo$ z!dF(T{Jx*}CVa)pA4Th~-1I3AzfFH(FD75Cza3~cM1Tko0U|&IhyW2F0z`la5CI}U z1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U R1c(3;AOb{y2>iPQ{s9x. +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/misc/boot_div-cgb0.gb". + +[labels] +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h diff --git a/cinema/gb/mooneye-gb/misc/boot_div-cgbABCDE/manifest.yml b/cinema/gb/mooneye-gb/misc/boot_div-cgbABCDE/manifest.yml new file mode 100644 index 000000000..a697ada66 --- /dev/null +++ b/cinema/gb/mooneye-gb/misc/boot_div-cgbABCDE/manifest.yml @@ -0,0 +1 @@ +fail: true diff --git a/cinema/gb/mooneye-gb/misc/boot_div-cgbABCDE/test.gb b/cinema/gb/mooneye-gb/misc/boot_div-cgbABCDE/test.gb new file mode 100644 index 0000000000000000000000000000000000000000..5f5271cd959d09a8888140b740309c0cedc528d0 GIT binary patch literal 32768 zcmeI4UrZE79LJaQiYuU9ikgLPbh%vcplA?DdLh@%vaEQpBu8wChLT7@K+_h8@PK%p zP-}~S;ejTakeEK%H`*s-Oqw(V^-5<`N#*#l@Ffq}i67Z-43OxwT%(Uo$A3lnSKvl3ciT{Is;;_N~78J9mD( zbp3j7SKo%8Z{4|l>GJh!yNnO}`}?|&c5ma`mbV9c%grxcj3UozJ=Jrp8Gq;7w>*Q_h6^w&bZ_58TYh%&OPg1aL>Dw z?u4<;Jy$xunEJs8xo6S&iFGcZGjEi;=h3-mRJfDq{AyIX6X-m;U+V3d{j%xhKK`_N zB0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx) zB0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3;AOb{y2oM1xKm=YO0*PgUe?woU zCP@GP@p$r81M-qck}Sg(VzSaF6pF|BgK=5jvLzJKw7k4X1Q8t_Q&WcyZQfj7o|_B1 zrs+(Ii_6N2i@86~i#|k_6$KuO!pHILXM%CqD=IY2Ff^^A0vZGpGz_#{7p;hZ9*Kz2 z>^JxK`FL(!H%-`7H5jy*1cRyyU6xf9xn)_?phqH><@c+qt|v0*U+9*_YrsDgibmsc zo>Vb9TK#=Y(=|Rkfo-RXK0W88hXx zg~o00fff$iHr69aJQ^#s?dj>MsrGhV*EE$$Fvw>C|KVZV#)DSGk210Ca9G%374~@C zG>3;xCh<7zS)KDn{n63sX%UZ=ClY8a3;uj(!QU{TYZ^|2-!J@aI~r|i85oF0Z5wt} z;=)&4SJ&0m+S=Gy#{_oE>g?RRx2dV2f#=t>z>@I&*@l5jT^K1vgd`bFC4~g zfpGq&$?uNekJ(~>GqLN|<#W5DJb8cN1>yO`z2jqOBN3m^Fd71?S;C*+7~BGJepOXb!eNC8kCvpGn&xKPuBq|+`D(&p@CgQC$Jt)OnYrK4 z#f_BZfdQ;M7z~A~swyktkGxzsUySwiw6%dc`j8zvs;jZ-T;nqo`-8Fe_Rdbr!bvqv z=(V*tEx3ce4AaWW>T1-5jjvu+F?X&jN+g0AWb30=Sy@R5x8n?Ee_t>*#-y#SrzdO2 z8Cb6KGoUE^&f=F9Rp75_ic-ZyQ8<6WN}L$%e*qI&7V|??b#-$yzOn0BfnGSem>zJ_ zUpRZadk+r|bsrg&ptH{#O|13CuZFfWYu(^r_mQE){e6$kR&?ZQ=rtbu4twj3-t*q! z54sOZ$(eoL_yHEec%|w?#nfSj;R2YOS;T!3^CngkH#^`IWp=ENZEOkK z(bqFt!;)51#Ae1FtQ8LRPdnHv9CknL5MANWyxbwl-T;&{*EDxGUF)RFob*AbRJxcf zHQD=oJp0jv{s(I(GwtL4$Q6BC?wSp+Y?imIFWa;uU=F7noulj-Vb3x4#MyJ4J?bXY zu-Nw#A5&8QnsF_+-gVq2qtG>tKixgE#~c(*+~oCAUnkuhW6br-FN783zFFFrWZ>IM<3$y#3;jeC% z1d8(2-}bTINFZPRJ#WpGn*sIVH|fuvx#SD>Y5g-CYfCvx)B0vO) z01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO) Q01+SpM1Tkofq$LA-@(5wEC2ui literal 0 HcmV?d00001 diff --git a/cinema/gb/mooneye-gb/misc/boot_div-cgbABCDE/test.sym b/cinema/gb/mooneye-gb/misc/boot_div-cgbABCDE/test.sym new file mode 100644 index 000000000..364d96d57 --- /dev/null +++ b/cinema/gb/mooneye-gb/misc/boot_div-cgbABCDE/test.sym @@ -0,0 +1,120 @@ +; this file was created with wlalink by ville helin . +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/misc/boot_div-cgbABCDE.gb". + +[labels] +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h diff --git a/cinema/gb/mooneye-gb/misc/boot_hwio-C/baseline_0000.png b/cinema/gb/mooneye-gb/misc/boot_hwio-C/baseline_0000.png index 30590ffab18e5deb12be845930a52ab18642fc14..f9e5e47b50a4d548ddbc988a8e76364d30f505cf 100644 GIT binary patch delta 218 zcmV<0044v11ds%fB!AaQL_t(|obA`qYQiu8K+$CQ|G(Tl6vCKm=caCOJ?BAUf<|&_ zrE}Z1LD$=V{{Ws#;5dQf1dbCpPT)9!<1S;2Ip_7lpFJP1-PewD&M(LO!etzs?3!8Q zqowQl+moEPRQG&Sq{(#r&jbT1+as81;-49-wi_@% delta 210 zcmV;@04@KJ1cn5VB!A6GL_t(|obA`qii0o!06{(c|6leVN=2--V3mWtnWvIKkSvLH zoacF<>*uc@fO`oXCvcp=aRSE)94BzxGz`Nyj;|B*Ja5J~U(CzwGX8Fz<0sf%XZJTJ zOv9U3 zuj)(OxAK4U;RLU@czsf@x}uNQdCa<~zhV30dz>% diff --git a/cinema/gb/mooneye-gb/misc/boot_hwio-C/test.gb b/cinema/gb/mooneye-gb/misc/boot_hwio-C/test.gb index 214a87ab710db2a9756cc1a4d833b14e5ca281f8..429c65d2d1ba7f34a4644a973052da7be4dea6e3 100644 GIT binary patch delta 553 zcmZo@U}|V!+Th1nzkaDA!+${+CMkd6I``9+8mv+~4&7%IRt9nkkvW;joJ3?!Br+!u znd6DfafEYf|1}&6WBjamj`8q^diS#%JkGxG2uUq2QSkR>5Mwy`s_B2ltLFc;uNwZ> zylVXaS@A1SojXvCuV=8YV~Dedf@6q+3d66)|7VYS{AvJ^ATz+mxJCrHI)}KrC@}nL zf=RsaaQ6>U00V|!%^*=Rr<33RGt~Y6&%iKwE0Y74DToC`f9yB^XJWLSD3H0y;RAcU zA;SYkR*$1k&sKSyP4hUr#6yu`#z{qo|EK?baQWA-@C!&z0F!Wb)p7-OHfBCnF%CIi zHBmh!hl;bE9+f~`1;o`rTm!_lKrA8ZVCMv+(U1d!#NYJ~oE|to@P6P`ZzuS`!S2rk z_rtqAK(^MMfLM5X-^mAzc8w31*4r`wfx^#|&-njwSuh=AKW3nGQc<8mkimiR1N-6g z9<|Tp-^tsw=3h`bsmRd4$e^(P@C}czr_ImK@c4LmhDXK56H-dT+!EizfvhSeZiydU W%*#(GN&Gx`_Mykolbaoxh0Fmi3iuEJ delta 1680 zcmaizUuYav6vpqp+fCBl&7aMrn_(;F?zYH^AOXRoqG=|(lb!8OJ2pEsieM>%A{9YI zsOg_s&=={8#Rr2A5_}Pa6176K4`E25WEcjapnan!8OT^_~d*=)djvB!+!wLG$5?>EOT3YP;y}erR10KTnhdf;Soacs8W9h=kqoa=< zda_K^zbRuu&QwQiy=8N&Neaa47TgQnY4>t>%DvP*i0zv`%Vv z)!>@VkCG5z1v8uy-vJjN>R??)f8lw(YU?#l!a}r5KapE?%jWn;!fCPfk;a;nbNxOc z@OcOiEc*T4HTuYno9y1RUoY+rI~Ts%EtZw6dVdvGYvru^mvFXuS~-$c|D5wmq)iFm zy!D`7B0ai6a0Sh}vOCx_ zfWd99!cET7ryJs~Db9&stsJL1N~RHN$&F`VP}H@;jQd?B4^aA=^h=yfsWT3J2W8r7 z0zsXi@1q=%a|C7+nCs}VWkNrbX9bf0^I*)pDSgSLyQmW6U6ct@bfzooId_QPf`kXC z*%G0t6ZkqJAq5G!IN`ALqlCv%B?}$)>8MG9e;$~mDPEuH zgl2G+63hd@9F3V}=|{|2R0;Dq$^KNOzqfOjx0ri5QV;BI#KOXQtQOE)%~>}$9^p-{UWyX{iQpxZzQEZ#FjZ&>h*8j IVa2EZ0dFP^?*IS* diff --git a/cinema/gb/mooneye-gb/misc/boot_hwio-C/test.sym b/cinema/gb/mooneye-gb/misc/boot_hwio-C/test.sym index a0639ed09..14d7c1d6f 100644 --- a/cinema/gb/mooneye-gb/misc/boot_hwio-C/test.sym +++ b/cinema/gb/mooneye-gb/misc/boot_hwio-C/test.sym @@ -1,212 +1,57 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/misc/boot_hwio-C.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/misc/boot_hwio-C.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:48bb clear_vram +01:487a disable_lcd_safe +01:4880 disable_lcd_safe@wait_ly_0 +01:48cf memcpy +01:48d8 memset +01:4898 print_hex4 +01:48c5 print_hex8 +01:48e8 print_inline_string +01:48a4 print_load_font +01:48b0 print_newline +01:48e1 print_string +01:47f0 quit +01:4805 quit@cb_return +01:480a quit@wait_ly_1 +01:4810 quit@wait_ly_2 +01:4816 quit@wait_ly_3 +01:481c quit@wait_ly_4 +01:4826 quit@success +01:484d quit@failure +01:4862 quit@halt +01:4863 quit@halt_execution_0 +01:4866 reset_screen +01:4889 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:01db _wait_ly_4 -00:01e1 _wait_ly_5 -00:01f7 _print_results_halt_1 -00:01fa _test_ok_cb_0 -00:0202 _print_sl_data55 -00:020a _print_sl_out55 -00:020d mismatch -00:0230 _wait_ly_6 -00:0236 _wait_ly_7 -00:024c _print_results_halt_2 -00:024f mismatch_cb -00:0257 _print_sl_data56 -00:0265 _print_sl_out56 -00:027f _print_sl_data57 -00:0289 _print_sl_out57 -00:029a _print_sl_data58 -00:02a4 _print_sl_out58 -00:02ad hwio_data -00:c014 mismatch_addr -00:c016 mismatch_data -00:c017 mismatch_mem +00:0150 main +00:01ce main@quit_inline_1 +00:01df mismatch +00:01f5 mismatch@quit_inline_2 +00:0244 hwio_data +00:ff80 mismatch_addr +00:ff82 mismatch_data +00:ff83 mismatch_mem + +[definitions] +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000002 _sizeof_mismatch_addr +00000001 _sizeof_mismatch_data +00000001 _sizeof_mismatch_mem +0000008f _sizeof_main +00000065 _sizeof_mismatch diff --git a/cinema/gb/mooneye-gb/misc/boot_regs-A/baseline_0000.png b/cinema/gb/mooneye-gb/misc/boot_regs-A/baseline_0000.png index b27f84b7af9384276ca036be2f7b522879b1dff7..e8fd37e04ddfc30c08c76098577d6fbfa9a2fd6e 100644 GIT binary patch delta 1202 zcmV;j1Wo(O3cw1GB!34Nk?vZ;@)!y#aFmYa~{Fn1t*Hx;`R_x<-upKPPGk>CD5rovwy9ca5IP}5bO!{EQ!9{2n?b1KBgYBbJs4j zuGZ*oSKhnG&pX=xA6XP99e*sp{JY}fox1M)wBT-kcs1LjbgJEJXceBDq?e$-tS$nV ztkiS)^Xx*U;<_zc+OE{&QB+gNXXSUdzqTo#+=DOOfU6w%c!dtu4E{vn7=P#f=O*bXAj=%G{=Jpy(%j<=CCm4Ni;x^N)|ywPN5>h*{m)I(Phl@)L)vRB zzvNc8qIs056^rrv>JN!J!WZ zC(G|eml%KPxMb&DKG;!!IDhGTp}fuqOCyew!+&2^Z%-R%G)bSE^gDynr^IO?=^#s) zCL1r|`1T+r>~Thu<@ch?9fPbqamGO(3{KK6ns|ZigBRw5v3+o1KKS-zgI7`e1O9 zc2v>Ciy48dTaNJ#)DCpL=8%1Fjd5{?0=_QVi>JidVjW~jdtDqzbgexlP76t&oAf(9 z-c#bVkaUoh-(POzk2A}2lS;e~ZcmXX&N%3U!AaUh6EBnO1W1$b1QZtj2NEC_x6gX? Qg8%>k07*qoM6N<$g7&O+1^@s6 delta 1191 zcmV;Y1X%mP3d#zQB!3Y}L_t(|ob8=kcBC*2M4g;o0Q+AhOPCKP#K*RTA5suS-Jdzb zL#SPCx62~%weNc(xP0H80P%$agF}JAp}^o!U~nifI20J1PfBUqw)6kFEzY+~y9ygU zbV_mXxmOAz<*BFiaz4jDc_Zcx)NHK$nC9`tM(GqOh;&`$6lEo)m-AKh7^w#jHDB`> z<-}U8{(O4kznR}2+-xAF$wr67^PALjywZauA&26>hu=w7{o~gpZ^!2h# z@xl1y|Ec>&b5zV5QJQ2Gok=;Ri9Q@Yk5sxD(&niogvAOgQXh2>$j&r_@QO3qO?5@ ztOtWb9}LdSBul@4pJpzahYwC!s(yK5`rz~Ptgl5#K63rnceA@$`i(wVnOrRT%X7L&VNc<6({iR**chd%RZc^$;IDLe@3gRT6fRiiiak#Y`y#ht~5Kk%2QU-!s!|EV-6 zO9Hp!az{s;kE&;4yOt7Dun!k*e&k)glujtTDCxRNeLDVXqAM3`(LLqQqE66^qaWN{%5QETEyq5h zWb4ZRA$k*@dnK)>OWUO)@wwfpiKVjfBkBRJltXmQP{Bv(!QLH6x`b6>>Y;q6tozoT z_-vZa?F#)zPE%iEB2O?beuF25=okE$X0)E3bjB$<-{p{72+1Lu^8KJ4F&M?m$qM&*ZE*+#*t$9%YWkZuz7kD^u0-cGbw#ao+|{MWGTyJ{Sorhos?M5 z)0-&Ii%xe;vf||F2YoO&L5FB!1+ov`SP#bb!HM8IK-#+)KgCuzg?(?5 zmGRIsiIb-vK_^-9{pCUYJSTgwmA~B8zu(=Lp9`SR2jk@F2YoO&L5FB!#ZrvG#ZS)S zFHk+vwOT{A{b}^e(-rXhqOEvJo;9nJENQQa1MzOPr{uXp(Dx?&&4~AuJXZ)h$%^kU z58~$;<-JMC-v`&1h?A!u^ugc+9ioX9lhFiO87MF~{{ZITW@Um)33dPg002ovPDHLk FV1n?NYjFSo diff --git a/cinema/gb/mooneye-gb/misc/boot_regs-A/manifest.yml b/cinema/gb/mooneye-gb/misc/boot_regs-A/manifest.yml index ddd792e5b..f5c803cc5 100755 --- a/cinema/gb/mooneye-gb/misc/boot_regs-A/manifest.yml +++ b/cinema/gb/mooneye-gb/misc/boot_regs-A/manifest.yml @@ -1 +1,2 @@ -config: {gb.model: AGB} +config: + gb.model: AGB diff --git a/cinema/gb/mooneye-gb/misc/boot_regs-A/test.gb b/cinema/gb/mooneye-gb/misc/boot_regs-A/test.gb index 80d5e9b9a608d31e9d08fad2b89f6d82342642ad..bc06a02dba24c15edf356c6867374222f5ca058d 100644 GIT binary patch delta 1139 zcmaizUq}=|9LHx*O7Tx=m$4Y+?h$qoMnX_XF6-U-Cr4UHL7|6;yg~{U&%jP?*UCEo z-r19{J=xn?K1eS?949WvMlbcyL(Gdl%E)1*)Na4oYdy~tm;KFrXZHK~{bqI;O>=3Q zYvBf`HWU}kS~aG%xjk!{rtoO{m1SB&&qlf?Vy%8jZq^_YClNA1#>o_!Br{~1#7I;s zBNJl8N-ax>j5F~`;>Z*eUtwmFiSHn0m{^kv$TSn{FcV|qhcry0Oqgl6NShK1Eot!^ z2c6M}jW>9)#Feg_Evh`4~2sL1Kqtn zJD+{c;U({h4BH+I4G8z{bUzGsAwAwfBeww&1eEf7&odZ7Q!5}ks?dq|-eO~nEkhL0 zNnR}nr7$mF1WL#}D1~jX(E&Auj^~2=bD8C^%58Q6pOfI3LZ|jip#E3+mJRwH@To#4 z_XGEG*~)kA1OX?(m_la`PN44E^8*`faKPsZojw@Ma@oouJ3+IP;H5%ihb4gh!_OMB z!Bz)+q0s1IAmb8!*lizLJsfTYoa$+N)c9}YcEi##249ZBpEanCBaq{0$T}QDbB>{P zw?T(X#3fsjt41w0s<6?8MKq_2GF$)}Fr&gYv@yHg(cyXF+|j&aN7PdVXG*HdFM8xb z<2rr}5r!Co7={>u;LByn2mPK`M*N>R@ex14qy?_4Ed3@;i6P9YK3T~WOnuM^Cyf$U zybi%5Z0T#q&BCj$<^1JK9$hTe%1}V&XnrD!N7gFWE3b|9em<* oZzMYL;M=FP8o_^pq|Yn)sZTy2;C0)rsXcK`qY delta 1496 zcmZvbL1-IC6ozM3ku6KIEoE(YaiAV4B`6e%L!ov9Q6$^4q-Ya?CF(;Dq2!Q5(q5X< z;<#Nwdnvi3r}|KW$t4gdYMX*-4`!&T@v>|S1t+Hj9oihW#W=W0>ZMur%^U3ylL~2h z|G#g(|LsHDYH6*O_RTqJ?R*s*;U|LbV}FDP0lVUl@}SG!eYAHX#{by<`7zvTXJY)r z%mAk`;_jF8X)n&faW?bB8^G$9JoS=T-32d!)dQ%8uzHw}d4pK(fS1DRNq*TI7FEFs zHqKVuS1RtC6}MZ!`6y@IZg*xnvz=P!Og`NyDY*qeeLhFSQ(}dG&6)|Oep;WFmnx%yX zahWN;)8gvK_*!m?wy`HsY&1#>&1(IeYRXlY)^aaFBmE6qlFd@1$>xhyvouF+FU>#p z4)bMC=VE`BTp(HTb-w5y=I58(G4m??#^I;?X?`jgiat0qq zBt#$~873T&elOuTDwQyeQYAQV1JXoKnI;zYHA-!c&^38OBt#)$C`|ZO`n`brs8qmTLRyAOa4rFp)WqX!B|_s^MFjH@ zFb6|sR{A~WBr3%`jZz`S&e8c#V$GW@yd# zEM12XonAJrUhjtv`i+MYV2+mic_E-Myn}. -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/misc/boot_regs-A.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/misc/boot_regs-A.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:01d2 invalid_sp -00:01e6 _wait_ly_4 -00:01ec _wait_ly_5 -00:0202 _print_results_halt_1 -00:0205 _test_failure_cb_0 -00:020d _print_sl_data55 -00:021e _print_sl_out55 -00:c014 sp_save +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:01d3 invalid_sp +00:01da invalid_sp@quit_inline_1 +00:ff91 sp_save + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000002 _sizeof_sp_save +00000083 _sizeof_main diff --git a/cinema/gb/mooneye-gb/misc/boot_regs-cgb/baseline_0000.png b/cinema/gb/mooneye-gb/misc/boot_regs-cgb/baseline_0000.png index 2bb2235a58d8d4b6ecf2f2e287968b5d29286351..b0cf302b18c2a690c05a993d1412861a9746fe68 100644 GIT binary patch literal 1314 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|U!TPZ!6KiaBrR-rcrXfv2@F z?Ee3$bGg$a**%`9uT0#%e|B+}?z>HloeOup{XLIEuYR7GL(Rg24=yAWWEfbONXSU> z@bR)epB!{++uNF4A+h}1$39qb%zu3TrTeq9GrnK7J-=vE`RcWa4|W9o)K9tKFfi)_sxNZu9G>-Cyl%SG z8^hHH{;~6|Pib^+K8Whra}QekN<1~rb_W#s8b3|HesXP>mT>Ci*4;*V8$^S4Ewb%h z_~7EdQ(sbd`pdAjzj*xHXEv86DwYv-gU+2d(qXGXFJy1_6)ney|!SIsQYqx$J??S zn+gpqP84oPw2Qcu94#uRaQxuOb(dCGP4n1gGc)IhV@>8H{%Kz{JUc9Qta;J#In?*l zL813=5B9DRig&wwnYBo!#`@%}>yq`8wnkK|>^0zHd;Zfja-H**tC!B?oHh+Qwaw-6 z!_tf1Pa>CI%bAh?E!j*yhFA6Rk%QZrs=iN`>3x|uYyYIFR|It|VyzB;3zR)}(07Uv z&*!u2cFbwM9ecAiI?wYq`;?TUd@rVyoz{!?J5i$I@?W72Xiqy^Ge(?&5?J9 zE_xX`@ptycOHZ%8`qpUbb&56dcFA9B{Zr2>zaG0Pb@lD3bn~B;?$7`0c0XG3cm31l z|HEVUT)sXzpMPCn``(*!sR3)ZEsU+mn-tgd&nTNkEplb)&+l)XmOfgt)cERKFWWfZ ztrzvC#NYjQYh6t--#aVDbjuIxRFCUg^H2HzNw^@%PD1V&deVnG*yjHo6mT!nz63Wc^uUvPo-}9CbUkzyeKJdxj9Jt zycsD+FTQjSh&J^JYM-BqWb?tT9K|E_acKMPBK35JMmRC*!cyGFv$!uqMtyv9?V>#mxn+zwtm z-!J^Yb=T;PUFRm<^qlr(ohQqq*zDCW<|qOkHiLhg(hC*sx|&LX`1C2y)l~mm?67f> vnOny))pZSrm5Z=8Qi%c&R@8!qeBpmgms->+6Q`wq2bF!Eu6{1-oD!MHL literal 1320 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|U!@PZ!6KiaBrR-kr8sL7?U2 zygmQ5)AcvKE@*M9+jV@=n)hktJxT3COEed)KmU9(i+=q(K8GVpjVC7_c;b;zq+(zx zG((2d=bZJ@FI9W{_J7`DaX+uN#A|UopXJ+{nk> z_k6Rc_K4Pq=eaVMIDm3~y2r8(I$sUHySy-AWmvt9?Nj@i^TlG;E^wRLTh@7e>Xps) zi&>+c_@@4ssbhszDnevy4r_Ez%I;H-2?*G7T{aNd0gfB8ZVP(4Pm}2Oy zy@is`Gk%_T{H|Lxg?+Lzx^w$j)ZCdSf8KZR=z+qt`=9v5co(%FGqh zpQ)BohkA@>O%Us;)SdoD=s8z8-=?al!zI_tvx2nGYMY$PNISGkCWW{5wlsUBMd2~V zs=J)}K+hkZ!*2cSV3^ImP(j9GxjBEd_DY=>TXuSG+F|`C)Ai~$i25IHIiQ&0%6=}q z^kcK`yxUFIH&yq$bf}pDte`VlB9Q>+SUR_F~5^{DSSD5Qz#BOYq36Tc&k;U(V0K zop)!6Z@IQL>4-EgaBebBX<({42( zzR$n0EzCAv6YO)u^Vm__ibdV$zOS5iE%V^B|0~zA?)Z{X{cZX4&c}W33vED&AI+WM zJTd3@{n=N(m51weop!f4Gj-eb^X`Fl@^jYRxo^2g%hu|g#k>0apx+{|TO;g~{5*iM z_3NIBe)f7o?RA0k#OJ<~NO^cfl075h5cdVWsEUJg*iZBO-Ki{?Bww@p<^?^Mx(`+h-uq6H zf5ZAhf!lunpCEGUe|LuR$|@tO}Fq4V~@PHTu;)YWbIp^`_W8QKUF7;Q5*qHn(&F|9LL|Tl;UP-n=u&V%o4T{MnX_X4&(0nC!aKsfkKCf+(HT!*T8nQ87pgb z)m=Mz?PRyLJV=)ymKBF(qDvh*#JlKGo-9^M&GdV-jq94?Fuyn7H~am3e{c5jRMn}f z&iU&Or72c2W7Zkw#@38!82qEHSEga|z3bV!sJZeby-|lql0?Y_87Gq@MyAOWNszc$ zK_-N#nOPE5GS0*&5s^tIzJiD`@g2l86RTngnPOrM-Xxg#Ar6x`6Gql8(3aGETUPky zfQR0X^*4B-%$aSNDX)De(PE`SHFIxo1n>8R27?13#O83HXLcH0^wt8?7zzak27CH? zw}1Avh8MlZbL`DvXpp~mr{`g?8)?Z-8odn&&!ddrdyc^fhI$^+QJGG>_a4#5*fInj zo#2#8P%`s!E>L{#LK$p<%{HjYbi5GUo69YSb?&eNe0IPynNIE%p#0bQmIeB4@Tp8= zdx5*TeCNAXK)?}$FJ+oIC;+}6{;Y@v zw%gzfnZ^$S8JFtEZfnyTVRNfsS5H~9=6^G{8Z$ z4H_IGN4hP&qSs@+2J78eK(m@4!2zHFBhGKZn6Soe9iHRQ9xgh1NI6+@x~!)1f=3$C zui?i~VW!~h0^me(*<92aBJ3)m#F78)p(cH3!+x)1%#_0v#*>UMF!&K3A delta 1496 zcmZvbPiPxQ6vk&(ku6KIEoGf#v7sKRr6>e~L!ogCQ6$^4q-Yy~CE`O5A>@!lnq1P- z;<#NwdnviJr}`93FNH!;{((sjW~hnrvTOo{q^AZQnjAJIadFecOS8(GH`*bl5z_L$ zZ{PgBw-0TrrL|hxmE+WUIu;w@hl1`ie}o4C`_$jVgDyMw_tv2pe|YcqGq}~x#Q5i# z0ZwDY-7e?TUYvvDtmj+a09JSM#7kmzAF2da51<;t>QO%C4Px~KycAad<`=zTQ5BqE z?W2nOPR0G8;&y8pw&X^&Orh%pn=`?;%!liD%wPD4CHo>n(Y>*^2H)LtFiVV=bWn4X zrjfqhp<73;6*l{=FRpHkX7z;ed>*QWY{GaUoK+Up-%c3+9JVv0MG0%KZI?47pvwd+ zNcw8y^(bf6Zg-|S)16x9SU%k;f_)6|DZDUWO*l3jIn$`Mo)s(9)tmO7VBmE6qlFd@1$!3dHvou3&FU`O7 zcJoC~=VE`BTp(HUbw2O!<|h~2z2-&ujlxg&)BH$oSR8pY9*nTZ05u-qQ@}3U^DxOt z`hHc+8exn$)48LxgiD9;Ke0p>u+yd{0fq#LLd@^_R9DK_KDe#R`~G$3IcwKhd)N6ybVc3}2~kKG3KQ;1zZdWaDi!dTkd~nmoU_0rHSzdbiO@J!5y9LA z%)yYEm41&ofl4utqEtvR^qlM$LtlV^Qz*3xp=U*98JN%y38^sQYk8uV@I5M(u#8eA zI2VC=13k?obX6V|L-zr4I7Hr;eh>L4Dnwf1KevTiF=1*ulWL_&fo}G@n`Jv5kle0p z#CUF(oeB4V=}Z_2cq5*S_mO&Xz|IdZ2k}X5y?=coYwNUViWT-TR)jIcYcxiip*7pH ybR9x;`iW`vdZ$#c74}Z=?ENA1XH@IYp;g-1`fKP{RO`LaGGA}CyVo^s^u1U6lHj!f diff --git a/cinema/gb/mooneye-gb/misc/boot_regs-cgb/test.sym b/cinema/gb/mooneye-gb/misc/boot_regs-cgb/test.sym index 9421cd102..0751a8ba3 100644 --- a/cinema/gb/mooneye-gb/misc/boot_regs-cgb/test.sym +++ b/cinema/gb/mooneye-gb/misc/boot_regs-cgb/test.sym @@ -1,199 +1,125 @@ ; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/misc/boot_regs-cgb.gb". +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/misc/boot_regs-cgb.gb". [labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte 01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:01d2 invalid_sp -00:01e6 _wait_ly_4 -00:01ec _wait_ly_5 -00:0202 _print_results_halt_1 -00:0205 _test_failure_cb_0 -00:020d _print_sl_data55 -00:021e _print_sl_out55 -00:c014 sp_save +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:01d3 invalid_sp +00:01da invalid_sp@quit_inline_1 +00:ff91 sp_save + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000002 _sizeof_sp_save +00000083 _sizeof_main diff --git a/cinema/gb/mooneye-gb/misc/gpu/vblank_stat_intr-C/baseline_0000.png b/cinema/gb/mooneye-gb/misc/gpu/vblank_stat_intr-C/baseline_0000.png deleted file mode 100644 index a129e5e8812a9bde9361542c3fea58bbe67476bf..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1355 zcmeAS@N?(olHy`uVBq!ia0vp^3xIe62NRHFxc>b*0|Tp&r;B4q#hkZuFHT#nz~fpN z_W%F%YWb?y8(NMqoRsKK-+$&xmXD>XkY{T3{`;*DJ{50eRuSXk;bUcMXKHqCJh#*{N4`C}-urIfw`FViH_kcw$YDaQLEP8wZS^IKlkRq0Qh0q~<`m~$FD~x* zT72bS@qio)&Ssm{tJuiMW@5a@$ z`b&83QEw0H{^8%rcH4e!P}|3wa<>ZH9(#ob|1+Ajh|_C zKd(tmU!(hL;BQSkkM~l& zF25z+Pviv6JO9Q=z9u{2bAtQ3N9p2EY<`$bQ~PK_pJB?EER^*SP^S)uKIyZdgHt)C~;j<_AW@MfU z`xT$%Qv3YdybVDuHLsde|3Cj=?~;F?{rQ&I<+quayuGCIai8sq&ZRT0Q|%rr$~c#F zn{2#%ciooPef=|D04ZVXD^tEnjXekhXgbG-!GA8czFs^Ao%7 zF$;NJ67b!#0G#a!dkqp0m7bP0l+XkKzAK(D diff --git a/cinema/gb/mooneye-gb/misc/gpu/vblank_stat_intr-C/manifest.yml b/cinema/gb/mooneye-gb/misc/gpu/vblank_stat_intr-C/manifest.yml deleted file mode 100755 index 970c243ab..000000000 --- a/cinema/gb/mooneye-gb/misc/gpu/vblank_stat_intr-C/manifest.yml +++ /dev/null @@ -1 +0,0 @@ -config: {gb.model: CGB} diff --git a/cinema/gb/mooneye-gb/misc/gpu/vblank_stat_intr-C/test.gb b/cinema/gb/mooneye-gb/misc/gpu/vblank_stat_intr-C/test.gb deleted file mode 100644 index e7b06ccdcc6703091cf7c8fd48207530c34d27de..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 32768 zcmeI4e`p)$8OPr{$m=>DcV?_K&Y#d-wSlF1>cI{maK5JAU+u zqjw*hu^vBq@^Lmb#keW=vb+ECVYJJ$mt*!{W43Z?soG&H)wM5w&6XcgD)DUP$Jxr- zNYpxCSyZCwweso>clBAT#;?D#YNuba!p(v9rfzLVTkoBFW6bzk`Lj|9=Z&UpCO^r# zol;#p5VO@&e9&*L8ub1CRt;{L*^S^zk5|`@g7$`NJ@Le5o3d|r-7dTS5yWk)n%UTS zt3dhRO?Jk>Y5g-CY zfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la5CI}U1c(3;AOg3UKyjVHf0D0ri{$_R z@woME0b1P{(=^B>xNWRSBnk!mKwQ&y>_{X`v$Zvqf)PiKoICgM!`-?>N{4>Jy1G}CIw?YB(4Ig8fZYOTP!&w~?CI}^zL3M!8wSiBeO*tbU= zo>(Mge13@EosNZ!FCcQ+YKr_QWc=^`Qj{$y%vxH$IUHrH$^|Cw_`7O~SJuC*rhK`y zRCTKRt0UC|c4swhe^nh`*0USlakG&9F7LSMWS;U|7G87HIzBj@o0uFNpI{X$4?jt` z)->;8;(ldG)Pyn<6NBTExzV5bMTy+$i;1ngP95FP2n$jY4u)9baGMU7{;R(>oRsKzY<>4=m-}u zbmeK`YOvS1vGNF)JTGGE5K~^np&-e)WQ&yiJI3phSA^$FzAao|61c2jJv5l$4Q>io zb(j)3AQl4+0=z+3HrS5wdV^iU^BW|E>o+Jr#3l10rtW9TgE$l+I+8N+y8vQK!vC1K9vSPyeP$s7D!xN4Ruk75EEY~c-b+2ARR z*Bks^cz%Nm!u1=JpX8FSikO;b%4Hl1lFeMQLrT7d@w(*u!t*6R6|OJI=Uj^F3!N;j z+}KjNFO0F85XL%9s0$5I+l_>}+PE;g*u!abdMJslLAD^}bjsqGa*_ zu-URQd=_wkwkwk|G*k~oBD_gN`Gt%-e(4z*+P|^%4>Iohr7z3S;KtH_$avN-eN%?= z>q|?w`EMwaCjvx(2oM1xKm>>Y5g-CYfCvx)B0vO)01+SpM1Tko0U|&IhyW2F0z`la r5CI}U1c(3;AOb{y2oM1xKm>>Y5g-CYfCvx)B0vO)01+Spw~N3xZ%VH; diff --git a/cinema/gb/mooneye-gb/misc/gpu/vblank_stat_intr-C/test.sym b/cinema/gb/mooneye-gb/misc/gpu/vblank_stat_intr-C/test.sym deleted file mode 100644 index 7ebdacba7..000000000 --- a/cinema/gb/mooneye-gb/misc/gpu/vblank_stat_intr-C/test.sym +++ /dev/null @@ -1,216 +0,0 @@ -; this file was created with wlalink by ville helin . -; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/misc/gpu/vblank_stat_intr-C.gb". - -[labels] -01:4bff print_load_font -01:4c0c print_string -01:4c16 print_a -01:4c20 print_newline -01:4c2b print_digit -01:4c38 print_regs -01:4c41 _print_sl_data0 -01:4c47 _print_sl_out0 -01:4c54 _print_sl_data1 -01:4c5a _print_sl_out1 -01:4c6c _print_sl_data2 -01:4c72 _print_sl_out2 -01:4c7f _print_sl_data3 -01:4c85 _print_sl_out3 -01:4c97 _print_sl_data4 -01:4c9d _print_sl_out4 -01:4caa _print_sl_data5 -01:4cb0 _print_sl_out5 -01:4cc2 _print_sl_data6 -01:4cc8 _print_sl_out6 -01:4cd5 _print_sl_data7 -01:4cdb _print_sl_out7 -01:4000 font -00:c000 regs_save -00:c000 regs_save.f -00:c001 regs_save.a -00:c002 regs_save.c -00:c003 regs_save.b -00:c004 regs_save.e -00:c005 regs_save.d -00:c006 regs_save.l -00:c007 regs_save.h -00:c008 regs_flags -00:c009 regs_assert -00:c009 regs_assert.f -00:c00a regs_assert.a -00:c00b regs_assert.c -00:c00c regs_assert.b -00:c00d regs_assert.e -00:c00e regs_assert.d -00:c00f regs_assert.l -00:c010 regs_assert.h -00:c011 memdump_len -00:c012 memdump_addr -01:47f0 memcpy -01:47f9 memset -01:4802 memcmp -01:4810 clear_vram -01:481a clear_oam -01:4824 disable_lcd_safe -01:482a _wait_ly_0 -01:4830 _wait_ly_1 -01:4839 reset_screen -01:484d process_results -01:4861 _wait_ly_2 -01:4867 _wait_ly_3 -01:487d _print_results_halt_0 -01:4880 _process_results_cb -01:488b _print_sl_data8 -01:4895 _print_sl_out8 -01:48af _print_sl_data9 -01:48ba _print_sl_out9 -01:48d2 _print_sl_data10 -01:48de _print_sl_out10 -01:48df dump_mem -01:48fe _dump_mem_line -01:4928 _check_asserts -01:4936 _print_sl_data11 -01:4939 _print_sl_out11 -01:4945 _print_sl_data12 -01:4947 _print_sl_out12 -01:494f _print_sl_data13 -01:4952 _print_sl_out13 -01:495c __check_assert_fail0 -01:4967 _print_sl_data14 -01:496a _print_sl_out14 -01:496d __check_assert_ok0 -01:4975 _print_sl_data15 -01:497a _print_sl_out15 -01:497c __check_assert_skip0 -01:4984 _print_sl_data16 -01:498c _print_sl_out16 -01:498c __check_assert_out0 -01:4998 _print_sl_data17 -01:499a _print_sl_out17 -01:49a2 _print_sl_data18 -01:49a5 _print_sl_out18 -01:49af __check_assert_fail1 -01:49ba _print_sl_data19 -01:49bd _print_sl_out19 -01:49c0 __check_assert_ok1 -01:49c8 _print_sl_data20 -01:49cd _print_sl_out20 -01:49cf __check_assert_skip1 -01:49d7 _print_sl_data21 -01:49df _print_sl_out21 -01:49df __check_assert_out1 -01:49ea _print_sl_data22 -01:49ed _print_sl_out22 -01:49f9 _print_sl_data23 -01:49fb _print_sl_out23 -01:4a03 _print_sl_data24 -01:4a06 _print_sl_out24 -01:4a10 __check_assert_fail2 -01:4a1b _print_sl_data25 -01:4a1e _print_sl_out25 -01:4a21 __check_assert_ok2 -01:4a29 _print_sl_data26 -01:4a2e _print_sl_out26 -01:4a30 __check_assert_skip2 -01:4a38 _print_sl_data27 -01:4a40 _print_sl_out27 -01:4a40 __check_assert_out2 -01:4a4c _print_sl_data28 -01:4a4e _print_sl_out28 -01:4a56 _print_sl_data29 -01:4a59 _print_sl_out29 -01:4a63 __check_assert_fail3 -01:4a6e _print_sl_data30 -01:4a71 _print_sl_out30 -01:4a74 __check_assert_ok3 -01:4a7c _print_sl_data31 -01:4a81 _print_sl_out31 -01:4a83 __check_assert_skip3 -01:4a8b _print_sl_data32 -01:4a93 _print_sl_out32 -01:4a93 __check_assert_out3 -01:4a9e _print_sl_data33 -01:4aa1 _print_sl_out33 -01:4aad _print_sl_data34 -01:4aaf _print_sl_out34 -01:4ab7 _print_sl_data35 -01:4aba _print_sl_out35 -01:4ac4 __check_assert_fail4 -01:4acf _print_sl_data36 -01:4ad2 _print_sl_out36 -01:4ad5 __check_assert_ok4 -01:4add _print_sl_data37 -01:4ae2 _print_sl_out37 -01:4ae4 __check_assert_skip4 -01:4aec _print_sl_data38 -01:4af4 _print_sl_out38 -01:4af4 __check_assert_out4 -01:4b00 _print_sl_data39 -01:4b02 _print_sl_out39 -01:4b0a _print_sl_data40 -01:4b0d _print_sl_out40 -01:4b17 __check_assert_fail5 -01:4b22 _print_sl_data41 -01:4b25 _print_sl_out41 -01:4b28 __check_assert_ok5 -01:4b30 _print_sl_data42 -01:4b35 _print_sl_out42 -01:4b37 __check_assert_skip5 -01:4b3f _print_sl_data43 -01:4b47 _print_sl_out43 -01:4b47 __check_assert_out5 -01:4b52 _print_sl_data44 -01:4b55 _print_sl_out44 -01:4b61 _print_sl_data45 -01:4b63 _print_sl_out45 -01:4b6b _print_sl_data46 -01:4b6e _print_sl_out46 -01:4b78 __check_assert_fail6 -01:4b83 _print_sl_data47 -01:4b86 _print_sl_out47 -01:4b89 __check_assert_ok6 -01:4b91 _print_sl_data48 -01:4b96 _print_sl_out48 -01:4b98 __check_assert_skip6 -01:4ba0 _print_sl_data49 -01:4ba8 _print_sl_out49 -01:4ba8 __check_assert_out6 -01:4bb4 _print_sl_data50 -01:4bb6 _print_sl_out50 -01:4bbe _print_sl_data51 -01:4bc1 _print_sl_out51 -01:4bcb __check_assert_fail7 -01:4bd6 _print_sl_data52 -01:4bd9 _print_sl_out52 -01:4bdc __check_assert_ok7 -01:4be4 _print_sl_data53 -01:4be9 _print_sl_out53 -01:4beb __check_assert_skip7 -01:4bf3 _print_sl_data54 -01:4bfb _print_sl_out54 -01:4bfb __check_assert_out7 -00:0169 fail_halt -00:017d _wait_ly_4 -00:0183 _wait_ly_5 -00:0199 _print_results_halt_1 -00:019c _test_failure_cb_0 -00:01a4 _print_sl_data55 -00:01a9 _print_sl_out55 -00:01ac test_round1 -00:01b8 _wait_ly_6 -00:0203 finish_round1 -00:0221 test_round2 -00:022d _wait_ly_7 -00:0279 finish_round2 -00:029b test_round3 -00:02a7 _wait_ly_8 -00:02f1 finish_round3 -00:030f test_round4 -00:031b _wait_ly_9 -00:0366 finish_round4 -00:0368 test_finish -00:c014 intr_vec_vblank -00:c017 intr_vec_stat -00:c01a round1 -00:c01b round2 -00:c01c round3 diff --git a/cinema/gb/mooneye-gb/acceptance/hdma_lcdc/manifest.yml b/cinema/gb/mooneye-gb/misc/ppu/vblank_stat_intr-C/manifest.yml similarity index 68% rename from cinema/gb/mooneye-gb/acceptance/hdma_lcdc/manifest.yml rename to cinema/gb/mooneye-gb/misc/ppu/vblank_stat_intr-C/manifest.yml index 6cd567986..c9aa5eb1d 100644 --- a/cinema/gb/mooneye-gb/acceptance/hdma_lcdc/manifest.yml +++ b/cinema/gb/mooneye-gb/misc/ppu/vblank_stat_intr-C/manifest.yml @@ -1,2 +1,3 @@ config: gb.model: CGB +fail: true diff --git a/cinema/gb/mooneye-gb/misc/ppu/vblank_stat_intr-C/test.gb b/cinema/gb/mooneye-gb/misc/ppu/vblank_stat_intr-C/test.gb new file mode 100644 index 0000000000000000000000000000000000000000..ccd80619a977dac2c07421f7c670b569277b733a GIT binary patch literal 32768 zcmeI4Uq~EB7{KS&tJ$bY)*5BCOR{$y_F_#iM(82eWpCY>(-lr^B*6-?8cn2)N|e@^ z%SD@}HGfS&h=Nf1l)l+Mg%Bu|!;s^0r7tNIlCph>52X!TB($+@uJheEJ&k>^2o=ir zal1F)eE(*CGjrgBlTNQs;@4Sxd~$txHY%FLn_XZ3+|zS^3(3zJB6Odd}?a+#Gc_uS(D4%szW_1Nl zmd0V;b+T->``+|Mh zzGPpuuh`e@3Azg|d&bkrZ#80Hg2wl>=PESjY0njCJX!EK2k8FTsB?gIkpL1v0!RP} zAOR$R1dsp{Kmter2_OL^fCP{L5oPHilR~}EiErE zEoJ^JFSJ2KQIfzzl2|`{yQx4w*efa&Mbi|eq5?D!7@(%Xo9X<`BR~%Zd2jZc`3nNe zt*W{XHd*%h3@SdKEQ2nJvJAOJQBgn-1`WgQmSt6qW%fVU4TIGHf4@H*jz(GjSWMTW zQ9l!|Ev0^AN(ZjVNFeRx=> z5{-gAt25qEe{^(ahR4IqV=;Ie2Kcj;1^$`_x}v~taJ#v`X@x7BuxWxFDluU* z4u!h9T3Z_$LR7$R7@eIhEsc%!^(?=lc$b8&FPk6B0RGGEg23nB+|28NU6Kk4yj~W6 z_AHE*39HBE!q;?cl-8izU+Qs^9uyvw16=F zy3Wpy+YO_I_07a?-ki_ulJw&F1uqbmkDoi%2k&4|5Hzj6zP1)LAOriiv$MS&bP#r? z+5816nr0Z>pPd*u1$_U?vLpop5)~FrNKH*slWEq}xZP|vfdKIF`M?f)dkJUee1pzU zq$myyz|4I zdTlN27C3`KhG}JGbv4ul8=Ji>!`PWFNx>kDAX^`5m6w;5F+1$R?C%TojZtZ9>*>kb zVGk_V*&dK2c4pz16{>*0qDWE|6-i?JIV-+nVEqfIh$0^!L{(QeHNiKmdR9O$98I$; zXj;0D^$reopByBh)6Z*gH;prX%fFjmP!k#)>^?cv+u!%M*$9u^^1sYt57Jw2)SkC{ z-|aq160?V#@gp>Z@=DhEcR?_ruUeHjV-e@#ZGS=PJluKXQOS0>m^LEdD(BM{K&C>H zRwk~V$Bjmu3u}pEqk#l(W)c`Y!MTWYc`XT&Z)M`@c-#jO=h9l@vW2@c2~3{ge8joB zmITRnGI9HP+=mh8%39*Gg$FYU!aTvp5$D=k5+qM&;+lBeM-gXYEphPyt0=Q#A-b?- zbVXmuX!T24Q4t*(b1+so)U9?fS2*ln?GRq!(6rnkK`+>G%{9(FPSskeaw~Pz@{p;7 zM^7i8v-^|i`q{l#jxFWId%XH^s=+!%pAq_;rcabUXXqmr>zYBo zU-;-m{&Utg>^j@B8?{1P*Z!~%#7|pLGBcR8El6V{peolkZK&-Z`hOL)kri>R~lDeGzS_0(bOm-u08_=|gG-lBZ@ z*F&^5;?0+T%gecW&nrLsD)p%~m)Q8f7jOhf00|%gB!C2v01`j~NB{{S0VIF~kN^@u z0!RP}AOR$R1dsp{Kmter2_OL^fCP{L5. +; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/misc/ppu/vblank_stat_intr-C.gb". + +[labels] +01:47f0 check_asserts_cb +01:4842 check_asserts_cb@check_asserts +01:4864 check_asserts_cb@fail0 +01:4870 check_asserts_cb@ok0 +01:487a check_asserts_cb@skip0 +01:4885 check_asserts_cb@out0 +01:489c check_asserts_cb@fail1 +01:48a8 check_asserts_cb@ok1 +01:48b2 check_asserts_cb@skip1 +01:48bd check_asserts_cb@out1 +01:48dd check_asserts_cb@fail2 +01:48e9 check_asserts_cb@ok2 +01:48f3 check_asserts_cb@skip2 +01:48fe check_asserts_cb@out2 +01:4915 check_asserts_cb@fail3 +01:4921 check_asserts_cb@ok3 +01:492b check_asserts_cb@skip3 +01:4936 check_asserts_cb@out3 +01:4956 check_asserts_cb@fail4 +01:4962 check_asserts_cb@ok4 +01:496c check_asserts_cb@skip4 +01:4977 check_asserts_cb@out4 +01:498e check_asserts_cb@fail5 +01:499a check_asserts_cb@ok5 +01:49a4 check_asserts_cb@skip5 +01:49af check_asserts_cb@out5 +01:49cf check_asserts_cb@fail6 +01:49db check_asserts_cb@ok6 +01:49e5 check_asserts_cb@skip6 +01:49f0 check_asserts_cb@out6 +01:4a07 check_asserts_cb@fail7 +01:4a13 check_asserts_cb@ok7 +01:4a1d check_asserts_cb@skip7 +01:4a28 check_asserts_cb@out7 +01:4b7b clear_vram +01:4b3a disable_lcd_safe +01:4b40 disable_lcd_safe@wait_ly_0 +01:4b8f memcpy +01:4b98 memset +01:4b58 print_hex4 +01:4b85 print_hex8 +01:4ba8 print_inline_string +01:4b64 print_load_font +01:4b70 print_newline +01:4a2b print_reg_dump +01:4ba1 print_string +01:4ab0 quit +01:4ac5 quit@cb_return +01:4aca quit@wait_ly_1 +01:4ad0 quit@wait_ly_2 +01:4ad6 quit@wait_ly_3 +01:4adc quit@wait_ly_4 +01:4ae6 quit@success +01:4b0d quit@failure +01:4b22 quit@halt +01:4b23 quit@halt_execution_0 +01:4b26 reset_screen +01:4b49 serial_send_byte +01:4000 font +00:ff80 v_regs_save +00:ff80 v_regs_save.reg_f +00:ff81 v_regs_save.reg_a +00:ff82 v_regs_save.reg_c +00:ff83 v_regs_save.reg_b +00:ff84 v_regs_save.reg_e +00:ff85 v_regs_save.reg_d +00:ff86 v_regs_save.reg_l +00:ff87 v_regs_save.reg_h +00:ff88 v_regs_flags +00:ff89 v_regs_assert +00:ff89 v_regs_assert.reg_f +00:ff8a v_regs_assert.reg_a +00:ff8b v_regs_assert.reg_c +00:ff8c v_regs_assert.reg_b +00:ff8d v_regs_assert.reg_e +00:ff8e v_regs_assert.reg_d +00:ff8f v_regs_assert.reg_l +00:ff90 v_regs_assert.reg_h +00:0150 main +00:0169 fail_halt +00:0170 fail_halt@quit_inline_1 +00:017e test_round1 +00:018a test_round1@wait_ly_5 +00:01d5 finish_round1 +00:01f3 test_round2 +00:01ff test_round2@wait_ly_6 +00:024b finish_round2 +00:026d test_round3 +00:0279 test_round3@wait_ly_7 +00:02c3 finish_round3 +00:02e1 test_round4 +00:02ed test_round4@wait_ly_8 +00:0338 finish_round4 +00:033a test_finish +00:ff91 intr_vec_vblank +00:ff94 intr_vec_stat +00:ff97 round1 +00:ff98 round2 +00:ff99 round3 + +[definitions] +0000023b _sizeof_check_asserts_cb +0000000a _sizeof_clear_vram +0000000f _sizeof_disable_lcd_safe +00000009 _sizeof_memcpy +00000009 _sizeof_memset +0000000c _sizeof_print_hex4 +0000000a _sizeof_print_hex8 +00000006 _sizeof_print_inline_string +0000000c _sizeof_print_load_font +0000000b _sizeof_print_newline +00000085 _sizeof_print_reg_dump +00000007 _sizeof_print_string +00000076 _sizeof_quit +00000014 _sizeof_reset_screen +0000000f _sizeof_serial_send_byte +000007f0 _sizeof_font +00000008 _sizeof_v_regs_save +00000001 _sizeof_v_regs_save.reg_f +00000001 _sizeof_v_regs_save.reg_a +00000001 _sizeof_v_regs_save.reg_c +00000001 _sizeof_v_regs_save.reg_b +00000001 _sizeof_v_regs_save.reg_e +00000001 _sizeof_v_regs_save.reg_d +00000001 _sizeof_v_regs_save.reg_l +00000001 _sizeof_v_regs_save.reg_h +00000001 _sizeof_v_regs_flags +00000008 _sizeof_v_regs_assert +00000001 _sizeof_v_regs_assert.reg_f +00000001 _sizeof_v_regs_assert.reg_a +00000001 _sizeof_v_regs_assert.reg_c +00000001 _sizeof_v_regs_assert.reg_b +00000001 _sizeof_v_regs_assert.reg_e +00000001 _sizeof_v_regs_assert.reg_d +00000001 _sizeof_v_regs_assert.reg_l +00000001 _sizeof_v_regs_assert.reg_h +00000003 _sizeof_intr_vec_vblank +00000003 _sizeof_intr_vec_stat +00000001 _sizeof_round1 +00000001 _sizeof_round2 +00000001 _sizeof_round3 +00000019 _sizeof_main +00000015 _sizeof_fail_halt +00000057 _sizeof_test_round1 +0000001e _sizeof_finish_round1 +00000058 _sizeof_test_round2 +00000022 _sizeof_finish_round2 +00000056 _sizeof_test_round3 +0000001e _sizeof_finish_round3 +00000057 _sizeof_test_round4 +00000002 _sizeof_finish_round4 diff --git a/cinema/gb/mooneye-gb/update.py b/cinema/gb/mooneye-gb/update.py index 6f126b349..f561ea38f 100644 --- a/cinema/gb/mooneye-gb/update.py +++ b/cinema/gb/mooneye-gb/update.py @@ -3,7 +3,7 @@ import os import os.path import shutil import yaml -from cinema.util import dictMerge +from cinema.util import dict_merge suffixes = { 'C': 'CGB', @@ -43,7 +43,7 @@ def ingestDirectory(path, dest): manifest = yaml.safe_load(f) or {} except IOError: pass - dictMerge(manifest, { + dict_merge(manifest, { 'config': { 'gb.model': model }