Fixed a bug that prevented writing to the wave RAM, as well as a bug where the wave RAM was treated as zeros despite not being zero’d out
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23229f1118
commit
4541efe86a
21
Core/apu.c
21
Core/apu.c
@ -506,6 +506,11 @@ void GB_apu_run(GB_gameboy_t *gb)
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void GB_apu_init(GB_gameboy_t *gb)
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void GB_apu_init(GB_gameboy_t *gb)
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{
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{
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memset(&gb->apu, 0, sizeof(gb->apu));
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memset(&gb->apu, 0, sizeof(gb->apu));
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/* Restore the wave form */
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for (unsigned reg = GB_IO_WAV_START; reg <= GB_IO_WAV_END; reg++) {
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gb->apu.wave_channel.wave_form[(reg - GB_IO_WAV_START) * 2] = gb->io_registers[reg] >> 4;
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gb->apu.wave_channel.wave_form[(reg - GB_IO_WAV_START) * 2 + 1] = gb->io_registers[reg] & 0xF;
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}
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gb->apu.lf_div = 1;
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gb->apu.lf_div = 1;
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/* APU glitch: When turning the APU on while DIV's bit 4 (or 5 in double speed mode) is on,
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/* APU glitch: When turning the APU on while DIV's bit 4 (or 5 in double speed mode) is on,
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the first DIV/APU event is skipped. */
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the first DIV/APU event is skipped. */
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@ -556,14 +561,14 @@ uint8_t GB_apu_read(GB_gameboy_t *gb, uint8_t reg)
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void GB_apu_write(GB_gameboy_t *gb, uint8_t reg, uint8_t value)
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void GB_apu_write(GB_gameboy_t *gb, uint8_t reg, uint8_t value)
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{
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{
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if (!gb->apu.global_enable && reg != GB_IO_NR52 && (GB_is_cgb(gb) ||
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if (!gb->apu.global_enable && reg != GB_IO_NR52 && reg < GB_IO_WAV_START && (GB_is_cgb(gb) ||
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(
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(
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reg != GB_IO_NR11 &&
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reg != GB_IO_NR11 &&
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reg != GB_IO_NR21 &&
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reg != GB_IO_NR21 &&
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reg != GB_IO_NR31 &&
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reg != GB_IO_NR31 &&
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reg != GB_IO_NR41
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reg != GB_IO_NR41
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)
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)
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)) {
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)) {
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return;
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return;
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}
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}
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