Emulate PPU OAM reads while both DMA and GDMA are active

This commit is contained in:
Lior Halphon 2022-02-05 14:52:09 +02:00
parent 1c6ecc2e14
commit 6a8db89ae5
3 changed files with 6 additions and 2 deletions

View File

@ -469,6 +469,9 @@ static inline uint8_t oam_read(GB_gameboy_t *gb, uint8_t addr)
return 0xFF; return 0xFF;
} }
if (unlikely(gb->dma_current_dest <= 0xa0 && gb->dma_current_dest > 0)) { // TODO: what happens in the last and first M cycles? if (unlikely(gb->dma_current_dest <= 0xa0 && gb->dma_current_dest > 0)) { // TODO: what happens in the last and first M cycles?
if (gb->hdma_in_progress) {
return GB_read_oam(gb, (gb->hdma_current_src & ~1) | (addr & 1));
}
return gb->oam[((gb->dma_current_dest - 1 + (gb->halted || gb->stopped)) & ~1) | (addr & 1)]; return gb->oam[((gb->dma_current_dest - 1 + (gb->halted || gb->stopped)) & ~1) | (addr & 1)];
} }
return gb->oam[addr]; return gb->oam[addr];

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@ -473,7 +473,7 @@ static inline void sync_ppu_if_needed(GB_gameboy_t *gb, uint8_t register_accesse
} }
} }
static uint8_t read_oam(GB_gameboy_t *gb, uint8_t addr) internal uint8_t GB_read_oam(GB_gameboy_t *gb, uint8_t addr)
{ {
if (addr < 0xa0) { if (addr < 0xa0) {
return gb->oam[addr]; return gb->oam[addr];
@ -588,7 +588,7 @@ static uint8_t read_high_memory(GB_gameboy_t *gb, uint16_t addr)
return 0xff; return 0xff;
} }
return read_oam(gb, addr); return GB_read_oam(gb, addr);
} }
if (addr < 0xFF80) { if (addr < 0xFF80) {

View File

@ -16,6 +16,7 @@ internal void GB_dma_run(GB_gameboy_t *gb);
internal bool GB_is_dma_active(GB_gameboy_t *gb); internal bool GB_is_dma_active(GB_gameboy_t *gb);
internal void GB_hdma_run(GB_gameboy_t *gb); internal void GB_hdma_run(GB_gameboy_t *gb);
internal void GB_trigger_oam_bug(GB_gameboy_t *gb, uint16_t address); internal void GB_trigger_oam_bug(GB_gameboy_t *gb, uint16_t address);
internal uint8_t GB_read_oam(GB_gameboy_t *gb, uint8_t addr);
#endif #endif
#endif /* memory_h */ #endif /* memory_h */