Redo channel 4's timing accurately, emulate NR43 write quirks
This commit is contained in:
Lior Halphon
parent
1baa0446a9
commit
7de6194e28
127
Core/apu.c
127
Core/apu.c
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@ -422,6 +422,28 @@ void GB_apu_div_event(GB_gameboy_t *gb)
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}
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}
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static void step_lfsr(GB_gameboy_t *gb, unsigned cycles_offset)
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{
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unsigned high_bit_mask = gb->apu.noise_channel.narrow ? 0x4040 : 0x4000;
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bool new_high_bit = (gb->apu.noise_channel.lfsr ^ (gb->apu.noise_channel.lfsr >> 1) ^ 1) & 1;
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gb->apu.noise_channel.lfsr >>= 1;
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if (new_high_bit) {
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gb->apu.noise_channel.lfsr |= high_bit_mask;
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}
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else {
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/* This code is not redundent, it's relevant when switching LFSR widths */
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gb->apu.noise_channel.lfsr &= ~high_bit_mask;
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}
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gb->apu.current_lfsr_sample = gb->apu.noise_channel.lfsr & 1;
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if (gb->apu.is_active[GB_NOISE]) {
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update_sample(gb, GB_NOISE,
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gb->apu.current_lfsr_sample ?
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gb->apu.noise_channel.current_volume : 0,
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cycles_offset);
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}
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}
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void GB_apu_run(GB_gameboy_t *gb)
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{
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@ -506,39 +528,38 @@ void GB_apu_run(GB_gameboy_t *gb)
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gb->apu.wave_channel.wave_form_just_read = false;
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}
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}
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if (gb->apu.is_active[GB_NOISE]) {
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// The noise channel can step even if inactive on the DMG
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if (gb->apu.is_active[GB_NOISE] || !GB_is_cgb(gb)) {
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uint8_t cycles_left = cycles;
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while (unlikely(cycles_left > gb->apu.noise_channel.sample_countdown)) {
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cycles_left -= gb->apu.noise_channel.sample_countdown + 1;
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gb->apu.noise_channel.sample_countdown = gb->apu.noise_channel.sample_length * 4 + 3;
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unsigned divisor = (gb->io_registers[GB_IO_NR43] & 0x07) << 2;
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if (!divisor) divisor = 2;
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if (gb->apu.noise_channel.counter_countdown == 0) {
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gb->apu.noise_channel.counter_countdown = divisor;
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}
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while (unlikely(cycles_left >= gb->apu.noise_channel.counter_countdown)) {
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cycles_left -= gb->apu.noise_channel.counter_countdown;
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gb->apu.noise_channel.counter_countdown = divisor + gb->apu.channel_4_delta;
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gb->apu.channel_4_delta = 0;
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bool old_bit = (gb->apu.noise_channel.counter >> (gb->io_registers[GB_IO_NR43] >> 4)) & 1;
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gb->apu.noise_channel.counter++;
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gb->apu.noise_channel.counter &= 0x3FFF;
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bool new_bit = (gb->apu.noise_channel.counter >> (gb->io_registers[GB_IO_NR43] >> 4)) & 1;
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/* Step LFSR */
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unsigned high_bit_mask = gb->apu.noise_channel.narrow ? 0x4040 : 0x4000;
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bool new_high_bit = (gb->apu.noise_channel.lfsr ^ (gb->apu.noise_channel.lfsr >> 1) ^ 1) & 1;
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gb->apu.noise_channel.lfsr >>= 1;
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if (new_high_bit) {
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gb->apu.noise_channel.lfsr |= high_bit_mask;
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if (new_bit && !old_bit) {
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step_lfsr(gb, cycles - cycles_left);
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if (cycles_left == 0 && gb->apu.samples[GB_NOISE] == 0) {
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gb->apu.pcm_mask[1] &= 0x0F;
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}
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}
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else {
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/* This code is not redundent, it's relevant when switching LFSR widths */
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gb->apu.noise_channel.lfsr &= ~high_bit_mask;
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}
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gb->apu.current_lfsr_sample = gb->apu.noise_channel.lfsr & 1;
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if (cycles_left == 0 && gb->apu.samples[GB_NOISE] == 0) {
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gb->apu.pcm_mask[1] &= 0x0F;
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}
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update_sample(gb, GB_NOISE,
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gb->apu.current_lfsr_sample ?
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gb->apu.noise_channel.current_volume : 0,
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0);
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}
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if (cycles_left) {
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gb->apu.noise_channel.sample_countdown -= cycles_left;
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gb->apu.noise_channel.counter_countdown -= cycles_left;
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gb->apu.channel_4_countdown_reloaded = false;
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}
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else {
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gb->apu.channel_4_countdown_reloaded = true;
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}
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}
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}
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@ -938,33 +959,43 @@ void GB_apu_write(GB_gameboy_t *gb, uint8_t reg, uint8_t value)
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case GB_IO_NR43: {
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gb->apu.noise_channel.narrow = value & 8;
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unsigned divisor = (value & 0x07) << 1;
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if (!divisor) divisor = 1;
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gb->apu.noise_channel.sample_length = (divisor << (value >> 4)) - 1;
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/* Todo: changing the frequency sometimes delays the next sample. This is probably
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due to how the frequency is actually calculated in the noise channel, which is probably
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not by calculating the effective sample length and counting simiarly to the other channels.
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This is not emulated correctly. */
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bool old_bit = (gb->apu.noise_channel.counter >> (gb->io_registers[GB_IO_NR43] >> 4)) & 1;
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gb->io_registers[GB_IO_NR43] = value;
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bool new_bit = (gb->apu.noise_channel.counter >> (gb->io_registers[GB_IO_NR43] >> 4)) & 1;
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if (gb->apu.channel_4_countdown_reloaded) {
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unsigned divisor = (gb->io_registers[GB_IO_NR43] & 0x07) << 2;
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if (!divisor) divisor = 2;
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gb->apu.noise_channel.counter_countdown =
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divisor + (divisor == 2? 0 : (uint8_t[]){2, 1, 0, 3}[(gb->apu.noise_channel.alignment) & 3]);
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gb->apu.channel_4_delta = 0;
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}
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/* Step LFSR */
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if (new_bit && !old_bit) {
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step_lfsr(gb, 0);
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}
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break;
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}
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case GB_IO_NR44: {
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if (value & 0x80) {
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gb->apu.noise_channel.sample_countdown = (gb->apu.noise_channel.sample_length) * 2 + 6 - gb->apu.lf_div;
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/* I'm COMPLETELY unsure about this logic, but it passes all relevant tests.
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See comment in NR43. */
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if ((gb->io_registers[GB_IO_NR43] & 7) && (gb->apu.noise_channel.alignment & 2) == 0) {
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if ((gb->io_registers[GB_IO_NR43] & 7) == 1) {
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gb->apu.noise_channel.sample_countdown += 2;
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}
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else {
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gb->apu.noise_channel.sample_countdown -= 2;
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}
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unsigned divisor = (gb->io_registers[GB_IO_NR43] & 0x07) << 2;
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if (!divisor) divisor = 2;
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gb->apu.channel_4_delta = 0;
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gb->apu.noise_channel.counter_countdown = divisor + 4;
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if (divisor == 2) {
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gb->apu.noise_channel.counter_countdown += 1 - gb->apu.lf_div;
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}
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if (gb->apu.is_active[GB_NOISE]) {
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gb->apu.noise_channel.sample_countdown += 2;
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else {
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gb->apu.noise_channel.counter_countdown += (uint8_t[]){2, 1, 0, 3}[gb->apu.noise_channel.alignment & 3];
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if (((gb->apu.noise_channel.alignment + 1) & 3) < 2) {
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if ((gb->io_registers[GB_IO_NR43] & 0x07) == 1) {
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gb->apu.noise_channel.counter_countdown -= 2;
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gb->apu.channel_4_delta = 2;
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}
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else {
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gb->apu.noise_channel.counter_countdown -= 4;
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}
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}
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}
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gb->apu.noise_channel.current_volume = gb->io_registers[GB_IO_NR42] >> 4;
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@ -105,8 +105,9 @@ typedef struct
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uint16_t lfsr;
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bool narrow;
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uint16_t sample_countdown; // in APU ticks (Reloaded from sample_length)
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uint16_t sample_length; // From NR43, in APU ticks
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uint8_t counter_countdown; // Counts from 0-7 to 0 to tick counter (Scaled from 512KHz to 2MHz)
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uint8_t __padding;
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uint16_t counter; // A bit from this 14-bit register ticks LFSR
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bool length_enabled; // NR44
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uint8_t alignment; // If (NR43 & 7) != 0, samples are aligned to 512KHz clock instead of
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@ -121,6 +122,9 @@ typedef struct
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bool current_lfsr_sample;
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uint8_t pcm_mask[2]; // For CGB-0 to CGB-C PCM read glitch
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uint8_t channel_1_restart_hold;
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int8_t channel_4_delta;
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bool channel_4_countdown_reloaded;
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} GB_apu_t;
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typedef enum {
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@ -1821,10 +1821,10 @@ static bool apu(GB_gameboy_t *gb, char *arguments, char *modifiers, const debugg
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GB_log(gb, "\nCH4:\n");
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GB_log(gb, " Current volume: %u, current sample length: %u APU ticks (next in %u ticks)\n",
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GB_log(gb, " Current volume: %u, current internal counter: 0x%x (next increase in %u ticks)\n",
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gb->apu.noise_channel.current_volume,
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gb->apu.noise_channel.sample_length * 4 + 3,
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gb->apu.noise_channel.sample_countdown);
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gb->apu.noise_channel.counter,
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gb->apu.noise_channel.counter_countdown);
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GB_log(gb, " %u 256 Hz ticks till next volume %screase (out of %u)\n",
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gb->apu.noise_channel.volume_countdown,
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@ -25,8 +25,11 @@ void GB_handle_rumble(GB_gameboy_t *gb)
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unsigned volume = (gb->io_registers[GB_IO_NR50] & 7) + 1 + ((gb->io_registers[GB_IO_NR50] >> 4) & 7) + 1;
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unsigned ch4_volume = volume * (!!(gb->io_registers[GB_IO_NR51] & 8) + !!(gb->io_registers[GB_IO_NR51] & 0x80));
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unsigned ch1_volume = volume * (!!(gb->io_registers[GB_IO_NR51] & 1) + !!(gb->io_registers[GB_IO_NR51] & 0x10));
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double ch4_rumble = (MIN(gb->apu.noise_channel.sample_length * (gb->apu.noise_channel.narrow? 8 : 1) , 4096) * ((signed) gb->apu.noise_channel.current_volume * gb->apu.noise_channel.current_volume * ch4_volume / 32.0 - 50) - 2048) / 2048.0;
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unsigned ch4_divisor = (gb->io_registers[GB_IO_NR43] & 0x07) << 1;
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if (!ch4_divisor) ch4_divisor = 1;
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unsigned ch4_sample_length = (ch4_divisor << (gb->io_registers[GB_IO_NR43] >> 4)) - 1;
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double ch4_rumble = (MIN(ch4_sample_length * (gb->apu.noise_channel.narrow? 8 : 1) , 4096) * ((signed) gb->apu.noise_channel.current_volume * gb->apu.noise_channel.current_volume * ch4_volume / 32.0 - 50) - 2048) / 2048.0;
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ch4_rumble = MIN(ch4_rumble, 1.0);
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ch4_rumble = MAX(ch4_rumble, 0.0);
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