The STAT bug does not occur during the glitched mode 0

This commit is contained in:
Lior Halphon 2018-04-02 01:05:32 +03:00
parent 9339a6027f
commit e163026ca9
2 changed files with 2 additions and 1 deletions

View File

@ -238,6 +238,7 @@ static void trigger_oam_interrupt(GB_gameboy_t *gb)
} }
} }
/* Todo: A proper test ROM of cases where both the PPU and the CPU write to IF in the same M-cycle is needed. */
void GB_STAT_update(GB_gameboy_t *gb) void GB_STAT_update(GB_gameboy_t *gb)
{ {
if (!(gb->io_registers[GB_IO_LCDC] & 0x80)) return; if (!(gb->io_registers[GB_IO_LCDC] & 0x80)) return;

View File

@ -636,7 +636,7 @@ static void write_high_memory(GB_gameboy_t *gb, uint16_t addr, uint8_t value)
case GB_IO_STAT: case GB_IO_STAT:
/* A DMG bug: http://www.devrs.com/gb/files/faqs.html#GBBugs */ /* A DMG bug: http://www.devrs.com/gb/files/faqs.html#GBBugs */
if (!gb->is_cgb && !gb->stat_interrupt_line && if (!gb->is_cgb && !gb->stat_interrupt_line && !gb->is_first_line_mode2 &&
(gb->io_registers[GB_IO_STAT] & 0x3) < 2 && (gb->io_registers[GB_IO_LCDC] & 0x80)) { (gb->io_registers[GB_IO_STAT] & 0x3) < 2 && (gb->io_registers[GB_IO_LCDC] & 0x80)) {
gb->io_registers[GB_IO_IF] |= 2; gb->io_registers[GB_IO_IF] |= 2;
} }