Max/SameBoy
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Commit Graph

117 Commits

Author SHA1 Message Date
Lior Halphon
31609319de Fix the set_joyp API 2019-11-09 14:45:38 +02:00
Lior Halphon
c802361800 Whoops, this function was missing 2019-11-08 16:14:16 +02:00
Lior Halphon
dee29c118c Added GB_set_sample_rate_by_clocks API, split SGB_NO_SFC into PAL and NTSC; now they report the correct clock rate. 2019-10-08 15:10:24 +03:00
Lior Halphon
652e52df3d Pass the SGB multiplayer tests 2019-09-14 12:31:52 +03:00
Lior Halphon
4fcc921b46 Fix SGB multiplayer, improve multiplayer accuracy 2019-09-13 17:10:58 +03:00
Lior Halphon
eaa1c1cd4a Merge bsnes’s changes 2019-08-16 17:38:43 +03:00
Lior Halphon
9ba6915c85 ICD JOYP write API 2019-07-16 21:42:57 +03:00
Lior Halphon
346e499602 ICD APIs 2019-07-15 23:02:58 +03:00
Lior Halphon
f55c254959 Fixed a regression that made ly_lyc_0_write and ly_lyc_write fail 2019-07-12 02:18:25 +03:00
Lior Halphon
e268efefef Redesign and reimplement the audio API, let the frontends handle more stuff. Probably affects #161 2019-06-15 23:22:27 +03:00
Lior Halphon
2f9de4942c Increase input polling frequency in the Cocoa and SDL frontends, should make inputs look less synthetic and potentially reduce input lag 2019-06-07 18:27:25 +03:00
Lior Halphon
c342663200 Emulate serial bit shifting, update the serial API to use bits instead of bytes, update printer emulation and libretro to use the new API 2019-03-15 14:36:10 +02:00
Lior Halphon
9d0aadb83f Emulate missing Vreset signal (SGB only for now) and ICD2 desyncing 2019-02-15 17:04:48 +02:00
Lior Halphon
b996ed9220 Writing to BGPD/OBPD while it’s blocked still increases BGPI/OBPI if needed. Fixes #145 2019-01-19 23:37:44 +02:00
Lior Halphon
73a54049d2 Accurate PPU access timings 2019-01-19 19:32:26 +02:00
Lior Halphon
4536581a6e Fixed a bug where modifying RTC data would corrupt cartridge RAM data. Fixes #136 2019-01-18 02:36:14 +02:00
Lior Halphon
312478e509 CGB palettes are not accessible during Mode 3, closes #84 2019-01-14 22:22:46 +02:00
Lior Halphon
879d3b607d Removed verified TODO 2019-01-14 20:32:52 +02:00
Lior Halphon
7b36ee10a4 Merge branch 'master' into sgb 2019-01-05 19:00:22 +02:00
Lior Halphon
612cd07fb3 Fixed emulation of echo RAM 2018-12-12 23:44:00 +02:00
Lior Halphon
ea09dfc888 Fixed multiplayer SGB mode 2018-12-04 23:46:30 +02:00
Lior Halphon
7735d638c6 Multiplayer SGB APIs/SGB detection 2018-11-12 00:37:06 +02:00
Lior Halphon
44891d5c4a Initial code to support SGB, command “parsing”, replacement SGB boot ROM 2018-11-11 01:16:32 +02:00
Lior Halphon
11c148c851 Starting G/HDMA directly takes one more M-cycle (More research required) 2018-09-15 00:48:31 +03:00
Lior Halphon
f7b882f0e8 Whoops 2018-07-22 02:10:26 +03:00
Lior Halphon
b7426f93c0 Randomize object palettes. Slightly more accurate emulation of FF4C. 2018-07-20 23:23:47 +03:00
Lior Halphon
2e9e3424ec Document some revision differences 2018-07-14 21:52:54 +03:00
Lior Halphon
a7aabca618 Starting to add CGB-C support 2018-07-03 21:43:46 +03:00
Lior Halphon
d81c23cb16 Fixed HDMA regression 2018-06-16 23:52:24 +03:00
Lior Halphon
45c73e0175 Replaced the is_cgb bool with a more future compatible model enum. Removed the GB_init_cgb API and replaced it with an extended GB_init and GB_switch_model_and_reset APIs that now receive a model parameter. Increased the struct version. 2018-06-16 13:59:33 +03:00
Lior Halphon
6532aef089 Correct emulation of the DMG stat write bug 2018-05-26 18:06:40 +03:00
Lior Halphon
9693b2de6a Refined the STAT bug behavior. Still not perfect. 2018-05-26 17:06:49 +03:00
Lior Halphon
855ffb490a A HBlank interrupt cannot occur in the last M-cycle of HBlank. Correct emulation of STAT access conflicts on the CGB (Test: CPU-E, single speed only). Fixes a minor graphical glitch in Pokémon Puzzle Challenge. 2018-05-25 23:42:36 +03:00
Lior Halphon
713dc02e46 A bit tacky, but T-cycle accurate emulation of LYC write conflicts on the CGB. Only single speed mode verified. Closes #54 2018-05-11 12:38:55 +03:00
Lior Halphon
f1ec42d4ba H/GDMA was 4 times faster than it should have been. Made it also more accurate. Fixes #56 2018-04-13 14:41:39 +03:00
Lior Halphon
0c86ff1ee4 More CGB revision quirks 2018-04-06 04:00:37 +03:00
Lior Halphon
e163026ca9 The STAT bug does not occur during the glitched mode 0 2018-04-02 01:05:32 +03:00
Lior Halphon
7671648fca Simplified a function 2018-03-27 19:06:36 +03:00
Lior Halphon
4cbade9a88 Function name change 2018-03-27 15:55:12 +03:00
Lior Halphon
4986930511 Mostly complete emulation of the OAM bug. Passes oam_bug-2. 2018-03-27 15:46:00 +03:00
Lior Halphon
18e32d1755 Merge branch 'master' into timing 
# Conflicts:
#	Core/gb.c
 2018-03-22 22:37:35 +02:00
Lior Halphon
577e23925b Fixed sources-dmgABCXmgbS 2018-03-22 20:09:01 +02:00
Lior Halphon
b702d56547 Merge branch 'master' into timing 
# Conflicts:
#	Core/display.c
#	Core/z80_cpu.c
 2018-03-01 21:22:33 +02:00
Lior Halphon
b02e40d5a2 Refinement to that last fix 2018-02-25 23:23:55 +02:00
Lior Halphon
90a943d05a Emulate an HDMA quirk required to properly emulate Aevilia 2018-02-25 22:32:41 +02:00
Lior Halphon
ef670986c6 Rewrote PPU (currently only emulates DMG correctly) to use the new timing mechanism. Removed “future interrupts” (No longer required because SameBoy is now T-cycle based) 2018-02-25 00:48:45 +02:00
Lior Halphon
42ab746a66 Starting to remove the delayed interrupts hack – done for timer interrupt, broken for display interrupts 2018-02-23 15:33:44 +02:00
Lior Halphon
c48097a484 Convert div counter to the SM mechanism 2018-02-23 13:16:05 +02:00
Lior Halphon
9802ca41dd Components not affected by CGB’s double speed mode now operate in 8MHz mode to theoretically make advance_cycles(gb, 1) safe. 2018-02-20 21:17:12 +02:00
Lior Halphon
f79af39ea2 More accurate emulation of the APU’s analog characteristics 2018-02-16 18:01:50 +02:00