Lior Halphon
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f88c9d299b
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Merge branch 'master' into rateless_apu
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2016-09-20 20:05:03 +03:00 |
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Lior Halphon
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71d4ba21f2
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Added a tick-counting debugger command
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2016-09-16 11:58:31 +03:00 |
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Lior Halphon
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b95860c034
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Making the APU independent of sample rate
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2016-09-13 16:55:26 +03:00 |
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Lior Halphon
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603b8969ab
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Correct (disconnected) serial emulation.
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2016-09-06 13:13:14 +03:00 |
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Lior Halphon
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ee4907949b
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Support for RTC latching. Fixes #4.
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2016-08-21 22:33:57 +03:00 |
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Lior Halphon
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0f98ac5ff9
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Emulate TIMA reloading
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2016-08-06 13:56:29 +03:00 |
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Lior Halphon
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55cbe5d4d0
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Accuracy improvements to timers
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2016-08-06 00:24:12 +03:00 |
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Lior Halphon
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47e3300b66
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Improved DMA accuracy, mooneyegb test ROMs no longer crash miserably. (but still fail)
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2016-08-03 23:31:10 +03:00 |
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Lior Halphon
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185e71fe12
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Improvements to IR API, since timing is VERY important
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2016-07-21 01:03:13 +03:00 |
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Lior Halphon
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aa6438fa06
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Async debugger commands
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2016-07-18 00:46:45 +03:00 |
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Lior Halphon
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70bd90740a
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Mass name and type changes. Save states are now compatible between 32- and 64-bit systems. Maybe.
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2016-06-18 20:29:11 +03:00 |
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Lior Halphon
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0a09fba091
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Correcting DIV and TIMA speed in CGB's double speed mode
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2016-04-09 16:48:37 +03:00 |
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Lior Halphon
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af7309b98d
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Moved the call to display_run to advance_cycle.
This fixes games with delicate timings such as X/Ekkusu, that expect STAT to change *during* an opcode.
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2016-04-02 19:15:07 +03:00 |
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Lior Halphon
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f1e9623371
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Initial public commit
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2016-04-01 21:27:01 +03:00 |
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