Max/SameBoy
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111 Commits

Author SHA1 Message Date
Lior Halphon
96063fb0da Fixed Windows build, added Unicode support in Windows. 2018-03-28 21:59:27 +03:00
Lior Halphon
0e3d2770d9 Properly handle cases where an object’s X position is modified between the OAM mode and rendering mode 2018-03-27 22:13:08 +03:00
Lior Halphon
4986930511 Mostly complete emulation of the OAM bug. Passes oam_bug-2. 2018-03-27 15:46:00 +03:00
Lior Halphon
04bfc89816 Cycle accurate OAM search mode 2018-03-23 19:07:14 +03:00
Lior Halphon
3883b7d86a Merge branch 'master' into timing 
# Conflicts:
#	Core/display.c
#	Core/z80_cpu.c
 2018-03-19 23:46:33 +02:00
Lior Halphon
b50c97f4a7 Prevent starting HDMA in the middle of an instruction, making both the CPU and DMA access memory at the same time. Closes #47 2018-03-19 20:01:31 +02:00
Lior Halphon
c267ad00b5 Goodbye 2018-03-09 23:34:23 +02:00
Lior Halphon
9083e883fe CGB BG rendering 2018-03-09 18:52:36 +02:00
Lior Halphon
a32f232bb1 Fixed OAM-window priority glitch, fixed OAM glitch in Prehistoric Man 2018-03-09 17:10:19 +02:00
Lior Halphon
3d1c8b50c4 OAM search and OAM timing in mode 3 2018-03-04 22:21:56 +02:00
Lior Halphon
476133abd0 The scrolled y value is cached and not recalculated 2018-03-03 20:51:38 +02:00
Lior Halphon
496c5589e6 Added window support 2018-03-03 19:36:21 +02:00
Lior Halphon
5ea33cc931 Cleanup 2018-03-03 19:05:29 +02:00
Lior Halphon
b08f02c4f3 Rewriting the PPU rendering: T-cycle accurate background rendering. DMG only, CGB completely broken 2018-03-03 15:47:36 +02:00
Lior Halphon
b702d56547 Merge branch 'master' into timing 
# Conflicts:
#	Core/display.c
#	Core/z80_cpu.c
 2018-03-01 21:22:33 +02:00
Lior Halphon
90a943d05a Emulate an HDMA quirk required to properly emulate Aevilia 2018-02-25 22:32:41 +02:00
Lior Halphon
ef670986c6 Rewrote PPU (currently only emulates DMG correctly) to use the new timing mechanism. Removed “future interrupts” (No longer required because SameBoy is now T-cycle based) 2018-02-25 00:48:45 +02:00
Lior Halphon
42ab746a66 Starting to remove the delayed interrupts hack – done for timer interrupt, broken for display interrupts 2018-02-23 15:33:44 +02:00
Lior Halphon
c48097a484 Convert div counter to the SM mechanism 2018-02-23 13:16:05 +02:00
Lior Halphon
9802ca41dd Components not affected by CGB’s double speed mode now operate in 8MHz mode to theoretically make advance_cycles(gb, 1) safe. 2018-02-20 21:17:12 +02:00
Lior Halphon
afcc66fb3c Added CPU under/over-clocking support in Core, add under-clocking hotkey in the Cocoa port, allow modifier keys to be configured as input keys in Cocoa. 2018-02-10 23:30:30 +02:00
Lior Halphon
1c61b006ba Added rewinding support to the core and the Cocoa frontend 2018-02-10 14:42:14 +02:00
Lior Halphon
95234036bb Added return value to GB_run API. 2018-01-31 15:18:04 +02:00
Lior Halphon
27b5718b07 Merge branch 'master' into libretro_core 2017-10-12 22:50:02 +03:00
Lior Halphon
a753e00b59 Added direct_access interface to interrupt_enable/IE register 2017-10-12 22:49:39 +03:00
Lior Halphon
40e4f93637 Replaced libretro specific code with a generic API 2017-10-12 22:06:01 +03:00
Lior Halphon
441781cbe9 Libretro .o files are now in the build/obj folder and are suffixed with _libretro (since they have different compilation flags). This also lets us rename gbmemory.c/h back to its original name. 2017-10-12 19:42:30 +03:00
Lior Halphon
9615ca6fa6 Merge pull request #14 from libretro/master 
libretro core
 2017-10-12 18:29:26 +03:00
Lior Halphon
65dd02cc52 Added 3 color correction profiles, added color correction setting to Cocoa GUI, improved cross-platform and cross-frontend save-state compatibility 2017-10-12 17:22:22 +03:00
twinaphex
a7db98c22e Memory needs to be uniquely named for Android 2017-10-09 11:36:55 -05:00
twinaphex
d433cdf260 Add baked-in generated BIOS files 2017-10-09 11:36:23 -05:00
Lior Halphon
1804a5c8e6 Updated save struct version 2017-09-23 00:25:21 +03:00
Lior Halphon
b9bdd6c49c Merge branch 'master' into new_apu 2017-09-10 02:33:40 +03:00
Lior Halphon
1e90400916 Reimplemented delayed/future interrupts, currently correct only for CGB. 2017-09-09 13:32:12 +03:00
Lior Halphon
0f643e01b7 Removing the delayed interrupt mechanism, research is not complete enough for implementation 2017-09-08 12:58:35 +03:00
Lior Halphon
ba0e66a5b7 Merge branch 'master' into new_apu 2017-09-04 18:41:13 +03:00
Lior Halphon
72d26c7046 Fixed obscure timer behavior, fixed regression in rapid_toggle.gb. 2017-09-04 18:40:43 +03:00
Lior Halphon
9bde98dede SCY latching is now correctly emulated, rendering mode timing refined. 2017-09-04 15:45:18 +03:00
Lior Halphon
54eb51d8db Refined timer interrupt timing 2017-09-02 22:08:20 +03:00
Lior Halphon
e7d5cdbb42 Merge branch 'master' into new_apu 2017-08-20 01:37:33 +03:00
Lior Halphon
cbbaf2ee84 Refined Window behavior once more, Fixes #12 (While not breaking Donkey Kong or 007) 2017-08-20 01:34:12 +03:00
Lior Halphon
d65c2247e5 Added channel 1 and 2, fixed accuracy issues with channel 3 2017-07-27 23:11:33 +03:00
Lior Halphon
a19ee1e5e0 2MHz audio downscaling support. Implemented NR50 and NR51. 2017-07-21 23:17:48 +03:00
Lior Halphon
baccf336d7 Complete rewrite of the APU. Channel 3 is complete and passes all the relevant tests from blargg’s suite, as well as PCM34-based tests. Actual sound output is basic and limited, though. 2017-07-21 19:06:55 +03:00
Lior Halphon
c4ccbd5cce Improved serial interrupt timing, fixes boot_sclk_align. 2017-06-23 17:58:04 +03:00
Lior Halphon
efbc385417 Forgot to amend the last commit, it was broken. 2017-06-21 01:07:11 +03:00
Lior Halphon
abf7efcc5a Fixed lcdon_write_timing. 2017-06-18 21:27:07 +03:00
Lior Halphon
86c9f9d89d Updated SameBoy to pass Mooneye-GB’s lcdon_timing test (on a DMG), as well as refined related CBG behaviors. 2017-06-17 22:17:58 +03:00
Lior Halphon
babcc0a7dc Added API to load/save states from RAM 2017-06-14 00:23:34 +03:00
Lior Halphon
a9475fbdf4 Refined the behavior of the last fix on a DMG. 2017-06-03 20:06:52 +03:00