2016-03-30 20:07:55 +00:00
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#include "gb.h"
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2017-04-21 13:00:53 +00:00
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#ifdef _WIN32
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2018-03-29 18:27:19 +00:00
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#ifndef _WIN32_WINNT
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2017-04-21 13:00:53 +00:00
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#define _WIN32_WINNT 0x0500
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2018-03-29 18:27:19 +00:00
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#endif
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2019-08-16 14:38:43 +00:00
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#include <windows.h>
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2017-04-21 13:00:53 +00:00
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#else
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#include <sys/time.h>
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#endif
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2021-11-06 23:10:58 +00:00
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static const unsigned TAC_TRIGGER_BITS[] = {512, 8, 32, 128};
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2018-02-23 11:16:05 +00:00
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2020-04-25 12:12:10 +00:00
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#ifndef GB_DISABLE_TIMEKEEPING
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2017-04-21 13:00:53 +00:00
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static int64_t get_nanoseconds(void)
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{
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#ifndef _WIN32
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struct timeval now;
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gettimeofday(&now, NULL);
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return (now.tv_usec) * 1000 + now.tv_sec * 1000000000L;
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#else
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FILETIME time;
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GetSystemTimeAsFileTime(&time);
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return (((int64_t)time.dwHighDateTime << 32) | time.dwLowDateTime) * 100L;
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#endif
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}
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static void nsleep(uint64_t nanoseconds)
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{
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#ifndef _WIN32
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struct timespec sleep = {0, nanoseconds};
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nanosleep(&sleep, NULL);
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#else
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HANDLE timer;
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LARGE_INTEGER time;
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timer = CreateWaitableTimer(NULL, true, NULL);
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time.QuadPart = -(nanoseconds / 100L);
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SetWaitableTimer(timer, &time, 0, NULL, NULL, false);
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WaitForSingleObject(timer, INFINITE);
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CloseHandle(timer);
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#endif
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}
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bool GB_timing_sync_turbo(GB_gameboy_t *gb)
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{
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if (!gb->turbo_dont_skip) {
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int64_t nanoseconds = get_nanoseconds();
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2018-02-10 21:30:30 +00:00
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if (nanoseconds <= gb->last_sync + (1000000000LL * LCDC_PERIOD / GB_get_clock_rate(gb))) {
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2017-04-21 13:00:53 +00:00
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return true;
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}
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gb->last_sync = nanoseconds;
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}
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return false;
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}
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void GB_timing_sync(GB_gameboy_t *gb)
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{
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2021-11-25 19:17:49 +00:00
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/* Prevent syncing if not enough time has passed.*/
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if (gb->cycles_since_last_sync < LCDC_PERIOD / 3) return;
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2017-06-03 14:02:12 +00:00
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if (gb->turbo) {
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gb->cycles_since_last_sync = 0;
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2021-11-25 19:17:49 +00:00
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if (gb->update_input_hint_callback) {
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gb->update_input_hint_callback(gb);
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}
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2017-06-03 14:02:12 +00:00
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return;
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}
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2021-11-25 19:17:49 +00:00
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2018-02-20 19:17:12 +00:00
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uint64_t target_nanoseconds = gb->cycles_since_last_sync * 1000000000LL / 2 / GB_get_clock_rate(gb); /* / 2 because we use 8MHz units */
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2017-04-21 13:00:53 +00:00
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int64_t nanoseconds = get_nanoseconds();
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2018-03-27 20:33:31 +00:00
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int64_t time_to_sleep = target_nanoseconds + gb->last_sync - nanoseconds;
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2021-03-21 13:15:04 +00:00
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if (time_to_sleep > 0 && time_to_sleep < LCDC_PERIOD * 1200000000LL / GB_get_clock_rate(gb)) { // +20% to be more forgiving
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2018-03-27 20:33:31 +00:00
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nsleep(time_to_sleep);
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2017-04-21 13:00:53 +00:00
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gb->last_sync += target_nanoseconds;
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}
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else {
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2021-04-01 23:54:14 +00:00
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if (time_to_sleep < 0 && -time_to_sleep < LCDC_PERIOD * 1200000000LL / GB_get_clock_rate(gb)) {
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2021-03-21 13:15:04 +00:00
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// We're running a bit too slow, but the difference is small enough,
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// just skip this sync and let it even out
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return;
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}
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2017-04-21 13:00:53 +00:00
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gb->last_sync = nanoseconds;
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}
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gb->cycles_since_last_sync = 0;
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2019-06-07 15:27:25 +00:00
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if (gb->update_input_hint_callback) {
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gb->update_input_hint_callback(gb);
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}
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2017-04-21 13:00:53 +00:00
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}
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2017-10-12 16:24:12 +00:00
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#else
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2016-03-30 20:07:55 +00:00
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2017-10-12 16:24:12 +00:00
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bool GB_timing_sync_turbo(GB_gameboy_t *gb)
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{
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return false;
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}
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void GB_timing_sync(GB_gameboy_t *gb)
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{
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2021-11-25 19:46:51 +00:00
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if (gb->cycles_since_last_sync < LCDC_PERIOD / 3) return;
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gb->cycles_since_last_sync = 0;
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2021-11-26 11:38:52 +00:00
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gb->cycles_since_last_sync = 0;
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if (gb->update_input_hint_callback) {
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gb->update_input_hint_callback(gb);
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2021-11-25 19:46:51 +00:00
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}
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2021-11-26 11:38:52 +00:00
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return;
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2017-10-12 16:24:12 +00:00
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}
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#endif
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2020-11-20 22:52:54 +00:00
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#define IR_DECAY 31500
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2022-02-01 21:23:24 +00:00
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#define IR_WARMUP 19900
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#define IR_THRESHOLD 240
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#define IR_MAX IR_THRESHOLD * 2 + IR_DECAY + 268
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2020-11-20 22:52:54 +00:00
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2021-11-06 23:10:58 +00:00
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static void ir_run(GB_gameboy_t *gb, uint32_t cycles)
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2016-07-20 22:03:13 +00:00
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{
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2022-02-01 21:23:24 +00:00
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/* TODO: the way this thing works makes the CGB IR port behave inaccurately when used together with HUC1/3 IR ports*/
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2022-01-30 16:11:35 +00:00
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if ((gb->model > GB_MODEL_CGB_E || !gb->cgb_mode) && gb->cartridge_type->mbc_type != GB_HUC1 && gb->cartridge_type->mbc_type != GB_HUC3) return;
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2022-02-13 14:58:44 +00:00
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bool is_sensing = (gb->io_registers[GB_IO_RP] & 0xC0) == 0xC0 ||
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2022-02-01 21:23:24 +00:00
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(gb->cartridge_type->mbc_type == GB_HUC1 && gb->huc1.ir_mode) ||
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(gb->cartridge_type->mbc_type == GB_HUC3 && gb->huc3.mode == 0xE);
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if (is_sensing && (gb->infrared_input || gb->cart_ir || (gb->io_registers[GB_IO_RP] & 1))) {
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2020-11-20 22:52:54 +00:00
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gb->ir_sensor += cycles;
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if (gb->ir_sensor > IR_MAX) {
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gb->ir_sensor = IR_MAX;
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}
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2022-02-01 21:23:24 +00:00
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gb->effective_ir_input = gb->ir_sensor >= IR_WARMUP + IR_THRESHOLD && gb->ir_sensor <= IR_WARMUP + IR_THRESHOLD + IR_DECAY;
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2020-11-20 22:52:54 +00:00
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}
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else {
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2022-02-01 21:23:24 +00:00
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unsigned target = is_sensing? IR_WARMUP : 0;
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if (gb->ir_sensor < target) {
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gb->ir_sensor += cycles;
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}
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else if (gb->ir_sensor <= target + cycles) {
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gb->ir_sensor = target;
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2020-11-20 22:52:54 +00:00
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}
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else {
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gb->ir_sensor -= cycles;
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}
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gb->effective_ir_input = false;
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2016-07-20 22:03:13 +00:00
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}
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2020-11-20 22:52:54 +00:00
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2016-07-20 22:03:13 +00:00
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}
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2016-08-06 10:56:29 +00:00
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static void advance_tima_state_machine(GB_gameboy_t *gb)
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{
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if (gb->tima_reload_state == GB_TIMA_RELOADED) {
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gb->tima_reload_state = GB_TIMA_RUNNING;
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}
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else if (gb->tima_reload_state == GB_TIMA_RELOADING) {
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2018-02-23 13:33:44 +00:00
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gb->io_registers[GB_IO_IF] |= 4;
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2016-08-06 10:56:29 +00:00
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gb->tima_reload_state = GB_TIMA_RELOADED;
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}
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}
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2018-02-23 11:16:05 +00:00
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static void increase_tima(GB_gameboy_t *gb)
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{
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gb->io_registers[GB_IO_TIMA]++;
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if (gb->io_registers[GB_IO_TIMA] == 0) {
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gb->io_registers[GB_IO_TIMA] = gb->io_registers[GB_IO_TMA];
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gb->tima_reload_state = GB_TIMA_RELOADING;
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}
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}
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2016-08-05 14:22:12 +00:00
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2021-11-06 23:10:58 +00:00
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void GB_set_internal_div_counter(GB_gameboy_t *gb, uint16_t value)
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2018-02-23 11:16:05 +00:00
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{
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/* TIMA increases when a specific high-bit becomes a low-bit. */
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2021-02-25 13:43:38 +00:00
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uint16_t triggers = gb->div_counter & ~value;
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2021-11-06 23:10:58 +00:00
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if ((gb->io_registers[GB_IO_TAC] & 4) && (triggers & TAC_TRIGGER_BITS[gb->io_registers[GB_IO_TAC] & 3])) {
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2018-02-23 11:16:05 +00:00
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increase_tima(gb);
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}
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2018-06-09 12:11:20 +00:00
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/* TODO: Can switching to double speed mode trigger an event? */
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2021-02-25 13:43:38 +00:00
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uint16_t apu_bit = gb->cgb_double_speed? 0x2000 : 0x1000;
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if (triggers & apu_bit) {
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2018-02-23 11:16:05 +00:00
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GB_apu_div_event(gb);
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2016-08-05 14:22:12 +00:00
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}
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2021-02-25 13:43:38 +00:00
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else {
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uint16_t secondary_triggers = ~gb->div_counter & value;
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if (secondary_triggers & apu_bit) {
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GB_apu_div_secondary_event(gb);
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}
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}
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2018-02-23 11:16:05 +00:00
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gb->div_counter = value;
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}
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2016-04-09 13:48:37 +00:00
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2021-11-06 23:10:58 +00:00
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static void timers_run(GB_gameboy_t *gb, uint8_t cycles)
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2018-02-23 11:16:05 +00:00
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{
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2020-02-15 17:21:43 +00:00
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if (gb->stopped) {
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2020-12-25 18:40:39 +00:00
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if (GB_is_cgb(gb)) {
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gb->apu.apu_cycles += 4 << !gb->cgb_double_speed;
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}
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2020-02-15 17:21:43 +00:00
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return;
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}
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2018-02-24 22:48:45 +00:00
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GB_STATE_MACHINE(gb, div, cycles, 1) {
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2018-02-23 11:16:05 +00:00
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GB_STATE(gb, div, 1);
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2018-02-23 13:33:44 +00:00
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GB_STATE(gb, div, 2);
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2018-02-23 11:16:05 +00:00
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}
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2018-03-31 12:52:31 +00:00
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GB_SLEEP(gb, div, 1, 3);
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2018-02-23 11:16:05 +00:00
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while (true) {
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2016-08-06 10:56:29 +00:00
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advance_tima_state_machine(gb);
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2018-02-23 11:16:05 +00:00
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GB_set_internal_div_counter(gb, gb->div_counter + 4);
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gb->apu.apu_cycles += 4 << !gb->cgb_double_speed;
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2018-02-23 13:33:44 +00:00
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GB_SLEEP(gb, div, 2, 4);
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2016-08-06 10:56:29 +00:00
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}
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2018-02-23 11:16:05 +00:00
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}
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2019-03-15 12:36:10 +00:00
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static void advance_serial(GB_gameboy_t *gb, uint8_t cycles)
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{
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2021-12-26 00:38:54 +00:00
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if (unlikely(gb->printer_callback && (gb->printer.command_state || gb->printer.bits_received))) {
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2021-02-26 14:40:35 +00:00
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gb->printer.idle_time += cycles;
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}
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2021-12-26 00:38:54 +00:00
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if (likely(gb->serial_length == 0)) {
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2019-03-15 12:36:10 +00:00
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gb->serial_cycles += cycles;
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return;
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}
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while (cycles > gb->serial_length) {
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advance_serial(gb, gb->serial_length);
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cycles -= gb->serial_length;
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}
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2017-06-23 14:58:04 +00:00
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uint16_t previous_serial_cycles = gb->serial_cycles;
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gb->serial_cycles += cycles;
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2019-03-15 12:36:10 +00:00
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if ((gb->serial_cycles & gb->serial_length) != (previous_serial_cycles & gb->serial_length)) {
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gb->serial_count++;
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if (gb->serial_count == 8) {
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2017-06-23 14:58:04 +00:00
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gb->serial_length = 0;
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2019-03-15 12:36:10 +00:00
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gb->serial_count = 0;
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2016-09-05 19:13:28 +00:00
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gb->io_registers[GB_IO_SC] &= ~0x80;
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gb->io_registers[GB_IO_IF] |= 8;
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}
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2019-03-15 12:36:10 +00:00
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gb->io_registers[GB_IO_SB] <<= 1;
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if (gb->serial_transfer_bit_end_callback) {
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gb->io_registers[GB_IO_SB] |= gb->serial_transfer_bit_end_callback(gb);
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}
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else {
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gb->io_registers[GB_IO_SB] |= 1;
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}
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if (gb->serial_length) {
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/* Still more bits to send */
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if (gb->serial_transfer_bit_start_callback) {
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gb->serial_transfer_bit_start_callback(gb, gb->io_registers[GB_IO_SB] & 0x80);
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}
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}
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2016-09-05 19:13:28 +00:00
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}
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2019-03-15 12:36:10 +00:00
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return;
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}
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2021-12-11 00:51:21 +00:00
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void GB_set_rtc_mode(GB_gameboy_t *gb, GB_rtc_mode_t mode)
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{
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if (gb->rtc_mode != mode) {
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gb->rtc_mode = mode;
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gb->rtc_cycles = 0;
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gb->last_rtc_second = time(NULL);
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}
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}
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void GB_set_rtc_multiplier(GB_gameboy_t *gb, double multiplier)
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{
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if (multiplier == 1) {
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gb->rtc_second_length = 0;
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return;
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}
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gb->rtc_second_length = GB_get_unmultiplied_clock_rate(gb) * 2 * multiplier;
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}
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|
2021-11-06 23:10:58 +00:00
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static void rtc_run(GB_gameboy_t *gb, uint8_t cycles)
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2021-02-25 20:12:14 +00:00
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{
|
2021-12-26 00:38:54 +00:00
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if (likely(gb->cartridge_type->mbc_type != GB_HUC3 && !gb->cartridge_type->has_rtc)) return;
|
2021-02-25 20:12:14 +00:00
|
|
|
gb->rtc_cycles += cycles;
|
|
|
|
time_t current_time = 0;
|
2021-12-11 00:51:21 +00:00
|
|
|
uint32_t rtc_second_length = unlikely(gb->rtc_second_length)? gb->rtc_second_length : GB_get_unmultiplied_clock_rate(gb) * 2;
|
2021-02-25 20:12:14 +00:00
|
|
|
|
|
|
|
switch (gb->rtc_mode) {
|
|
|
|
case GB_RTC_MODE_SYNC_TO_HOST:
|
|
|
|
// Sync in a 1/32s resolution
|
|
|
|
if (gb->rtc_cycles < GB_get_unmultiplied_clock_rate(gb) / 16) return;
|
|
|
|
gb->rtc_cycles -= GB_get_unmultiplied_clock_rate(gb) / 16;
|
|
|
|
current_time = time(NULL);
|
|
|
|
break;
|
|
|
|
case GB_RTC_MODE_ACCURATE:
|
2021-02-25 22:40:18 +00:00
|
|
|
if (gb->cartridge_type->mbc_type != GB_HUC3 && (gb->rtc_real.high & 0x40)) {
|
|
|
|
gb->rtc_cycles -= cycles;
|
|
|
|
return;
|
|
|
|
}
|
2021-12-11 00:51:21 +00:00
|
|
|
if (gb->rtc_cycles < rtc_second_length) return;
|
|
|
|
gb->rtc_cycles -= rtc_second_length;
|
2021-02-25 20:12:14 +00:00
|
|
|
current_time = gb->last_rtc_second + 1;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (gb->cartridge_type->mbc_type == GB_HUC3) {
|
|
|
|
while (gb->last_rtc_second / 60 < current_time / 60) {
|
|
|
|
gb->last_rtc_second += 60;
|
2021-11-06 23:10:58 +00:00
|
|
|
gb->huc3.minutes++;
|
|
|
|
if (gb->huc3.minutes == 60 * 24) {
|
|
|
|
gb->huc3.days++;
|
|
|
|
gb->huc3.minutes = 0;
|
2021-02-25 20:12:14 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
2021-04-15 21:35:54 +00:00
|
|
|
bool running = false;
|
|
|
|
if (gb->cartridge_type->mbc_type == GB_TPP1) {
|
|
|
|
running = gb->tpp1_mr4 & 0x4;
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
running = (gb->rtc_real.high & 0x40) == 0;
|
|
|
|
}
|
2021-02-25 20:12:14 +00:00
|
|
|
|
2021-04-15 21:35:54 +00:00
|
|
|
if (running) { /* is timer running? */
|
2021-02-25 20:12:14 +00:00
|
|
|
while (gb->last_rtc_second + 60 * 60 * 24 < current_time) {
|
|
|
|
gb->last_rtc_second += 60 * 60 * 24;
|
2021-04-15 21:35:54 +00:00
|
|
|
if (gb->cartridge_type->mbc_type == GB_TPP1) {
|
|
|
|
if (++gb->rtc_real.tpp1.weekday == 7) {
|
|
|
|
gb->rtc_real.tpp1.weekday = 0;
|
|
|
|
if (++gb->rtc_real.tpp1.weeks == 0) {
|
|
|
|
gb->tpp1_mr4 |= 8; /* Overflow bit */
|
2021-04-10 20:56:41 +00:00
|
|
|
}
|
|
|
|
}
|
2021-04-15 21:35:54 +00:00
|
|
|
}
|
|
|
|
else if (++gb->rtc_real.days == 0) {
|
|
|
|
if (gb->rtc_real.high & 1) { /* Bit 8 of days*/
|
|
|
|
gb->rtc_real.high |= 0x80; /* Overflow bit */
|
2021-02-25 20:12:14 +00:00
|
|
|
}
|
2021-04-15 21:35:54 +00:00
|
|
|
|
|
|
|
gb->rtc_real.high ^= 1;
|
2021-02-25 20:12:14 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
while (gb->last_rtc_second < current_time) {
|
|
|
|
gb->last_rtc_second++;
|
|
|
|
if (++gb->rtc_real.seconds != 60) continue;
|
|
|
|
gb->rtc_real.seconds = 0;
|
|
|
|
|
|
|
|
if (++gb->rtc_real.minutes != 60) continue;
|
|
|
|
gb->rtc_real.minutes = 0;
|
|
|
|
|
2021-04-10 20:56:41 +00:00
|
|
|
if (gb->cartridge_type->mbc_type == GB_TPP1) {
|
2021-04-15 21:35:54 +00:00
|
|
|
if (++gb->rtc_real.tpp1.hours != 24) continue;
|
|
|
|
gb->rtc_real.tpp1.hours = 0;
|
|
|
|
if (++gb->rtc_real.tpp1.weekday != 7) continue;
|
|
|
|
gb->rtc_real.tpp1.weekday = 0;
|
|
|
|
if (++gb->rtc_real.tpp1.weeks == 0) {
|
|
|
|
gb->tpp1_mr4 |= 8; /* Overflow bit */
|
2021-04-10 20:56:41 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
else {
|
2021-04-15 21:35:54 +00:00
|
|
|
if (++gb->rtc_real.hours != 24) continue;
|
|
|
|
gb->rtc_real.hours = 0;
|
|
|
|
|
|
|
|
if (++gb->rtc_real.days != 0) continue;
|
|
|
|
|
2021-04-10 20:56:41 +00:00
|
|
|
if (gb->rtc_real.high & 1) { /* Bit 8 of days*/
|
|
|
|
gb->rtc_real.high |= 0x80; /* Overflow bit */
|
|
|
|
}
|
|
|
|
|
|
|
|
gb->rtc_real.high ^= 1;
|
2021-02-25 20:12:14 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2019-03-15 12:36:10 +00:00
|
|
|
void GB_advance_cycles(GB_gameboy_t *gb, uint8_t cycles)
|
2020-05-09 21:37:52 +00:00
|
|
|
{
|
2021-12-26 00:38:54 +00:00
|
|
|
if (unlikely(gb->speed_switch_countdown)) {
|
2021-07-11 09:25:39 +00:00
|
|
|
if (gb->speed_switch_countdown == cycles) {
|
|
|
|
gb->cgb_double_speed ^= true;
|
|
|
|
gb->speed_switch_countdown = 0;
|
|
|
|
}
|
|
|
|
else if (gb->speed_switch_countdown > cycles) {
|
|
|
|
gb->speed_switch_countdown -= cycles;
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
uint8_t old_cycles = gb->speed_switch_countdown;
|
|
|
|
cycles -= old_cycles;
|
|
|
|
gb->speed_switch_countdown = 0;
|
|
|
|
GB_advance_cycles(gb, old_cycles);
|
|
|
|
gb->cgb_double_speed ^= true;
|
|
|
|
}
|
|
|
|
}
|
2020-05-09 21:37:52 +00:00
|
|
|
gb->apu.pcm_mask[0] = gb->apu.pcm_mask[1] = 0xFF; // Sort of hacky, but too many cross-component interactions to do it right
|
2019-03-15 12:36:10 +00:00
|
|
|
// Affected by speed boost
|
2022-01-18 23:24:40 +00:00
|
|
|
gb->dma_cycles = cycles;
|
2019-03-15 12:36:10 +00:00
|
|
|
|
2021-11-06 23:10:58 +00:00
|
|
|
timers_run(gb, cycles);
|
2021-12-26 00:38:54 +00:00
|
|
|
if (unlikely(!gb->stopped)) {
|
2019-06-07 10:53:50 +00:00
|
|
|
advance_serial(gb, cycles); // TODO: Verify what happens in STOP mode
|
|
|
|
}
|
2016-09-05 19:13:28 +00:00
|
|
|
|
2021-12-26 00:38:54 +00:00
|
|
|
if (unlikely(gb->speed_switch_halt_countdown)) {
|
2021-07-10 12:07:23 +00:00
|
|
|
gb->speed_switch_halt_countdown -= cycles;
|
|
|
|
if (gb->speed_switch_halt_countdown <= 0) {
|
|
|
|
gb->speed_switch_halt_countdown = 0;
|
|
|
|
gb->halted = false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-09-16 08:58:31 +00:00
|
|
|
gb->debugger_ticks += cycles;
|
2021-07-10 12:07:23 +00:00
|
|
|
|
|
|
|
if (gb->speed_switch_freeze) {
|
|
|
|
if (gb->speed_switch_freeze >= cycles) {
|
|
|
|
gb->speed_switch_freeze -= cycles;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
cycles -= gb->speed_switch_freeze;
|
|
|
|
gb->speed_switch_freeze = 0;
|
|
|
|
}
|
2016-09-16 08:58:31 +00:00
|
|
|
|
2021-12-26 00:38:54 +00:00
|
|
|
if (unlikely(!gb->cgb_double_speed)) {
|
2018-03-05 19:17:37 +00:00
|
|
|
cycles <<= 1;
|
|
|
|
}
|
2019-01-12 23:09:41 +00:00
|
|
|
|
2021-07-11 09:25:39 +00:00
|
|
|
gb->absolute_debugger_ticks += cycles;
|
|
|
|
|
2016-03-30 20:07:55 +00:00
|
|
|
// Not affected by speed boost
|
2021-12-26 00:38:54 +00:00
|
|
|
if (likely(gb->io_registers[GB_IO_LCDC] & 0x80)) {
|
2020-12-25 18:40:39 +00:00
|
|
|
gb->double_speed_alignment += cycles;
|
|
|
|
}
|
2021-12-26 13:20:46 +00:00
|
|
|
gb->apu_output.sample_cycles += cycles * gb->apu_output.sample_rate;
|
2017-04-21 13:00:53 +00:00
|
|
|
gb->cycles_since_last_sync += cycles;
|
2018-01-31 13:18:04 +00:00
|
|
|
gb->cycles_since_run += cycles;
|
2019-10-19 16:26:04 +00:00
|
|
|
|
2021-04-10 20:56:41 +00:00
|
|
|
gb->rumble_on_cycles += gb->rumble_strength & 3;
|
|
|
|
gb->rumble_off_cycles += (gb->rumble_strength & 3) ^ 3;
|
|
|
|
|
2022-01-14 15:09:39 +00:00
|
|
|
GB_apu_run(gb, false);
|
|
|
|
GB_display_run(gb, cycles, false);
|
2021-12-26 00:38:54 +00:00
|
|
|
if (unlikely(!gb->stopped)) { // TODO: Verify what happens in STOP mode
|
2019-06-07 10:53:50 +00:00
|
|
|
GB_dma_run(gb);
|
|
|
|
}
|
2021-11-06 23:10:58 +00:00
|
|
|
ir_run(gb, cycles);
|
|
|
|
rtc_run(gb, cycles);
|
2016-03-30 20:07:55 +00:00
|
|
|
}
|
|
|
|
|
2016-08-05 14:22:12 +00:00
|
|
|
/*
|
|
|
|
This glitch is based on the expected results of mooneye-gb rapid_toggle test.
|
|
|
|
This glitch happens because how TIMA is increased, see GB_set_internal_div_counter.
|
|
|
|
According to GiiBiiAdvance, GBC's behavior is different, but this was not tested or implemented.
|
|
|
|
*/
|
|
|
|
void GB_emulate_timer_glitch(GB_gameboy_t *gb, uint8_t old_tac, uint8_t new_tac)
|
|
|
|
{
|
|
|
|
/* Glitch only happens when old_tac is enabled. */
|
|
|
|
if (!(old_tac & 4)) return;
|
|
|
|
|
2021-11-06 23:10:58 +00:00
|
|
|
unsigned old_clocks = TAC_TRIGGER_BITS[old_tac & 3];
|
|
|
|
unsigned new_clocks = TAC_TRIGGER_BITS[new_tac & 3];
|
2016-08-05 14:22:12 +00:00
|
|
|
|
|
|
|
/* The bit used for overflow testing must have been 1 */
|
2018-12-31 20:06:20 +00:00
|
|
|
if (gb->div_counter & old_clocks) {
|
2016-08-05 14:22:12 +00:00
|
|
|
/* And now either the timer must be disabled, or the new bit used for overflow testing be 0. */
|
2021-10-10 13:53:07 +00:00
|
|
|
if (!(new_tac & 4) || !(gb->div_counter & new_clocks)) {
|
2016-08-05 14:22:12 +00:00
|
|
|
increase_tima(gb);
|
2016-03-30 20:07:55 +00:00
|
|
|
}
|
|
|
|
}
|
2016-07-17 21:39:43 +00:00
|
|
|
}
|