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750 Commits

Author SHA1 Message Date
Lior Halphon
4f9c8e9374 Match the HLE timings to the LLE timings 2019-07-19 20:19:09 +03:00
Lior Halphon
ea7dec4e88 Merge branch 'master' into bsnes_integration 2019-07-19 15:51:10 +03:00
Lior Halphon
33198fc7b7 Give SGB its own conflict map 2019-07-19 15:50:49 +03:00
Lior Halphon
df7f7d8171 Fix silly desync inaccuracy 2019-07-18 22:55:11 +03:00
Lior Halphon
772289c545 Fix a silly bug 2019-07-18 00:53:11 +03:00
Lior Halphon
9efd20d7cd Revert "Silence some GCC warnings" 
This reverts commit 11a9f1df21.
 2019-07-16 23:33:07 +03:00
Lior Halphon
11a9f1df21 Silence some GCC warnings 2019-07-16 23:27:35 +03:00
Lior Halphon
9ba6915c85 ICD JOYP write API 2019-07-16 21:42:57 +03:00
Lior Halphon
2d7f54a775 Load ROM from buffer API 2019-07-16 21:04:29 +03:00
Lior Halphon
ce9ce07817 Make the ICD APIs pixel based 2019-07-16 20:44:27 +03:00
Lior Halphon
346e499602 ICD APIs 2019-07-15 23:02:58 +03:00
Lior Halphon
e1873ad2ec Add JOYP write callback API 2019-07-15 22:35:21 +03:00
Lior Halphon
2bfe922650 Allow emulating an SGB without SFC HLE 2019-07-15 20:47:16 +03:00
Lior Halphon
9f7255cd23 Make the automation results more consistent across revisions, and making use of this change as a chance to add color correction to the automation 2019-07-13 20:29:11 +03:00
Lior Halphon
8c8d5afe62 Make the debugger compatible with more sym formats 2019-07-13 17:17:55 +03:00
Lior Halphon
f55c254959 Fixed a regression that made ly_lyc_0_write and ly_lyc_write fail 2019-07-12 02:18:25 +03:00
Lior Halphon
4541efe86a Fixed a bug that prevented writing to the wave RAM, as well as a bug where the wave RAM was treated as zeros despite not being zero’d out 2019-06-29 14:03:42 +03:00
Lior Halphon
36a87f96bd Formatting 2019-06-21 16:58:56 +03:00
Lior Halphon
24b58da8c6 Minor text change 2019-06-21 14:18:48 +03:00
Lior Halphon
7c61445fe3 Fixed out of bound read in GB_load_state_from_buffer. Closes #104 2019-06-21 03:04:38 +03:00
Lior Halphon
72b1fe0500 Minor Fixes™ 2019-06-21 01:03:52 +03:00
Lior Halphon
50a6a3e35c Fix libretro SGB1 FPS, fix un/serialization memory corruptions in libretro 2019-06-19 23:49:43 +03:00
Lior Halphon
91b0e491c5 Increase the minimum required cycles for a sync, fix SGB jingle audio 2019-06-19 22:44:54 +03:00
Lior Halphon
431f1f8199 Remove redundant calls to display_vblank on non-SGB models and in irregular FPS scenarios. Affects #161 2019-06-18 23:16:28 +03:00
Lior Halphon
e268efefef Redesign and reimplement the audio API, let the frontends handle more stuff. Probably affects #161 2019-06-15 23:22:27 +03:00
Lior Halphon
8b7922b679 Fix #144 by ignored malformed commands with 0 length 2019-06-15 03:42:53 +03:00
Lior Halphon
66b814a226 Don’t use libc’s random/rand 2019-06-14 16:49:41 +03:00
Lior Halphon
843683a492 Randomize everything! 2019-06-09 18:14:32 +03:00
Lior Halphon
49d8a5cb44 Fixed the parsing of comparison operators as well as their priorities. Fixes #155 2019-06-08 16:08:07 +03:00
Lior Halphon
0da2930109 Fix #175 2019-06-08 14:35:52 +03:00
Lior Halphon
274760746e Fix #165 2019-06-07 19:18:07 +03:00
Lior Halphon
9d8adbb581 This is not correct, this bug only affects the PCM registers and not actual output. Currently not emulated at all. 2019-06-07 18:37:19 +03:00
Lior Halphon
2f9de4942c Increase input polling frequency in the Cocoa and SDL frontends, should make inputs look less synthetic and potentially reduce input lag 2019-06-07 18:27:25 +03:00
Lior Halphon
64879f5b02 Accurate emulation of (most aspects of) stop mode 2019-06-07 13:53:50 +03:00
Lior Halphon
4c34e0a6e0 Turns out the AGB inverts Channel 3’s output 2019-06-01 18:22:58 +03:00
Lior Halphon
6888047102 Show flags in the registers command 2019-06-01 16:42:17 +03:00
Lior Halphon
cdc36f329e Added open dialog to the SDL GUI, misc fixes 2019-06-01 14:29:46 +03:00
Lior Halphon
1de34b12ac
Merge pull request #181 from ISSOtm/master 
Fix sample lengths for CH1, 2 and 4
 2019-05-25 21:09:47 +03:00
Lior Halphon
85c43fa81f Fixed Channel 3’s first sample behavior, update analog characteristic to more realistic values. Fixes #177 2019-05-25 19:12:09 +03:00
Lior Halphon
3e724afb0a Basic SGB support in the SDL port 2019-05-18 18:45:31 +03:00
ISSOtm
ec5d1b7b88 Fix sample lengths for CH1, 2 and 4 2019-05-18 03:01:20 +02:00
Lior Halphon
3ee2c64899 Make the apu command a bit safer 2019-05-17 22:03:23 +03:00
Lior Halphon
6648a0a84d Minor adjustments and style fixes to the new APU debug functions 2019-05-17 20:48:49 +03:00
Lior Halphon
280467ad38
Merge branch 'master' into master 2019-05-17 20:31:52 +03:00
Lior Halphon
91eeb4d9d5 Emulate AGB audio mixing 2019-05-17 00:08:34 +03:00
ISSOtm
40f83c8f25 Add APU-related debugger commands 
This change includes making one of the APU functions public
 2019-05-15 12:45:51 +02:00
Lior Halphon
ddc4e7484b Fix and restore optimization 2019-05-10 22:29:30 +03:00
Lior Halphon
06670fc970 Fix #172. Allow unroll optimizations when compiling with GCC. 2019-05-10 21:51:11 +03:00
orbea
2bded45397 Disable pragmas for gcc. 2019-05-09 10:55:31 -07:00
Lior Halphon
82ce597573 Line breaks 2019-04-12 20:30:02 +03:00
Lior Halphon
05cd81b77c Implemented jump-to breakpoints 2019-04-12 20:29:43 +03:00
Lior Halphon
7242ddae64 speling is difikult 2019-03-16 20:56:22 +02:00
Lior Halphon
c342663200 Emulate serial bit shifting, update the serial API to use bits instead of bytes, update printer emulation and libretro to use the new API 2019-03-15 14:36:10 +02:00
Lior Halphon
0b03b61564 Render the first line 0, as required for SGB emulation 2019-02-16 04:19:16 +02:00
Lior Halphon
9d0aadb83f Emulate missing Vreset signal (SGB only for now) and ICD2 desyncing 2019-02-15 17:04:48 +02:00
Lior Halphon
dde06e7cae Work around a crashing race condition, proper fix needed 2019-01-28 20:56:37 +02:00
Lior Halphon
b996ed9220 Writing to BGPD/OBPD while it’s blocked still increases BGPI/OBPI if needed. Fixes #145 2019-01-19 23:37:44 +02:00
Lior Halphon
73a54049d2 Accurate PPU access timings 2019-01-19 19:32:26 +02:00
Lior Halphon
4536581a6e Fixed a bug where modifying RTC data would corrupt cartridge RAM data. Fixes #136 2019-01-18 02:36:14 +02:00
Lior Halphon
312478e509 CGB palettes are not accessible during Mode 3, closes #84 2019-01-14 22:22:46 +02:00
Lior Halphon
879d3b607d Removed verified TODO 2019-01-14 20:32:52 +02:00
Lior Halphon
ba5c07bed9 Correctly emulate speed switch timing 2019-01-13 01:09:41 +02:00
Lior Halphon
c74b39e712 The CPU core of the Game Boy is (most likely) called SM83 2019-01-12 00:42:16 +02:00
Lior Halphon
21d2a59a5f Fixed a very rare edge case where an interrupt occurs when SP=FF11 2019-01-12 00:39:24 +02:00
Lior Halphon
4e2b5bb336 Fix the GB_run_frame API in SGB mode 2019-01-11 21:53:21 +02:00
Lior Halphon
7b36ee10a4 Merge branch 'master' into sgb 2019-01-05 19:00:22 +02:00
Lior Halphon
ae959cd878 ATTR_LIN and ATTR_DIV 2019-01-05 18:59:50 +02:00
Lior Halphon
4051f190a5 Cache cycles_per_sample to avoid FP arithmetic 2019-01-01 00:42:40 +02:00
Lior Halphon
9d947c7ce6 Unroll some APU loops 2018-12-31 23:09:56 +02:00
Lior Halphon
af0430dbc5 Unroll some loops in PPU code, more efficient timer handling 2018-12-31 22:06:20 +02:00
Lior Halphon
21eb96a2f5 Joypad multiplayer support (Cocoa) 2018-12-15 18:55:41 +02:00
Lior Halphon
612cd07fb3 Fixed emulation of echo RAM 2018-12-12 23:44:00 +02:00
Lior Halphon
ea09dfc888 Fixed multiplayer SGB mode 2018-12-04 23:46:30 +02:00
Lior Halphon
b1a2e45168 Improvements to the SGB animation 2018-12-01 13:39:43 +02:00
Lior Halphon
6d28e74667 Color 0 must always be shared 2018-11-24 15:53:53 +02:00
Lior Halphon
4b93f89763 Correct emulation of color masks 2018-11-24 15:42:54 +02:00
Lior Halphon
389d8ae045 Halt the CPU while the SGB animation is playing 2018-11-24 13:34:07 +02:00
Lior Halphon
2d6d1e6325 SGB boot animation 2018-11-24 13:21:00 +02:00
Lior Halphon
b3166135eb Clean up that crashing mess I made 2018-11-23 19:59:15 +02:00
Lior Halphon
558f9b9bae Updated SGB border, add “2” to SGB2 2018-11-23 14:16:48 +02:00
Lior Halphon
67d52b78b6 Handling interrupted SGB commands 2018-11-17 12:26:07 +02:00
Lior Halphon
af5ef50cf9 Fixing default border 2018-11-17 01:39:38 +02:00
Lior Halphon
deb5e21842 More colorization commands 2018-11-17 00:44:18 +02:00
Lior Halphon
b698ce5d95 Correctly emulate SGB border color 0 2018-11-17 00:44:07 +02:00
Lior Halphon
e5e7ce8203 Basic colorization 2018-11-16 22:05:35 +02:00
Lior Halphon
d42cbcdee2 Palette transfer functions 2018-11-16 19:11:21 +02:00
Lior Halphon
91a3091b2e Build fix 2018-11-16 17:41:23 +02:00
Lior Halphon
2710939e1e That should be an inc file 2018-11-16 17:38:53 +02:00
Lior Halphon
595907cae2 Border fade animation 2018-11-16 17:36:21 +02:00
Lior Halphon
69ac36cca1 Add default SGB border 2018-11-16 17:22:57 +02:00
Lior Halphon
398148f7ea Basic SGB border support 2018-11-16 16:04:40 +02:00
Lior Halphon
382d9f8898 MASK_EN support 2018-11-16 12:42:52 +02:00
Lior Halphon
2f2b792edf SGB save states 2018-11-16 01:53:01 +02:00
Lior Halphon
634a54c046 SGB resolution support (Cocoa only so far) 2018-11-15 00:21:21 +02:00
Lior Halphon
6ba5cfbeef Support for multi-packet SGB commands 2018-11-13 23:45:26 +02:00
Lior Halphon
7735d638c6 Multiplayer SGB APIs/SGB detection 2018-11-12 00:37:06 +02:00
Lior Halphon
5c581651ce Handle the SGB header commands, disable SGB functions if needed. 2018-11-11 22:50:00 +02:00
Lior Halphon
44891d5c4a Initial code to support SGB, command “parsing”, replacement SGB boot ROM 2018-11-11 01:16:32 +02:00
Lior Halphon
94136f5741 Adjust DAC attributes to fix LADX’s crackling audio (Fixes #125) while keeping Cannon Fodder’s buzzing reasonable (Proper audio measurements still required) 2018-11-10 19:14:18 +02:00
Lior Halphon
a39b314378 Fixed silly APU regression (Noise volume envelope ran too fast) Fixes #121 2018-11-03 14:37:19 +02:00
Lior Halphon
c9d6a1381f Cross emulator compatibility with RTC saves 2018-11-03 01:31:14 +02:00
Lior Halphon
64922fff4b Fixed a bug where channels 1 and 2 would start playing earlier than they should have if NRx4 was written to twice. Fixes #86. 2018-10-29 00:44:43 +02:00
Lior Halphon
3035f43428 Emulation of DAC charging, Fixes #46, #85, #88 and #89 2018-10-19 23:53:01 +03:00
Lior Halphon
4276549acd Research notes TODOs 2018-10-19 01:02:27 +03:00
Lior Halphon
324201f336 Correct emulation of switching the DACs on and off. Fixes #100 and #87 2018-10-17 20:35:29 +03:00
Lior Halphon
e9b78b6370
Merge pull request #114 from RobLoach/patch-2 
Fix control reaches end of non-void function
 2018-10-12 17:10:11 +03:00
Rob Loach
2da7a3f7fb
Fix the return value of read_lvalue to be 0 2018-10-12 10:09:30 -04:00
Rob Loach
e834d32b8e
Update switch to just return at the end instead 2018-10-12 09:41:25 -04:00
Rob Loach
ec41e87cf1
Update logic behind params 2018-10-11 22:39:43 -04:00
Rob Loach
b8825127fd
Fix parentheses around ‘+’ in operand of ‘&’ 
```
Core/z80_cpu.c: In function ‘add_hl_rr’:
Core/z80_cpu.c:341:31: error: suggest parentheses around ‘+’ in operand of ‘&’ [-Werror=parentheses]
     if ( ((unsigned long) hl) + ((unsigned long) rr) & 0x10000) {
          ~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~
```
 2018-10-11 22:37:26 -04:00
Rob Loach
f4ee044347
Fix control reaches end of non-void function 
This change makes it so that there is a return value when a kind doens't match. Allows -Werror=return-type to pass.

```
Core/debugger.c: In function ‘read_lvalue’:
Core/debugger.c:239:1: error: control reaches end of non-void function [-Werror=return-type]
 }
```
 2018-10-11 22:17:16 -04:00
Lior Halphon
11c148c851 Starting G/HDMA directly takes one more M-cycle (More research required) 2018-09-15 00:48:31 +03:00
Lior Halphon
dbc338a887 Compensate for prefetch in DIV’s initial value 2018-09-15 00:47:26 +03:00
Lior Halphon
ec0a879a93 Correct emulation of enabling and disabling the volume envelope. Correct emulation of a glitch where the volume envelope ticks when it usually wouldn’t. 2018-09-10 16:59:59 +03:00
Lior Halphon
3151821e6d Fixed minor APU regression (Channels 1 and 2 were given no delay under certain circumstances) 2018-09-09 12:50:55 +03:00
Maximilian Mader
a36dd791ec
Rewrite the DAA instruction 2018-07-22 18:37:34 +02:00
Lior Halphon
f7b882f0e8 Whoops 2018-07-22 02:10:26 +03:00
Lior Halphon
b7426f93c0 Randomize object palettes. Slightly more accurate emulation of FF4C. 2018-07-20 23:23:47 +03:00
Lior Halphon
ce80acc818 Fixed HDMA timing )But still not verified) 2018-07-20 12:34:52 +03:00
Lior Halphon
b1cc55b786 Turns out Left/Right audio channels were flipped 2018-07-19 20:38:11 +03:00
Lior Halphon
c66b6fbafc Fixed an edge case with DAC discharge emulation 2018-07-16 23:08:25 +03:00
Lior Halphon
2e9e3424ec Document some revision differences 2018-07-14 21:52:54 +03:00
Lior Halphon
0145b790a3 Merge branch 'v0.11.x' 2018-07-11 20:08:33 +03:00
Lior Halphon
5f58323c01 Attempt to improve audio quality on frontend with big audio buffers 2018-07-10 21:33:03 +03:00
Lior Halphon
dc5cb71c22 Emulate CGB-C’s quirky LFSR function 2018-07-04 21:55:12 +03:00
Lior Halphon
f3437d7cc0 Added todo 2018-07-03 23:47:50 +03:00
Lior Halphon
b7b35c9b59 CGB-C timing 2018-07-03 22:25:09 +03:00
Lior Halphon
0a78f735d3 Fetcher Y is not cached on CGB-C 2018-07-03 22:14:53 +03:00
Lior Halphon
18ae18a95c LYC bit on CGB-C 2018-07-03 21:56:32 +03:00
Lior Halphon
a7aabca618 Starting to add CGB-C support 2018-07-03 21:43:46 +03:00
Lior Halphon
47a74cb6c3 Randomize initial RAM values. Closes #82 2018-06-30 16:53:28 +03:00
Lior Halphon
2791775c5d Improvements to the lcd debugger command 2018-06-22 18:38:54 +03:00
Lior Halphon
6a7c084177 Fixed window regression 2018-06-18 21:57:01 +03:00
Lior Halphon
d81c23cb16 Fixed HDMA regression 2018-06-16 23:52:24 +03:00
Lior Halphon
45c73e0175 Replaced the is_cgb bool with a more future compatible model enum. Removed the GB_init_cgb API and replaced it with an extended GB_init and GB_switch_model_and_reset APIs that now receive a model parameter. Increased the struct version. 2018-06-16 13:59:33 +03:00
Lior Halphon
d95ad1ca54 SWAP was incorrectly disassembled as RLC 2018-06-09 15:39:40 +03:00
Lior Halphon
38c0cb3323 Typo 2018-06-09 15:12:42 +03:00
Lior Halphon
f64da1864f APU glitch: When turning the APU on while DIV's bit 4 (or 5 in double speed mode), the first DIV/APU event is skipped. 2018-06-09 15:11:20 +03:00
Lior Halphon
593cb7c107 Pixel accurate emulation of Prehistorik Man on a CGB-CPU-E 2018-06-08 18:44:03 +03:00
Lior Halphon
ca01ff6f79 Finally, perfect emulation of the STAT write bug. 2018-06-08 17:16:15 +03:00
Lior Halphon
127324d2d6 Fixed regression involving rendering a window with negative X position. Closes #75 2018-06-07 23:08:46 +03:00
Lior Halphon
f1dfa2a1bc More sensible implementation of the STAT interrupt. 2018-06-04 02:07:38 +03:00
Lior Halphon
0481ff9af5 Whoops 2018-06-04 01:52:24 +03:00
Lior Halphon
8721a48206 Fixed incorrect double speed behavior. 2018-06-03 00:36:05 +03:00
Lior Halphon
7003e31b7e Fixed a regression with STAT blocking. 2018-06-02 04:00:10 +03:00
Lior Halphon
80c92daacd Include cleanup (#73) 2018-05-27 19:30:23 +03:00
Lior Halphon
6532aef089 Correct emulation of the DMG stat write bug 2018-05-26 18:06:40 +03:00
Lior Halphon
9693b2de6a Refined the STAT bug behavior. Still not perfect. 2018-05-26 17:06:49 +03:00
Lior Halphon
855ffb490a A HBlank interrupt cannot occur in the last M-cycle of HBlank. Correct emulation of STAT access conflicts on the CGB (Test: CPU-E, single speed only). Fixes a minor graphical glitch in Pokémon Puzzle Challenge. 2018-05-25 23:42:36 +03:00
Lior Halphon
249acb04cc Verified some timings on a DMG. Fixed palette write conflict timing (Although the fix kind of implies time traveling). Closes #65 2018-05-16 00:59:11 +03:00
Lior Halphon
562b43a7c5 Notes about the DMG wave-ram glitch 2018-05-15 23:02:07 +03:00
Lior Halphon
7df571d42f Less strict matching for delete and unwatch. Fixes #71 2018-05-13 23:17:23 +03:00
Lior Halphon
1fcde88d8a Improved accuracy of the halt bug 2018-05-12 22:13:52 +03:00
Lior Halphon
713dc02e46 A bit tacky, but T-cycle accurate emulation of LYC write conflicts on the CGB. Only single speed mode verified. Closes #54 2018-05-11 12:38:55 +03:00
Lior Halphon
af3554c1d1 More accurate emulation of the LYC register and interrupt. (Still not perfect on a CGB) 2018-04-27 13:40:39 +03:00
Lior Halphon
0f8385a798 Refined line 153 behavior on a CGB. Verified on CGB-E. 2018-04-25 00:08:06 +03:00
Lior Halphon
be9df4d658 Added mechanism to handle MMIO read/write conflicts. Fixes #65 2018-04-14 17:57:00 +03:00
Lior Halphon
2c6f7906c5 Make multi-byte opcodes trigger the OAM bug when they increase PC 2018-04-14 15:32:55 +03:00
Lior Halphon
84aa06aba5 Clean up OAM bug code 2018-04-14 13:35:16 +03:00
Lior Halphon
d667d87bbe Refactor CPU code so handling access conflicts is possible 2018-04-14 13:25:55 +03:00
Lior Halphon
f1ec42d4ba H/GDMA was 4 times faster than it should have been. Made it also more accurate. Fixes #56 2018-04-13 14:41:39 +03:00
orbea
10dc12c502 Core: Fix libretro builds 2018-04-11 14:21:46 -07:00
Lior Halphon
89094950f8 Correct emulation of mapping both button sets. Fixes #60 2018-04-07 16:45:31 +03:00
Lior Halphon
5be2b3db29 It appears that OAM DMA blocks PPU access to OAM 2018-04-07 13:59:36 +03:00
Lior Halphon
0725b008be Further simplifications 2018-04-07 13:02:53 +03:00
Lior Halphon
097b768127 Update comments 2018-04-07 03:36:47 +03:00
Lior Halphon
9ce028056a Cleanup 2018-04-07 03:26:10 +03:00
Lior Halphon
fed2556fc3 More reasonable implementation of sprite timings 2018-04-07 03:00:26 +03:00
Lior Halphon
0751eae90b Moved the fetcher state machine to another function 2018-04-06 19:29:49 +03:00
Lior Halphon
0461fb5b2a Simplified FIFO logic 2018-04-06 19:11:48 +03:00
Lior Halphon
cb01259073 Fixed #61 2018-04-06 11:37:49 +03:00
Lior Halphon
0c86ff1ee4 More CGB revision quirks 2018-04-06 04:00:37 +03:00
Lior Halphon
a6ed2029b7 New information about PPU changes between CGB-B and CGB-E 2018-04-06 03:19:47 +03:00
Lior Halphon
cc95c89d3c Surprise! The CGB has a 16-bit VRAM data bus 2018-04-05 16:15:51 +03:00
Lior Halphon
9aadc80f75 Implemented some obscure PPU rendering quirks, verified some timings 2018-04-05 15:33:21 +03:00
Lior Halphon
d785e45308 More accurate emulation of LCDC.0 2018-04-05 12:27:01 +03:00
Lior Halphon
d8e0683c35 Fixed a bug where skipping a sprite by modifying LCDC flags mid-scanline will disable sprites for the rest of the scalene. 2018-04-05 00:51:37 +03:00
Lior Halphon
5d63892949 T-cycle accurate timing of the extra OAM interrupt. Fixes vblank_stat_intr-GS, related to #54 2018-04-03 01:43:24 +03:00
Lior Halphon
ba07e7ba85 Fixed a bug where 0:$dxxx reads/writes from the wrong bank in CGB mode. Made sure symbols are reset after reloading a sym file. 2018-04-02 19:57:39 +03:00
Lior Halphon
e163026ca9 The STAT bug does not occur during the glitched mode 0 2018-04-02 01:05:32 +03:00
Lior Halphon
9339a6027f Slight refinement to the last fix 2018-04-01 22:20:26 +03:00
Lior Halphon
ec64c041ab The OAM interrupt is internally implemented differently from the other 3. Fixed the stat_write_if tests, relates to #54 2018-04-01 21:45:56 +03:00
Lior Halphon
0d0d9ccdae Fixed a timer regression, fixes timer_if in DMG mode. Relates to #54 2018-03-31 15:52:31 +03:00
Lior Halphon
73dc3560a5 Mode 0 interrupts do not occur in the glitched mode 0 of the first line 0. The extra OAM interrupt bug also affects DMG. 2018-03-31 13:18:02 +03:00
Lior Halphon
0a2d6e6dcb Fixed DMG timing regression 2018-03-31 12:21:34 +03:00
Lior Halphon
9811dceca1 Emulate another OAM timing quirk; a sprite at x = 0 has extra penalty if SCX is not 0. Fixes intr_2_mode0_timing_sprites_scx*_nops, affects #54 2018-03-30 17:06:27 +03:00
Lior Halphon
2c44ffbe39 More accurate fetcher penalty emulation, fixed intr_2_mode0_timing_sprites_nops, affects #54 2018-03-30 02:53:49 +03:00
Lior Halphon
c7ca786e77 Attempt to fix building using MINGW. Affects #55 2018-03-29 21:27:19 +03:00
Lior Halphon
a9fbbd3894 Merge branch 'master' of https://github.com/LIJI32/SameBoy 2018-03-29 21:07:04 +03:00
Lior Halphon
e380a00b67 Fixed another timing regression with the CB opcodes 2018-03-29 21:06:53 +03:00
Kyle Swanson
7ffe132e79 fix typo 2018-03-28 21:38:48 -07:00
Kyle Swanson
7bfe5de9c7 chmod -x 2018-03-28 21:37:34 -07:00
Lior Halphon
96063fb0da Fixed Windows build, added Unicode support in Windows. 2018-03-28 21:59:27 +03:00
Lior Halphon
4cf78139a8 Fixed a bug where SameBoy freezes for a while after leaving turbo mode 2018-03-27 23:33:31 +03:00
Lior Halphon
0e3d2770d9 Properly handle cases where an object’s X position is modified between the OAM mode and rendering mode 2018-03-27 22:13:08 +03:00
Lior Halphon
0912a30bb9 Fixed a regression in dmg_sound-2 2018-03-27 21:04:55 +03:00
Lior Halphon
f5493e023d Fixed a timing regression in the CB opcodes 2018-03-27 20:21:24 +03:00
Lior Halphon
7671648fca Simplified a function 2018-03-27 19:06:36 +03:00
Lior Halphon
7543461c24 Increasing PC in OAM triggers the OAM bug 2018-03-27 16:36:39 +03:00
Lior Halphon
4cbade9a88 Function name change 2018-03-27 15:55:12 +03:00
Lior Halphon
4986930511 Mostly complete emulation of the OAM bug. Passes oam_bug-2. 2018-03-27 15:46:00 +03:00
Lior Halphon
9093f22293 More accurate emulation of the OAM bug 2018-03-24 14:46:51 +03:00
Lior Halphon
5cb74fb684 Bugfix: turning the PPU off during OAM mode made the OAM bug persist while the LCD is off 2018-03-24 02:58:37 +03:00
Lior Halphon
d343152fca Basic emulation of the OAM bug 2018-03-24 00:32:19 +03:00
Lior Halphon
f8c6b9e7a0 Fixed the lcd command 2018-03-23 21:26:49 +03:00
Lior Halphon
4e3928df81 Turns out the behavior differs between DMG and CGB – in DMG mode, the objects enabled bit is checked before halting the FIFOs, meaning that disabled sprites do not affect Mode 3’s length on the DMG. 2018-03-23 20:01:27 +03:00
Lior Halphon
48a8db233d Refinement to the last fix 2018-03-23 19:54:11 +03:00
Lior Halphon
e9eeace995 The object enabled bit is checked only when popping from the object FIFO. Objects affect timing even when disabled. 2018-03-23 19:50:19 +03:00
Lior Halphon
04bfc89816 Cycle accurate OAM search mode 2018-03-23 19:07:14 +03:00
Lior Halphon
c11af7ea26 Fix CGB timings 2018-03-23 12:58:51 +03:00
Lior Halphon
3e5e17d1a3 Fixed CB [hl] opcodes timings 2018-03-23 12:35:37 +03:00
Lior Halphon
18e32d1755 Merge branch 'master' into timing 
# Conflicts:
#	Core/gb.c
 2018-03-22 22:37:35 +02:00
Lior Halphon
577e23925b Fixed sources-dmgABCXmgbS 2018-03-22 20:09:01 +02:00
Lior Halphon
e9f243a913 Fix sprite priority 2018-03-21 00:02:35 +02:00
Lior Halphon
cb33a5b25a Fix Aevilla 2018-03-20 20:08:29 +02:00
Lior Halphon
3883b7d86a Merge branch 'master' into timing 
# Conflicts:
#	Core/display.c
#	Core/z80_cpu.c
 2018-03-19 23:46:33 +02:00
Lior Halphon
b50c97f4a7 Prevent starting HDMA in the middle of an instruction, making both the CPU and DMA access memory at the same time. Closes #47 2018-03-19 20:01:31 +02:00
Lior Halphon
202eb2b5cc Fix stat_lyc_onoff 2018-03-18 20:32:19 +02:00
Lior Halphon
80b1275e07 Fix stat_lyc_onoff 2018-03-18 20:08:45 +02:00
Lior Halphon
0dc30f081a CGB halt interrupt timing 2018-03-17 23:21:14 +02:00
Lior Halphon
12ae5745db While fixing some rendering issues, this change was incorrect. 2018-03-17 21:04:48 +02:00
Lior Halphon
269bac4626 More CGB fixes 2018-03-17 20:34:55 +02:00
Lior Halphon
21b75494a2 More CGB fixes (currently on DMG-mode CGB is verified). Halt interrupt timing isn’t correct yet. 2018-03-11 00:17:57 +02:00
Lior Halphon
15b6c48d7c Fixed vblank_stat_intr-C 2018-03-10 15:52:22 +02:00
Lior Halphon
c267ad00b5 Goodbye 2018-03-09 23:34:23 +02:00
Lior Halphon
e8b107efdb In double speed mode, there are no quirks where IF and STAT don’t update together 2018-03-09 23:31:49 +02:00
Lior Halphon
cb6bb0590e Starting to fix CGB timing quirks 2018-03-09 21:11:35 +02:00
Lior Halphon
9083e883fe CGB BG rendering 2018-03-09 18:52:36 +02:00
Lior Halphon
a32f232bb1 Fixed OAM-window priority glitch, fixed OAM glitch in Prehistoric Man 2018-03-09 17:10:19 +02:00
Lior Halphon
1149c266cf More regression fixes, actually fix Pinball Deluxe this time 2018-03-08 23:22:03 +02:00
Lior Halphon
544ca2be4c Changing the timings of memory writes so they’re not effectively one T-cycle late. This screws up APU’s cycle accuracy for now. 2018-03-05 21:17:37 +02:00
Lior Halphon
88a11b891f Object rendering 2018-03-04 23:27:31 +02:00
Lior Halphon
3d1c8b50c4 OAM search and OAM timing in mode 3 2018-03-04 22:21:56 +02:00
Lior Halphon
476133abd0 The scrolled y value is cached and not recalculated 2018-03-03 20:51:38 +02:00
Lior Halphon
518746f664 fixed rendering off by one 2018-03-03 19:52:48 +02:00
Lior Halphon
496c5589e6 Added window support 2018-03-03 19:36:21 +02:00
Lior Halphon
5ea33cc931 Cleanup 2018-03-03 19:05:29 +02:00
Lior Halphon
b08f02c4f3 Rewriting the PPU rendering: T-cycle accurate background rendering. DMG only, CGB completely broken 2018-03-03 15:47:36 +02:00
Lior Halphon
a67db0595b Fixed window behavior 2018-03-01 22:03:56 +02:00
Lior Halphon
b702d56547 Merge branch 'master' into timing 
# Conflicts:
#	Core/display.c
#	Core/z80_cpu.c
 2018-03-01 21:22:33 +02:00
Lior Halphon
94c6dbd281 Fixed ‘call’ instruction not being properly symbolicated. Closes #37 2018-03-01 21:12:37 +02:00
Lior Halphon
7248403be7 Fixed several DMG regressions, fixes Pinball Deluxe again 2018-03-01 00:12:04 +02:00
Lior Halphon
fb03479a1f Added 16-bit dereferencing operator ({address}) to the debugger. Closes #38 2018-02-28 19:39:22 +02:00
Lior Halphon
b02e40d5a2 Refinement to that last fix 2018-02-25 23:23:55 +02:00
Lior Halphon
90a943d05a Emulate an HDMA quirk required to properly emulate Aevilia 2018-02-25 22:32:41 +02:00
Lior Halphon
ef670986c6 Rewrote PPU (currently only emulates DMG correctly) to use the new timing mechanism. Removed “future interrupts” (No longer required because SameBoy is now T-cycle based) 2018-02-25 00:48:45 +02:00
Lior Halphon
42ab746a66 Starting to remove the delayed interrupts hack – done for timer interrupt, broken for display interrupts 2018-02-23 15:33:44 +02:00
Lior Halphon
c48097a484 Convert div counter to the SM mechanism 2018-02-23 13:16:05 +02:00
Lior Halphon
5974092c94 Bugfix 2018-02-20 23:04:35 +02:00
Lior Halphon
56eac9f875 Removed some dead code from display.c 2018-02-20 21:23:27 +02:00