Lior Halphon
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f55c254959
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Fixed a regression that made ly_lyc_0_write and ly_lyc_write fail
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2019-07-12 02:18:25 +03:00 |
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Lior Halphon
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e268efefef
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Redesign and reimplement the audio API, let the frontends handle more stuff. Probably affects #161
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2019-06-15 23:22:27 +03:00 |
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Lior Halphon
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2f9de4942c
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Increase input polling frequency in the Cocoa and SDL frontends, should make inputs look less synthetic and potentially reduce input lag
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2019-06-07 18:27:25 +03:00 |
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Lior Halphon
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c342663200
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Emulate serial bit shifting, update the serial API to use bits instead of bytes, update printer emulation and libretro to use the new API
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2019-03-15 14:36:10 +02:00 |
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Lior Halphon
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9d0aadb83f
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Emulate missing Vreset signal (SGB only for now) and ICD2 desyncing
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2019-02-15 17:04:48 +02:00 |
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Lior Halphon
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b996ed9220
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Writing to BGPD/OBPD while it’s blocked still increases BGPI/OBPI if needed. Fixes #145
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2019-01-19 23:37:44 +02:00 |
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Lior Halphon
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73a54049d2
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Accurate PPU access timings
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2019-01-19 19:32:26 +02:00 |
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Lior Halphon
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4536581a6e
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Fixed a bug where modifying RTC data would corrupt cartridge RAM data. Fixes #136
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2019-01-18 02:36:14 +02:00 |
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Lior Halphon
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312478e509
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CGB palettes are not accessible during Mode 3, closes #84
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2019-01-14 22:22:46 +02:00 |
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Lior Halphon
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879d3b607d
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Removed verified TODO
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2019-01-14 20:32:52 +02:00 |
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Lior Halphon
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7b36ee10a4
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Merge branch 'master' into sgb
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2019-01-05 19:00:22 +02:00 |
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Lior Halphon
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612cd07fb3
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Fixed emulation of echo RAM
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2018-12-12 23:44:00 +02:00 |
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Lior Halphon
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ea09dfc888
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Fixed multiplayer SGB mode
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2018-12-04 23:46:30 +02:00 |
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Lior Halphon
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7735d638c6
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Multiplayer SGB APIs/SGB detection
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2018-11-12 00:37:06 +02:00 |
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Lior Halphon
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44891d5c4a
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Initial code to support SGB, command “parsing”, replacement SGB boot ROM
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2018-11-11 01:16:32 +02:00 |
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Lior Halphon
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11c148c851
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Starting G/HDMA directly takes one more M-cycle (More research required)
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2018-09-15 00:48:31 +03:00 |
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Lior Halphon
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f7b882f0e8
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Whoops
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2018-07-22 02:10:26 +03:00 |
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Lior Halphon
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b7426f93c0
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Randomize object palettes. Slightly more accurate emulation of FF4C.
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2018-07-20 23:23:47 +03:00 |
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Lior Halphon
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2e9e3424ec
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Document some revision differences
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2018-07-14 21:52:54 +03:00 |
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Lior Halphon
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a7aabca618
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Starting to add CGB-C support
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2018-07-03 21:43:46 +03:00 |
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Lior Halphon
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d81c23cb16
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Fixed HDMA regression
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2018-06-16 23:52:24 +03:00 |
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Lior Halphon
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45c73e0175
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Replaced the is_cgb bool with a more future compatible model enum. Removed the GB_init_cgb API and replaced it with an extended GB_init and GB_switch_model_and_reset APIs that now receive a model parameter. Increased the struct version.
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2018-06-16 13:59:33 +03:00 |
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Lior Halphon
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6532aef089
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Correct emulation of the DMG stat write bug
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2018-05-26 18:06:40 +03:00 |
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Lior Halphon
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9693b2de6a
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Refined the STAT bug behavior. Still not perfect.
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2018-05-26 17:06:49 +03:00 |
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Lior Halphon
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855ffb490a
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A HBlank interrupt cannot occur in the last M-cycle of HBlank. Correct emulation of STAT access conflicts on the CGB (Test: CPU-E, single speed only). Fixes a minor graphical glitch in Pokémon Puzzle Challenge.
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2018-05-25 23:42:36 +03:00 |
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Lior Halphon
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713dc02e46
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A bit tacky, but T-cycle accurate emulation of LYC write conflicts on the CGB. Only single speed mode verified. Closes #54
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2018-05-11 12:38:55 +03:00 |
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Lior Halphon
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f1ec42d4ba
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H/GDMA was 4 times faster than it should have been. Made it also more accurate. Fixes #56
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2018-04-13 14:41:39 +03:00 |
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Lior Halphon
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0c86ff1ee4
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More CGB revision quirks
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2018-04-06 04:00:37 +03:00 |
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Lior Halphon
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e163026ca9
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The STAT bug does not occur during the glitched mode 0
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2018-04-02 01:05:32 +03:00 |
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Lior Halphon
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7671648fca
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Simplified a function
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2018-03-27 19:06:36 +03:00 |
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Lior Halphon
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4cbade9a88
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Function name change
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2018-03-27 15:55:12 +03:00 |
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Lior Halphon
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4986930511
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Mostly complete emulation of the OAM bug. Passes oam_bug-2.
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2018-03-27 15:46:00 +03:00 |
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Lior Halphon
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18e32d1755
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Merge branch 'master' into timing
# Conflicts:
# Core/gb.c
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2018-03-22 22:37:35 +02:00 |
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Lior Halphon
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577e23925b
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Fixed sources-dmgABCXmgbS
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2018-03-22 20:09:01 +02:00 |
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Lior Halphon
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b702d56547
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Merge branch 'master' into timing
# Conflicts:
# Core/display.c
# Core/z80_cpu.c
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2018-03-01 21:22:33 +02:00 |
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Lior Halphon
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b02e40d5a2
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Refinement to that last fix
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2018-02-25 23:23:55 +02:00 |
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Lior Halphon
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90a943d05a
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Emulate an HDMA quirk required to properly emulate Aevilia
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2018-02-25 22:32:41 +02:00 |
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Lior Halphon
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ef670986c6
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Rewrote PPU (currently only emulates DMG correctly) to use the new timing mechanism. Removed “future interrupts” (No longer required because SameBoy is now T-cycle based)
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2018-02-25 00:48:45 +02:00 |
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Lior Halphon
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42ab746a66
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Starting to remove the delayed interrupts hack – done for timer interrupt, broken for display interrupts
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2018-02-23 15:33:44 +02:00 |
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Lior Halphon
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c48097a484
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Convert div counter to the SM mechanism
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2018-02-23 13:16:05 +02:00 |
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Lior Halphon
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9802ca41dd
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Components not affected by CGB’s double speed mode now operate in 8MHz mode to theoretically make advance_cycles(gb, 1) safe.
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2018-02-20 21:17:12 +02:00 |
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Lior Halphon
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f79af39ea2
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More accurate emulation of the APU’s analog characteristics
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2018-02-16 18:01:50 +02:00 |
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Lior Halphon
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441781cbe9
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Libretro .o files are now in the build/obj folder and are suffixed with _libretro (since they have different compilation flags). This also lets us rename gbmemory.c/h back to its original name.
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2017-10-12 19:42:30 +03:00 |
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twinaphex
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a7db98c22e
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Memory needs to be uniquely named for Android
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2017-10-09 11:36:55 -05:00 |
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twinaphex
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09f4edda57
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Comment out debugger code - add HAVE_DEBUGGER ifdef
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2017-10-09 11:36:53 -05:00 |
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Lior Halphon
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b9bdd6c49c
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Merge branch 'master' into new_apu
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2017-09-10 02:33:40 +03:00 |
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Lior Halphon
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1e90400916
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Reimplemented delayed/future interrupts, currently correct only for CGB.
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2017-09-09 13:32:12 +03:00 |
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Lior Halphon
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ba0e66a5b7
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Merge branch 'master' into new_apu
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2017-09-04 18:41:13 +03:00 |
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Lior Halphon
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9b490396bb
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Fixed timing when turning the LCD display on during double speed mode
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2017-09-02 23:26:45 +03:00 |
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Lior Halphon
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e7d5cdbb42
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Merge branch 'master' into new_apu
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2017-08-20 01:37:33 +03:00 |
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