94136f5741
Adjust DAC attributes to fix LADX’s crackling audio ( Fixes #125 ) while keeping Cannon Fodder’s buzzing reasonable (Proper audio measurements still required)
2018-11-10 19:14:18 +02:00
a39b314378
Fixed silly APU regression (Noise volume envelope ran too fast) Fixes #121
2018-11-03 14:37:19 +02:00
c9d6a1381f
Cross emulator compatibility with RTC saves
2018-11-03 01:31:14 +02:00
64922fff4b
Fixed a bug where channels 1 and 2 would start playing earlier than they should have if NRx4 was written to twice. Fixes #86 .
2018-10-29 00:44:43 +02:00
3035f43428
Emulation of DAC charging, Fixes #46 , #85 , #88 and #89
2018-10-19 23:53:01 +03:00
4276549acd
Research notes TODOs
2018-10-19 01:02:27 +03:00
324201f336
Correct emulation of switching the DACs on and off. Fixes #100 and #87
2018-10-17 20:35:29 +03:00
e9b78b6370
Merge pull request #114 from RobLoach/patch-2
...
Fix control reaches end of non-void function
2018-10-12 17:10:11 +03:00
2da7a3f7fb
Fix the return value of read_lvalue to be 0
2018-10-12 10:09:30 -04:00
e834d32b8e
Update switch to just return at the end instead
2018-10-12 09:41:25 -04:00
ec41e87cf1
Update logic behind params
2018-10-11 22:39:43 -04:00
b8825127fd
Fix parentheses around ‘+’ in operand of ‘&’
...
```
Core/z80_cpu.c: In function ‘add_hl_rr’:
Core/z80_cpu.c:341:31: error: suggest parentheses around ‘+’ in operand of ‘&’ [-Werror=parentheses]
if ( ((unsigned long) hl) + ((unsigned long) rr) & 0x10000) {
~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~
```
2018-10-11 22:37:26 -04:00
f4ee044347
Fix control reaches end of non-void function
...
This change makes it so that there is a return value when a kind doens't match. Allows -Werror=return-type to pass.
```
Core/debugger.c: In function ‘read_lvalue’:
Core/debugger.c:239:1: error: control reaches end of non-void function [-Werror=return-type]
}
```
2018-10-11 22:17:16 -04:00
11c148c851
Starting G/HDMA directly takes one more M-cycle (More research required)
2018-09-15 00:48:31 +03:00
dbc338a887
Compensate for prefetch in DIV’s initial value
2018-09-15 00:47:26 +03:00
ec0a879a93
Correct emulation of enabling and disabling the volume envelope. Correct emulation of a glitch where the volume envelope ticks when it usually wouldn’t.
2018-09-10 16:59:59 +03:00
3151821e6d
Fixed minor APU regression (Channels 1 and 2 were given no delay under certain circumstances)
2018-09-09 12:50:55 +03:00
Maximilian Mader
a36dd791ec
Rewrite the DAA instruction
2018-07-22 18:37:34 +02:00
f7b882f0e8
Whoops
2018-07-22 02:10:26 +03:00
b7426f93c0
Randomize object palettes. Slightly more accurate emulation of FF4C.
2018-07-20 23:23:47 +03:00
ce80acc818
Fixed HDMA timing )But still not verified)
2018-07-20 12:34:52 +03:00
b1cc55b786
Turns out Left/Right audio channels were flipped
2018-07-19 20:38:11 +03:00
c66b6fbafc
Fixed an edge case with DAC discharge emulation
2018-07-16 23:08:25 +03:00
2e9e3424ec
Document some revision differences
2018-07-14 21:52:54 +03:00
0145b790a3
Merge branch 'v0.11.x'
2018-07-11 20:08:33 +03:00
5f58323c01
Attempt to improve audio quality on frontend with big audio buffers
2018-07-10 21:33:03 +03:00
dc5cb71c22
Emulate CGB-C’s quirky LFSR function
2018-07-04 21:55:12 +03:00
f3437d7cc0
Added todo
2018-07-03 23:47:50 +03:00
b7b35c9b59
CGB-C timing
2018-07-03 22:25:09 +03:00
0a78f735d3
Fetcher Y is not cached on CGB-C
2018-07-03 22:14:53 +03:00
18ae18a95c
LYC bit on CGB-C
2018-07-03 21:56:32 +03:00
a7aabca618
Starting to add CGB-C support
2018-07-03 21:43:46 +03:00
47a74cb6c3
Randomize initial RAM values. Closes #82
2018-06-30 16:53:28 +03:00
2791775c5d
Improvements to the `lcd` debugger command
2018-06-22 18:38:54 +03:00
6a7c084177
Fixed window regression
2018-06-18 21:57:01 +03:00
d81c23cb16
Fixed HDMA regression
2018-06-16 23:52:24 +03:00
45c73e0175
Replaced the is_cgb bool with a more future compatible model enum. Removed the GB_init_cgb API and replaced it with an extended GB_init and GB_switch_model_and_reset APIs that now receive a model parameter. Increased the struct version.
2018-06-16 13:59:33 +03:00
d95ad1ca54
SWAP was incorrectly disassembled as RLC
2018-06-09 15:39:40 +03:00
38c0cb3323
Typo
2018-06-09 15:12:42 +03:00
f64da1864f
APU glitch: When turning the APU on while DIV's bit 4 (or 5 in double speed mode), the first DIV/APU event is skipped.
2018-06-09 15:11:20 +03:00
593cb7c107
Pixel accurate emulation of Prehistorik Man on a CGB-CPU-E
2018-06-08 18:44:03 +03:00
ca01ff6f79
Finally, perfect emulation of the STAT write bug.
2018-06-08 17:16:15 +03:00
127324d2d6
Fixed regression involving rendering a window with negative X position. Closes #75
2018-06-07 23:08:46 +03:00
f1dfa2a1bc
More sensible implementation of the STAT interrupt.
2018-06-04 02:07:38 +03:00
0481ff9af5
Whoops
2018-06-04 01:52:24 +03:00
8721a48206
Fixed incorrect double speed behavior.
2018-06-03 00:36:05 +03:00
7003e31b7e
Fixed a regression with STAT blocking.
2018-06-02 04:00:10 +03:00
80c92daacd
Include cleanup ( #73 )
2018-05-27 19:30:23 +03:00
6532aef089
Correct emulation of the DMG stat write bug
2018-05-26 18:06:40 +03:00
9693b2de6a
Refined the STAT bug behavior. Still not perfect.
2018-05-26 17:06:49 +03:00
855ffb490a
A HBlank interrupt cannot occur in the last M-cycle of HBlank. Correct emulation of STAT access conflicts on the CGB (Test: CPU-E, single speed only). Fixes a minor graphical glitch in Pokémon Puzzle Challenge.
2018-05-25 23:42:36 +03:00
249acb04cc
Verified some timings on a DMG. Fixed palette write conflict timing (Although the fix kind of implies time traveling). Closes #65
2018-05-16 00:59:11 +03:00
562b43a7c5
Notes about the DMG wave-ram glitch
2018-05-15 23:02:07 +03:00
7df571d42f
Less strict matching for `delete` and `unwatch`. Fixes #71
2018-05-13 23:17:23 +03:00
1fcde88d8a
Improved accuracy of the halt bug
2018-05-12 22:13:52 +03:00
713dc02e46
A bit tacky, but T-cycle accurate emulation of LYC write conflicts on the CGB. Only single speed mode verified. Closes #54
2018-05-11 12:38:55 +03:00
af3554c1d1
More accurate emulation of the LYC register and interrupt. (Still not perfect on a CGB)
2018-04-27 13:40:39 +03:00
0f8385a798
Refined line 153 behavior on a CGB. Verified on CGB-E.
2018-04-25 00:08:06 +03:00
be9df4d658
Added mechanism to handle MMIO read/write conflicts. Fixes #65
2018-04-14 17:57:00 +03:00
2c6f7906c5
Make multi-byte opcodes trigger the OAM bug when they increase PC
2018-04-14 15:32:55 +03:00
84aa06aba5
Clean up OAM bug code
2018-04-14 13:35:16 +03:00
d667d87bbe
Refactor CPU code so handling access conflicts is possible
2018-04-14 13:25:55 +03:00
f1ec42d4ba
H/GDMA was 4 times faster than it should have been. Made it also more accurate. Fixes #56
2018-04-13 14:41:39 +03:00
10dc12c502
Core: Fix libretro builds
2018-04-11 14:21:46 -07:00
89094950f8
Correct emulation of mapping both button sets. Fixes #60
2018-04-07 16:45:31 +03:00
5be2b3db29
It appears that OAM DMA blocks PPU access to OAM
2018-04-07 13:59:36 +03:00
0725b008be
Further simplifications
2018-04-07 13:02:53 +03:00
097b768127
Update comments
2018-04-07 03:36:47 +03:00
9ce028056a
Cleanup
2018-04-07 03:26:10 +03:00
fed2556fc3
More reasonable implementation of sprite timings
2018-04-07 03:00:26 +03:00
0751eae90b
Moved the fetcher state machine to another function
2018-04-06 19:29:49 +03:00
0461fb5b2a
Simplified FIFO logic
2018-04-06 19:11:48 +03:00
cb01259073
Fixed #61
2018-04-06 11:37:49 +03:00
0c86ff1ee4
More CGB revision quirks
2018-04-06 04:00:37 +03:00
a6ed2029b7
New information about PPU changes between CGB-B and CGB-E
2018-04-06 03:19:47 +03:00
cc95c89d3c
Surprise! The CGB has a 16-bit VRAM data bus
2018-04-05 16:15:51 +03:00
9aadc80f75
Implemented some obscure PPU rendering quirks, verified some timings
2018-04-05 15:33:21 +03:00
d785e45308
More accurate emulation of LCDC.0
2018-04-05 12:27:01 +03:00
d8e0683c35
Fixed a bug where skipping a sprite by modifying LCDC flags mid-scanline will disable sprites for the rest of the scalene.
2018-04-05 00:51:37 +03:00
5d63892949
T-cycle accurate timing of the extra OAM interrupt. Fixes vblank_stat_intr-GS, related to #54
2018-04-03 01:43:24 +03:00
ba07e7ba85
Fixed a bug where 0:$dxxx reads/writes from the wrong bank in CGB mode. Made sure symbols are reset after reloading a sym file.
2018-04-02 19:57:39 +03:00
e163026ca9
The STAT bug does not occur during the glitched mode 0
2018-04-02 01:05:32 +03:00
9339a6027f
Slight refinement to the last fix
2018-04-01 22:20:26 +03:00
ec64c041ab
The OAM interrupt is internally implemented differently from the other 3. Fixed the stat_write_if tests, relates to #54
2018-04-01 21:45:56 +03:00
0d0d9ccdae
Fixed a timer regression, fixes timer_if in DMG mode. Relates to #54
2018-03-31 15:52:31 +03:00
73dc3560a5
Mode 0 interrupts do not occur in the glitched mode 0 of the first line 0. The extra OAM interrupt bug also affects DMG.
2018-03-31 13:18:02 +03:00
0a2d6e6dcb
Fixed DMG timing regression
2018-03-31 12:21:34 +03:00
9811dceca1
Emulate another OAM timing quirk; a sprite at x = 0 has extra penalty if SCX is not 0. Fixes intr_2_mode0_timing_sprites_scx*_nops, affects #54
2018-03-30 17:06:27 +03:00
2c44ffbe39
More accurate fetcher penalty emulation, fixed intr_2_mode0_timing_sprites_nops, affects #54
2018-03-30 02:53:49 +03:00
c7ca786e77
Attempt to fix building using MINGW. Affects #55
2018-03-29 21:27:19 +03:00
a9fbbd3894
Merge branch 'master' of https://github.com/LIJI32/SameBoy
2018-03-29 21:07:04 +03:00
e380a00b67
Fixed another timing regression with the CB opcodes
2018-03-29 21:06:53 +03:00
7ffe132e79
fix typo
2018-03-28 21:38:48 -07:00
7bfe5de9c7
chmod -x
2018-03-28 21:37:34 -07:00
96063fb0da
Fixed Windows build, added Unicode support in Windows.
2018-03-28 21:59:27 +03:00
4cf78139a8
Fixed a bug where SameBoy freezes for a while after leaving turbo mode
2018-03-27 23:33:31 +03:00
0e3d2770d9
Properly handle cases where an object’s X position is modified between the OAM mode and rendering mode
2018-03-27 22:13:08 +03:00
0912a30bb9
Fixed a regression in dmg_sound-2
2018-03-27 21:04:55 +03:00
f5493e023d
Fixed a timing regression in the CB opcodes
2018-03-27 20:21:24 +03:00
7671648fca
Simplified a function
2018-03-27 19:06:36 +03:00
Lior Halphon
Maximilian Mader