bfc96abf8f
Make save state names consistent across the Cocoa and SDL port
2018-05-11 12:51:15 +03:00
feaa0d0654
Merge commit '7fe86cec59c1143275ffb7fc07b6716ae0116033'
2018-05-11 12:50:53 +03:00
f4eddf316b
Merge commit '9343d8162d5e6934d7894d9eea57c55f52faa503'
2018-05-11 12:46:23 +03:00
713dc02e46
A bit tacky, but T-cycle accurate emulation of LYC write conflicts on the CGB. Only single speed mode verified. Closes #54
2018-05-11 12:38:55 +03:00
af3554c1d1
More accurate emulation of the LYC register and interrupt. (Still not perfect on a CGB)
2018-04-27 13:40:39 +03:00
0f8385a798
Refined line 153 behavior on a CGB. Verified on CGB-E.
2018-04-25 00:08:06 +03:00
8f3fc1c2ad
Fix check for SDL2 version
2018-04-22 16:20:11 +02:00
ca571c6fa5
SDL2: Update to SDL_OpenAudioDevice()
...
Instead of the legacy SDL_OpenAudio() method, we now use the newer
SDL_OpenAudioDevice() functions. This fixes audio in Windows if the SDL
version is 2.0.6 or higher.
It also allows us to use 48kHz audio for Windows (96kHz somewhat works
too, but since we don't get absolutely smooth audio with it, I'd stick
with 48kHz for now until we find a solution. 44.1Khz is available as
fallback for SDL 2.0.5 and lower. Yes, the 2.0.5 to 2.0.6 transition was
quite harsh in terms of Windows audio support...
2018-04-22 15:22:10 +02:00
2407304177
SDL2: Write battery file information before issueing RESET_COMMAND
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Before performing the GB reset, we should perform a GB_save_battery.
Otherwise, resetting the emulation will kill ("kill" as in simply don't
write them into the .sav) all changes made to the battery save since
sameboy was started.
2018-04-19 16:47:54 +02:00
7fe86cec59
Fix savestates in SDL2 port
...
Because SDL_SCANCODE_0 comes *after* SDL_SCANCODE_9 in the SDL keycode
table, we have to check if the keycode is between >=1 and <=0. We also
have to substract SDL_SCANCODE_1 in order to set command_parameter
properly.
Errata: Currently, the savestate created with CTRL+0 is created, but
refuses to load on Windows (working fine on Linux).
2018-04-19 14:52:36 +02:00
9343d8162d
Add fullscreen mode for the SDL2 port
2018-04-18 19:22:08 +02:00
be9df4d658
Added mechanism to handle MMIO read/write conflicts. Fixes #65
2018-04-14 17:57:00 +03:00
2c6f7906c5
Make multi-byte opcodes trigger the OAM bug when they increase PC
2018-04-14 15:32:55 +03:00
84aa06aba5
Clean up OAM bug code
2018-04-14 13:35:16 +03:00
d667d87bbe
Refactor CPU code so handling access conflicts is possible
2018-04-14 13:25:55 +03:00
f1ec42d4ba
H/GDMA was 4 times faster than it should have been. Made it also more accurate. Fixes #56
2018-04-13 14:41:39 +03:00
51e3cb7b9f
Merge pull request #64 from orbea/debugger
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Core: Fix libretro builds
2018-04-12 00:25:38 +03:00
10dc12c502
Core: Fix libretro builds
2018-04-11 14:21:46 -07:00
417ae21dfa
Merge pull request #63 from libretro/master
...
Refactor android jni makefiles (#17 )
2018-04-11 11:02:03 +03:00
ebe0aa0c76
Refactor android jni makefiles ( #17 )
2018-04-10 21:42:04 -05:00
89094950f8
Correct emulation of mapping both button sets. Fixes #60
2018-04-07 16:45:31 +03:00
5be2b3db29
It appears that OAM DMA blocks PPU access to OAM
2018-04-07 13:59:36 +03:00
0725b008be
Further simplifications
2018-04-07 13:02:53 +03:00
097b768127
Update comments
2018-04-07 03:36:47 +03:00
9ce028056a
Cleanup
2018-04-07 03:26:10 +03:00
fed2556fc3
More reasonable implementation of sprite timings
2018-04-07 03:00:26 +03:00
0751eae90b
Moved the fetcher state machine to another function
2018-04-06 19:29:49 +03:00
0461fb5b2a
Simplified FIFO logic
2018-04-06 19:11:48 +03:00
cb01259073
Fixed #61
2018-04-06 11:37:49 +03:00
0c86ff1ee4
More CGB revision quirks
2018-04-06 04:00:37 +03:00
a6ed2029b7
New information about PPU changes between CGB-B and CGB-E
2018-04-06 03:19:47 +03:00
cc95c89d3c
Surprise! The CGB has a 16-bit VRAM data bus
2018-04-05 16:15:51 +03:00
9aadc80f75
Implemented some obscure PPU rendering quirks, verified some timings
2018-04-05 15:33:21 +03:00
d785e45308
More accurate emulation of LCDC.0
2018-04-05 12:27:01 +03:00
d8e0683c35
Fixed a bug where skipping a sprite by modifying LCDC flags mid-scanline will disable sprites for the rest of the scalene.
2018-04-05 00:51:37 +03:00
b1d65fd84f
Fixed `boot_hwio-C` (for SameBoy’s boot). Closes #59
2018-04-03 20:10:11 +03:00
5d63892949
T-cycle accurate timing of the extra OAM interrupt. Fixes vblank_stat_intr-GS, related to #54
2018-04-03 01:43:24 +03:00
ba07e7ba85
Fixed a bug where 0:$dxxx reads/writes from the wrong bank in CGB mode. Made sure symbols are reset after reloading a sym file.
2018-04-02 19:57:39 +03:00
e163026ca9
The STAT bug does not occur during the glitched mode 0
2018-04-02 01:05:32 +03:00
9339a6027f
Slight refinement to the last fix
2018-04-01 22:20:26 +03:00
ec64c041ab
The OAM interrupt is internally implemented differently from the other 3. Fixed the stat_write_if tests, relates to #54
2018-04-01 21:45:56 +03:00
69a625af97
How did I miss this thing after over 2 years?!
2018-04-01 16:53:21 +03:00
0d0d9ccdae
Fixed a timer regression, fixes timer_if in DMG mode. Relates to #54
2018-03-31 15:52:31 +03:00
73dc3560a5
Mode 0 interrupts do not occur in the glitched mode 0 of the first line 0. The extra OAM interrupt bug also affects DMG.
2018-03-31 13:18:02 +03:00
0a2d6e6dcb
Fixed DMG timing regression
2018-03-31 12:21:34 +03:00
7706b8727a
Updated Cocoa copyright
2018-03-30 17:06:39 +03:00
9811dceca1
Emulate another OAM timing quirk; a sprite at x = 0 has extra penalty if SCX is not 0. Fixes intr_2_mode0_timing_sprites_scx*_nops, affects #54
2018-03-30 17:06:27 +03:00
2c44ffbe39
More accurate fetcher penalty emulation, fixed intr_2_mode0_timing_sprites_nops, affects #54
2018-03-30 02:53:49 +03:00
311a470806
Maybe now? Affects #55
2018-03-29 23:11:53 +03:00
3a52d2da97
Updated Windows copyright
2018-03-29 22:22:50 +03:00
Lior Halphon