Lothar Serra Mari
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9343d8162d
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Add fullscreen mode for the SDL2 port
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2018-04-18 19:22:08 +02:00 |
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Lior Halphon
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be9df4d658
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Added mechanism to handle MMIO read/write conflicts. Fixes #65
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2018-04-14 17:57:00 +03:00 |
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Lior Halphon
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2c6f7906c5
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Make multi-byte opcodes trigger the OAM bug when they increase PC
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2018-04-14 15:32:55 +03:00 |
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Lior Halphon
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84aa06aba5
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Clean up OAM bug code
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2018-04-14 13:35:16 +03:00 |
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Lior Halphon
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d667d87bbe
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Refactor CPU code so handling access conflicts is possible
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2018-04-14 13:25:55 +03:00 |
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Lior Halphon
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f1ec42d4ba
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H/GDMA was 4 times faster than it should have been. Made it also more accurate. Fixes #56
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2018-04-13 14:41:39 +03:00 |
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Lior Halphon
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51e3cb7b9f
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Merge pull request #64 from orbea/debugger
Core: Fix libretro builds
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2018-04-12 00:25:38 +03:00 |
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orbea
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10dc12c502
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Core: Fix libretro builds
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2018-04-11 14:21:46 -07:00 |
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Lior Halphon
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417ae21dfa
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Merge pull request #63 from libretro/master
Refactor android jni makefiles (#17)
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2018-04-11 11:02:03 +03:00 |
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webgeek1234
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ebe0aa0c76
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Refactor android jni makefiles (#17)
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2018-04-10 21:42:04 -05:00 |
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Lior Halphon
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89094950f8
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Correct emulation of mapping both button sets. Fixes #60
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2018-04-07 16:45:31 +03:00 |
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Lior Halphon
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5be2b3db29
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It appears that OAM DMA blocks PPU access to OAM
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2018-04-07 13:59:36 +03:00 |
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Lior Halphon
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0725b008be
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Further simplifications
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2018-04-07 13:02:53 +03:00 |
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Lior Halphon
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097b768127
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Update comments
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2018-04-07 03:36:47 +03:00 |
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Lior Halphon
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9ce028056a
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Cleanup
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2018-04-07 03:26:10 +03:00 |
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Lior Halphon
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fed2556fc3
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More reasonable implementation of sprite timings
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2018-04-07 03:00:26 +03:00 |
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Lior Halphon
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0751eae90b
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Moved the fetcher state machine to another function
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2018-04-06 19:29:49 +03:00 |
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Lior Halphon
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0461fb5b2a
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Simplified FIFO logic
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2018-04-06 19:11:48 +03:00 |
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Lior Halphon
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cb01259073
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Fixed #61
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2018-04-06 11:37:49 +03:00 |
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Lior Halphon
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0c86ff1ee4
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More CGB revision quirks
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2018-04-06 04:00:37 +03:00 |
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Lior Halphon
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a6ed2029b7
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New information about PPU changes between CGB-B and CGB-E
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2018-04-06 03:19:47 +03:00 |
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Lior Halphon
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cc95c89d3c
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Surprise! The CGB has a 16-bit VRAM data bus
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2018-04-05 16:15:51 +03:00 |
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Lior Halphon
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9aadc80f75
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Implemented some obscure PPU rendering quirks, verified some timings
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2018-04-05 15:33:21 +03:00 |
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Lior Halphon
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d785e45308
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More accurate emulation of LCDC.0
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2018-04-05 12:27:01 +03:00 |
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Lior Halphon
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d8e0683c35
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Fixed a bug where skipping a sprite by modifying LCDC flags mid-scanline will disable sprites for the rest of the scalene.
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2018-04-05 00:51:37 +03:00 |
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Lior Halphon
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b1d65fd84f
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Fixed boot_hwio-C (for SameBoy’s boot). Closes #59
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2018-04-03 20:10:11 +03:00 |
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Lior Halphon
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5d63892949
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T-cycle accurate timing of the extra OAM interrupt. Fixes vblank_stat_intr-GS, related to #54
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2018-04-03 01:43:24 +03:00 |
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Lior Halphon
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ba07e7ba85
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Fixed a bug where 0:$dxxx reads/writes from the wrong bank in CGB mode. Made sure symbols are reset after reloading a sym file.
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2018-04-02 19:57:39 +03:00 |
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Lior Halphon
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e163026ca9
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The STAT bug does not occur during the glitched mode 0
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2018-04-02 01:05:32 +03:00 |
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Lior Halphon
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9339a6027f
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Slight refinement to the last fix
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2018-04-01 22:20:26 +03:00 |
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Lior Halphon
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ec64c041ab
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The OAM interrupt is internally implemented differently from the other 3. Fixed the stat_write_if tests, relates to #54
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2018-04-01 21:45:56 +03:00 |
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Lior Halphon
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69a625af97
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How did I miss this thing after over 2 years?!
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2018-04-01 16:53:21 +03:00 |
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Lior Halphon
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0d0d9ccdae
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Fixed a timer regression, fixes timer_if in DMG mode. Relates to #54
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2018-03-31 15:52:31 +03:00 |
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Lior Halphon
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73dc3560a5
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Mode 0 interrupts do not occur in the glitched mode 0 of the first line 0. The extra OAM interrupt bug also affects DMG.
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2018-03-31 13:18:02 +03:00 |
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Lior Halphon
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0a2d6e6dcb
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Fixed DMG timing regression
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2018-03-31 12:21:34 +03:00 |
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Lior Halphon
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7706b8727a
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Updated Cocoa copyright
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2018-03-30 17:06:39 +03:00 |
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Lior Halphon
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9811dceca1
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Emulate another OAM timing quirk; a sprite at x = 0 has extra penalty if SCX is not 0. Fixes intr_2_mode0_timing_sprites_scx*_nops, affects #54
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2018-03-30 17:06:27 +03:00 |
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Lior Halphon
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2c44ffbe39
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More accurate fetcher penalty emulation, fixed intr_2_mode0_timing_sprites_nops, affects #54
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2018-03-30 02:53:49 +03:00 |
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Lior Halphon
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311a470806
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Maybe now? Affects #55
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2018-03-29 23:11:53 +03:00 |
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Lior Halphon
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3a52d2da97
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Updated Windows copyright
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2018-03-29 22:22:50 +03:00 |
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Lior Halphon
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5a81d83d30
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Yet another attempt to fix building using MINGW. Affects #55
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2018-03-29 22:02:01 +03:00 |
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Lior Halphon
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b757b4c590
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Another attempt to fix building using MINGW. Affects #55
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2018-03-29 21:46:14 +03:00 |
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Lior Halphon
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c7ca786e77
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Attempt to fix building using MINGW. Affects #55
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2018-03-29 21:27:19 +03:00 |
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Lior Halphon
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a9fbbd3894
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Merge branch 'master' of https://github.com/LIJI32/SameBoy
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2018-03-29 21:07:04 +03:00 |
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Lior Halphon
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e380a00b67
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Fixed another timing regression with the CB opcodes
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2018-03-29 21:06:53 +03:00 |
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Lior Halphon
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b89c93a624
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Merge pull request #53 from kylophone/fix_typo
Fix typo, file permissons
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2018-03-29 10:56:54 +03:00 |
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Kyle Swanson
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7ffe132e79
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fix typo
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2018-03-28 21:38:48 -07:00 |
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Kyle Swanson
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7bfe5de9c7
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chmod -x
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2018-03-28 21:37:34 -07:00 |
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Lior Halphon
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96063fb0da
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Fixed Windows build, added Unicode support in Windows.
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2018-03-28 21:59:27 +03:00 |
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Lior Halphon
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4cf78139a8
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Fixed a bug where SameBoy freezes for a while after leaving turbo mode
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2018-03-27 23:33:31 +03:00 |
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