Max/SameBoy
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
821 Commits 17 Branches 0 Tags 20 MiB
94136f5741
Commit Graph

452 Commits

Author SHA1 Message Date
Lior Halphon
855ffb490a A HBlank interrupt cannot occur in the last M-cycle of HBlank. Correct emulation of STAT access conflicts on the CGB (Test: CPU-E, single speed only). Fixes a minor graphical glitch in Pokémon Puzzle Challenge. 2018-05-25 23:42:36 +03:00
Lior Halphon
249acb04cc Verified some timings on a DMG. Fixed palette write conflict timing (Although the fix kind of implies time traveling). Closes #65 2018-05-16 00:59:11 +03:00
Lior Halphon
562b43a7c5 Notes about the DMG wave-ram glitch 2018-05-15 23:02:07 +03:00
Lior Halphon
7df571d42f Less strict matching for delete and unwatch. Fixes #71 2018-05-13 23:17:23 +03:00
Lior Halphon
1fcde88d8a Improved accuracy of the halt bug 2018-05-12 22:13:52 +03:00
Lior Halphon
713dc02e46 A bit tacky, but T-cycle accurate emulation of LYC write conflicts on the CGB. Only single speed mode verified. Closes #54 2018-05-11 12:38:55 +03:00
Lior Halphon
af3554c1d1 More accurate emulation of the LYC register and interrupt. (Still not perfect on a CGB) 2018-04-27 13:40:39 +03:00
Lior Halphon
0f8385a798 Refined line 153 behavior on a CGB. Verified on CGB-E. 2018-04-25 00:08:06 +03:00
Lior Halphon
be9df4d658 Added mechanism to handle MMIO read/write conflicts. Fixes #65 2018-04-14 17:57:00 +03:00
Lior Halphon
2c6f7906c5 Make multi-byte opcodes trigger the OAM bug when they increase PC 2018-04-14 15:32:55 +03:00
Lior Halphon
84aa06aba5 Clean up OAM bug code 2018-04-14 13:35:16 +03:00
Lior Halphon
d667d87bbe Refactor CPU code so handling access conflicts is possible 2018-04-14 13:25:55 +03:00
Lior Halphon
f1ec42d4ba H/GDMA was 4 times faster than it should have been. Made it also more accurate. Fixes #56 2018-04-13 14:41:39 +03:00
orbea
10dc12c502 Core: Fix libretro builds 2018-04-11 14:21:46 -07:00
Lior Halphon
89094950f8 Correct emulation of mapping both button sets. Fixes #60 2018-04-07 16:45:31 +03:00
Lior Halphon
5be2b3db29 It appears that OAM DMA blocks PPU access to OAM 2018-04-07 13:59:36 +03:00
Lior Halphon
0725b008be Further simplifications 2018-04-07 13:02:53 +03:00
Lior Halphon
097b768127 Update comments 2018-04-07 03:36:47 +03:00
Lior Halphon
9ce028056a Cleanup 2018-04-07 03:26:10 +03:00
Lior Halphon
fed2556fc3 More reasonable implementation of sprite timings 2018-04-07 03:00:26 +03:00
Lior Halphon
0751eae90b Moved the fetcher state machine to another function 2018-04-06 19:29:49 +03:00
Lior Halphon
0461fb5b2a Simplified FIFO logic 2018-04-06 19:11:48 +03:00
Lior Halphon
cb01259073 Fixed #61 2018-04-06 11:37:49 +03:00
Lior Halphon
0c86ff1ee4 More CGB revision quirks 2018-04-06 04:00:37 +03:00
Lior Halphon
a6ed2029b7 New information about PPU changes between CGB-B and CGB-E 2018-04-06 03:19:47 +03:00
Lior Halphon
cc95c89d3c Surprise! The CGB has a 16-bit VRAM data bus 2018-04-05 16:15:51 +03:00
Lior Halphon
9aadc80f75 Implemented some obscure PPU rendering quirks, verified some timings 2018-04-05 15:33:21 +03:00
Lior Halphon
d785e45308 More accurate emulation of LCDC.0 2018-04-05 12:27:01 +03:00
Lior Halphon
d8e0683c35 Fixed a bug where skipping a sprite by modifying LCDC flags mid-scanline will disable sprites for the rest of the scalene. 2018-04-05 00:51:37 +03:00
Lior Halphon
5d63892949 T-cycle accurate timing of the extra OAM interrupt. Fixes vblank_stat_intr-GS, related to #54 2018-04-03 01:43:24 +03:00
Lior Halphon
ba07e7ba85 Fixed a bug where 0:$dxxx reads/writes from the wrong bank in CGB mode. Made sure symbols are reset after reloading a sym file. 2018-04-02 19:57:39 +03:00
Lior Halphon
e163026ca9 The STAT bug does not occur during the glitched mode 0 2018-04-02 01:05:32 +03:00
Lior Halphon
9339a6027f Slight refinement to the last fix 2018-04-01 22:20:26 +03:00
Lior Halphon
ec64c041ab The OAM interrupt is internally implemented differently from the other 3. Fixed the stat_write_if tests, relates to #54 2018-04-01 21:45:56 +03:00
Lior Halphon
0d0d9ccdae Fixed a timer regression, fixes timer_if in DMG mode. Relates to #54 2018-03-31 15:52:31 +03:00
Lior Halphon
73dc3560a5 Mode 0 interrupts do not occur in the glitched mode 0 of the first line 0. The extra OAM interrupt bug also affects DMG. 2018-03-31 13:18:02 +03:00
Lior Halphon
0a2d6e6dcb Fixed DMG timing regression 2018-03-31 12:21:34 +03:00
Lior Halphon
9811dceca1 Emulate another OAM timing quirk; a sprite at x = 0 has extra penalty if SCX is not 0. Fixes intr_2_mode0_timing_sprites_scx*_nops, affects #54 2018-03-30 17:06:27 +03:00
Lior Halphon
2c44ffbe39 More accurate fetcher penalty emulation, fixed intr_2_mode0_timing_sprites_nops, affects #54 2018-03-30 02:53:49 +03:00
Lior Halphon
c7ca786e77 Attempt to fix building using MINGW. Affects #55 2018-03-29 21:27:19 +03:00
Lior Halphon
a9fbbd3894 Merge branch 'master' of https://github.com/LIJI32/SameBoy 2018-03-29 21:07:04 +03:00
Lior Halphon
e380a00b67 Fixed another timing regression with the CB opcodes 2018-03-29 21:06:53 +03:00
Kyle Swanson
7ffe132e79 fix typo 2018-03-28 21:38:48 -07:00
Kyle Swanson
7bfe5de9c7 chmod -x 2018-03-28 21:37:34 -07:00
Lior Halphon
96063fb0da Fixed Windows build, added Unicode support in Windows. 2018-03-28 21:59:27 +03:00
Lior Halphon
4cf78139a8 Fixed a bug where SameBoy freezes for a while after leaving turbo mode 2018-03-27 23:33:31 +03:00
Lior Halphon
0e3d2770d9 Properly handle cases where an object’s X position is modified between the OAM mode and rendering mode 2018-03-27 22:13:08 +03:00
Lior Halphon
0912a30bb9 Fixed a regression in dmg_sound-2 2018-03-27 21:04:55 +03:00
Lior Halphon
f5493e023d Fixed a timing regression in the CB opcodes 2018-03-27 20:21:24 +03:00
Lior Halphon
7671648fca Simplified a function 2018-03-27 19:06:36 +03:00
Lior Halphon
7543461c24 Increasing PC in OAM triggers the OAM bug 2018-03-27 16:36:39 +03:00
Lior Halphon
4cbade9a88 Function name change 2018-03-27 15:55:12 +03:00
Lior Halphon
4986930511 Mostly complete emulation of the OAM bug. Passes oam_bug-2. 2018-03-27 15:46:00 +03:00
Lior Halphon
9093f22293 More accurate emulation of the OAM bug 2018-03-24 14:46:51 +03:00
Lior Halphon
5cb74fb684 Bugfix: turning the PPU off during OAM mode made the OAM bug persist while the LCD is off 2018-03-24 02:58:37 +03:00
Lior Halphon
d343152fca Basic emulation of the OAM bug 2018-03-24 00:32:19 +03:00
Lior Halphon
f8c6b9e7a0 Fixed the lcd command 2018-03-23 21:26:49 +03:00
Lior Halphon
4e3928df81 Turns out the behavior differs between DMG and CGB – in DMG mode, the objects enabled bit is checked before halting the FIFOs, meaning that disabled sprites do not affect Mode 3’s length on the DMG. 2018-03-23 20:01:27 +03:00
Lior Halphon
48a8db233d Refinement to the last fix 2018-03-23 19:54:11 +03:00
Lior Halphon
e9eeace995 The object enabled bit is checked only when popping from the object FIFO. Objects affect timing even when disabled. 2018-03-23 19:50:19 +03:00
Lior Halphon
04bfc89816 Cycle accurate OAM search mode 2018-03-23 19:07:14 +03:00
Lior Halphon
c11af7ea26 Fix CGB timings 2018-03-23 12:58:51 +03:00
Lior Halphon
3e5e17d1a3 Fixed CB [hl] opcodes timings 2018-03-23 12:35:37 +03:00
Lior Halphon
18e32d1755 Merge branch 'master' into timing 
# Conflicts:
#	Core/gb.c
 2018-03-22 22:37:35 +02:00
Lior Halphon
577e23925b Fixed sources-dmgABCXmgbS 2018-03-22 20:09:01 +02:00
Lior Halphon
e9f243a913 Fix sprite priority 2018-03-21 00:02:35 +02:00
Lior Halphon
cb33a5b25a Fix Aevilla 2018-03-20 20:08:29 +02:00
Lior Halphon
3883b7d86a Merge branch 'master' into timing 
# Conflicts:
#	Core/display.c
#	Core/z80_cpu.c
 2018-03-19 23:46:33 +02:00
Lior Halphon
b50c97f4a7 Prevent starting HDMA in the middle of an instruction, making both the CPU and DMA access memory at the same time. Closes #47 2018-03-19 20:01:31 +02:00
Lior Halphon
202eb2b5cc Fix stat_lyc_onoff 2018-03-18 20:32:19 +02:00
Lior Halphon
80b1275e07 Fix stat_lyc_onoff 2018-03-18 20:08:45 +02:00
Lior Halphon
0dc30f081a CGB halt interrupt timing 2018-03-17 23:21:14 +02:00
Lior Halphon
12ae5745db While fixing some rendering issues, this change was incorrect. 2018-03-17 21:04:48 +02:00
Lior Halphon
269bac4626 More CGB fixes 2018-03-17 20:34:55 +02:00
Lior Halphon
21b75494a2 More CGB fixes (currently on DMG-mode CGB is verified). Halt interrupt timing isn’t correct yet. 2018-03-11 00:17:57 +02:00
Lior Halphon
15b6c48d7c Fixed vblank_stat_intr-C 2018-03-10 15:52:22 +02:00
Lior Halphon
c267ad00b5 Goodbye 2018-03-09 23:34:23 +02:00
Lior Halphon
e8b107efdb In double speed mode, there are no quirks where IF and STAT don’t update together 2018-03-09 23:31:49 +02:00
Lior Halphon
cb6bb0590e Starting to fix CGB timing quirks 2018-03-09 21:11:35 +02:00
Lior Halphon
9083e883fe CGB BG rendering 2018-03-09 18:52:36 +02:00
Lior Halphon
a32f232bb1 Fixed OAM-window priority glitch, fixed OAM glitch in Prehistoric Man 2018-03-09 17:10:19 +02:00
Lior Halphon
1149c266cf More regression fixes, actually fix Pinball Deluxe this time 2018-03-08 23:22:03 +02:00
Lior Halphon
544ca2be4c Changing the timings of memory writes so they’re not effectively one T-cycle late. This screws up APU’s cycle accuracy for now. 2018-03-05 21:17:37 +02:00
Lior Halphon
88a11b891f Object rendering 2018-03-04 23:27:31 +02:00
Lior Halphon
3d1c8b50c4 OAM search and OAM timing in mode 3 2018-03-04 22:21:56 +02:00
Lior Halphon
476133abd0 The scrolled y value is cached and not recalculated 2018-03-03 20:51:38 +02:00
Lior Halphon
518746f664 fixed rendering off by one 2018-03-03 19:52:48 +02:00
Lior Halphon
496c5589e6 Added window support 2018-03-03 19:36:21 +02:00
Lior Halphon
5ea33cc931 Cleanup 2018-03-03 19:05:29 +02:00
Lior Halphon
b08f02c4f3 Rewriting the PPU rendering: T-cycle accurate background rendering. DMG only, CGB completely broken 2018-03-03 15:47:36 +02:00
Lior Halphon
a67db0595b Fixed window behavior 2018-03-01 22:03:56 +02:00
Lior Halphon
b702d56547 Merge branch 'master' into timing 
# Conflicts:
#	Core/display.c
#	Core/z80_cpu.c
 2018-03-01 21:22:33 +02:00
Lior Halphon
94c6dbd281 Fixed ‘call’ instruction not being properly symbolicated. Closes #37 2018-03-01 21:12:37 +02:00
Lior Halphon
7248403be7 Fixed several DMG regressions, fixes Pinball Deluxe again 2018-03-01 00:12:04 +02:00
Lior Halphon
fb03479a1f Added 16-bit dereferencing operator ({address}) to the debugger. Closes #38 2018-02-28 19:39:22 +02:00
Lior Halphon
b02e40d5a2 Refinement to that last fix 2018-02-25 23:23:55 +02:00
Lior Halphon
90a943d05a Emulate an HDMA quirk required to properly emulate Aevilia 2018-02-25 22:32:41 +02:00
Lior Halphon
ef670986c6 Rewrote PPU (currently only emulates DMG correctly) to use the new timing mechanism. Removed “future interrupts” (No longer required because SameBoy is now T-cycle based) 2018-02-25 00:48:45 +02:00
Lior Halphon
42ab746a66 Starting to remove the delayed interrupts hack – done for timer interrupt, broken for display interrupts 2018-02-23 15:33:44 +02:00
Lior Halphon
c48097a484 Convert div counter to the SM mechanism 2018-02-23 13:16:05 +02:00