Lior Halphon
c74b39e712
The CPU core of the Game Boy is (most likely) called SM83
2019-01-12 00:42:16 +02:00
Lior Halphon
21d2a59a5f
Fixed a very rare edge case where an interrupt occurs when SP=FF11
2019-01-12 00:39:24 +02:00
Lior Halphon
4e2b5bb336
Fix the GB_run_frame API in SGB mode
2019-01-11 21:53:21 +02:00
Lior Halphon
7b36ee10a4
Merge branch 'master' into sgb
2019-01-05 19:00:22 +02:00
Lior Halphon
ae959cd878
ATTR_LIN and ATTR_DIV
2019-01-05 18:59:50 +02:00
Lior Halphon
4051f190a5
Cache cycles_per_sample to avoid FP arithmetic
2019-01-01 00:42:40 +02:00
Lior Halphon
9d947c7ce6
Unroll some APU loops
2018-12-31 23:09:56 +02:00
Lior Halphon
af0430dbc5
Unroll some loops in PPU code, more efficient timer handling
2018-12-31 22:06:20 +02:00
Lior Halphon
21eb96a2f5
Joypad multiplayer support (Cocoa)
2018-12-15 18:55:41 +02:00
Lior Halphon
612cd07fb3
Fixed emulation of echo RAM
2018-12-12 23:44:00 +02:00
Lior Halphon
ea09dfc888
Fixed multiplayer SGB mode
2018-12-04 23:46:30 +02:00
Lior Halphon
b1a2e45168
Improvements to the SGB animation
2018-12-01 13:39:43 +02:00
Lior Halphon
6d28e74667
Color 0 must always be shared
2018-11-24 15:53:53 +02:00
Lior Halphon
4b93f89763
Correct emulation of color masks
2018-11-24 15:42:54 +02:00
Lior Halphon
389d8ae045
Halt the CPU while the SGB animation is playing
2018-11-24 13:34:07 +02:00
Lior Halphon
2d6d1e6325
SGB boot animation
2018-11-24 13:21:00 +02:00
Lior Halphon
b3166135eb
Clean up that crashing mess I made
2018-11-23 19:59:15 +02:00
Lior Halphon
558f9b9bae
Updated SGB border, add “2” to SGB2
2018-11-23 14:16:48 +02:00
Lior Halphon
67d52b78b6
Handling interrupted SGB commands
2018-11-17 12:26:07 +02:00
Lior Halphon
af5ef50cf9
Fixing default border
2018-11-17 01:39:38 +02:00
Lior Halphon
deb5e21842
More colorization commands
2018-11-17 00:44:18 +02:00
Lior Halphon
b698ce5d95
Correctly emulate SGB border color 0
2018-11-17 00:44:07 +02:00
Lior Halphon
e5e7ce8203
Basic colorization
2018-11-16 22:05:35 +02:00
Lior Halphon
d42cbcdee2
Palette transfer functions
2018-11-16 19:11:21 +02:00
Lior Halphon
91a3091b2e
Build fix
2018-11-16 17:41:23 +02:00
Lior Halphon
2710939e1e
That should be an inc file
2018-11-16 17:38:53 +02:00
Lior Halphon
595907cae2
Border fade animation
2018-11-16 17:36:21 +02:00
Lior Halphon
69ac36cca1
Add default SGB border
2018-11-16 17:22:57 +02:00
Lior Halphon
398148f7ea
Basic SGB border support
2018-11-16 16:04:40 +02:00
Lior Halphon
382d9f8898
MASK_EN support
2018-11-16 12:42:52 +02:00
Lior Halphon
2f2b792edf
SGB save states
2018-11-16 01:53:01 +02:00
Lior Halphon
634a54c046
SGB resolution support (Cocoa only so far)
2018-11-15 00:21:21 +02:00
Lior Halphon
6ba5cfbeef
Support for multi-packet SGB commands
2018-11-13 23:45:26 +02:00
Lior Halphon
7735d638c6
Multiplayer SGB APIs/SGB detection
2018-11-12 00:37:06 +02:00
Lior Halphon
5c581651ce
Handle the SGB header commands, disable SGB functions if needed.
2018-11-11 22:50:00 +02:00
Lior Halphon
44891d5c4a
Initial code to support SGB, command “parsing”, replacement SGB boot ROM
2018-11-11 01:16:32 +02:00
Lior Halphon
94136f5741
Adjust DAC attributes to fix LADX’s crackling audio ( Fixes #125 ) while keeping Cannon Fodder’s buzzing reasonable (Proper audio measurements still required)
2018-11-10 19:14:18 +02:00
Lior Halphon
a39b314378
Fixed silly APU regression (Noise volume envelope ran too fast) Fixes #121
2018-11-03 14:37:19 +02:00
Lior Halphon
c9d6a1381f
Cross emulator compatibility with RTC saves
2018-11-03 01:31:14 +02:00
Lior Halphon
64922fff4b
Fixed a bug where channels 1 and 2 would start playing earlier than they should have if NRx4 was written to twice. Fixes #86 .
2018-10-29 00:44:43 +02:00
Lior Halphon
3035f43428
Emulation of DAC charging, Fixes #46 , #85 , #88 and #89
2018-10-19 23:53:01 +03:00
Lior Halphon
4276549acd
Research notes TODOs
2018-10-19 01:02:27 +03:00
Lior Halphon
324201f336
Correct emulation of switching the DACs on and off. Fixes #100 and #87
2018-10-17 20:35:29 +03:00
Lior Halphon
e9b78b6370
Merge pull request #114 from RobLoach/patch-2
...
Fix control reaches end of non-void function
2018-10-12 17:10:11 +03:00
Rob Loach
2da7a3f7fb
Fix the return value of read_lvalue to be 0
2018-10-12 10:09:30 -04:00
Rob Loach
e834d32b8e
Update switch to just return at the end instead
2018-10-12 09:41:25 -04:00
Rob Loach
ec41e87cf1
Update logic behind params
2018-10-11 22:39:43 -04:00
Rob Loach
b8825127fd
Fix parentheses around ‘+’ in operand of ‘&’
...
```
Core/z80_cpu.c: In function ‘add_hl_rr’:
Core/z80_cpu.c:341:31: error: suggest parentheses around ‘+’ in operand of ‘&’ [-Werror=parentheses]
if ( ((unsigned long) hl) + ((unsigned long) rr) & 0x10000) {
~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~
```
2018-10-11 22:37:26 -04:00
Rob Loach
f4ee044347
Fix control reaches end of non-void function
...
This change makes it so that there is a return value when a kind doens't match. Allows -Werror=return-type to pass.
```
Core/debugger.c: In function ‘read_lvalue’:
Core/debugger.c:239:1: error: control reaches end of non-void function [-Werror=return-type]
}
```
2018-10-11 22:17:16 -04:00
Lior Halphon
11c148c851
Starting G/HDMA directly takes one more M-cycle (More research required)
2018-09-15 00:48:31 +03:00
Lior Halphon
dbc338a887
Compensate for prefetch in DIV’s initial value
2018-09-15 00:47:26 +03:00
Lior Halphon
ec0a879a93
Correct emulation of enabling and disabling the volume envelope. Correct emulation of a glitch where the volume envelope ticks when it usually wouldn’t.
2018-09-10 16:59:59 +03:00
Lior Halphon
3151821e6d
Fixed minor APU regression (Channels 1 and 2 were given no delay under certain circumstances)
2018-09-09 12:50:55 +03:00
a36dd791ec
Rewrite the DAA instruction
2018-07-22 18:37:34 +02:00
Lior Halphon
f7b882f0e8
Whoops
2018-07-22 02:10:26 +03:00
Lior Halphon
b7426f93c0
Randomize object palettes. Slightly more accurate emulation of FF4C.
2018-07-20 23:23:47 +03:00
Lior Halphon
ce80acc818
Fixed HDMA timing )But still not verified)
2018-07-20 12:34:52 +03:00
Lior Halphon
b1cc55b786
Turns out Left/Right audio channels were flipped
2018-07-19 20:38:11 +03:00
Lior Halphon
c66b6fbafc
Fixed an edge case with DAC discharge emulation
2018-07-16 23:08:25 +03:00
Lior Halphon
2e9e3424ec
Document some revision differences
2018-07-14 21:52:54 +03:00
Lior Halphon
0145b790a3
Merge branch 'v0.11.x'
2018-07-11 20:08:33 +03:00
Lior Halphon
5f58323c01
Attempt to improve audio quality on frontend with big audio buffers
2018-07-10 21:33:03 +03:00
Lior Halphon
dc5cb71c22
Emulate CGB-C’s quirky LFSR function
2018-07-04 21:55:12 +03:00
Lior Halphon
f3437d7cc0
Added todo
2018-07-03 23:47:50 +03:00
Lior Halphon
b7b35c9b59
CGB-C timing
2018-07-03 22:25:09 +03:00
Lior Halphon
0a78f735d3
Fetcher Y is not cached on CGB-C
2018-07-03 22:14:53 +03:00
Lior Halphon
18ae18a95c
LYC bit on CGB-C
2018-07-03 21:56:32 +03:00
Lior Halphon
a7aabca618
Starting to add CGB-C support
2018-07-03 21:43:46 +03:00
Lior Halphon
47a74cb6c3
Randomize initial RAM values. Closes #82
2018-06-30 16:53:28 +03:00
Lior Halphon
2791775c5d
Improvements to the lcd
debugger command
2018-06-22 18:38:54 +03:00
Lior Halphon
6a7c084177
Fixed window regression
2018-06-18 21:57:01 +03:00
Lior Halphon
d81c23cb16
Fixed HDMA regression
2018-06-16 23:52:24 +03:00
Lior Halphon
45c73e0175
Replaced the is_cgb bool with a more future compatible model enum. Removed the GB_init_cgb API and replaced it with an extended GB_init and GB_switch_model_and_reset APIs that now receive a model parameter. Increased the struct version.
2018-06-16 13:59:33 +03:00
Lior Halphon
d95ad1ca54
SWAP was incorrectly disassembled as RLC
2018-06-09 15:39:40 +03:00
Lior Halphon
38c0cb3323
Typo
2018-06-09 15:12:42 +03:00
Lior Halphon
f64da1864f
APU glitch: When turning the APU on while DIV's bit 4 (or 5 in double speed mode), the first DIV/APU event is skipped.
2018-06-09 15:11:20 +03:00
Lior Halphon
593cb7c107
Pixel accurate emulation of Prehistorik Man on a CGB-CPU-E
2018-06-08 18:44:03 +03:00
Lior Halphon
ca01ff6f79
Finally, perfect emulation of the STAT write bug.
2018-06-08 17:16:15 +03:00
Lior Halphon
127324d2d6
Fixed regression involving rendering a window with negative X position. Closes #75
2018-06-07 23:08:46 +03:00
Lior Halphon
f1dfa2a1bc
More sensible implementation of the STAT interrupt.
2018-06-04 02:07:38 +03:00
Lior Halphon
0481ff9af5
Whoops
2018-06-04 01:52:24 +03:00
Lior Halphon
8721a48206
Fixed incorrect double speed behavior.
2018-06-03 00:36:05 +03:00
Lior Halphon
7003e31b7e
Fixed a regression with STAT blocking.
2018-06-02 04:00:10 +03:00
Lior Halphon
80c92daacd
Include cleanup ( #73 )
2018-05-27 19:30:23 +03:00
Lior Halphon
6532aef089
Correct emulation of the DMG stat write bug
2018-05-26 18:06:40 +03:00
Lior Halphon
9693b2de6a
Refined the STAT bug behavior. Still not perfect.
2018-05-26 17:06:49 +03:00
Lior Halphon
855ffb490a
A HBlank interrupt cannot occur in the last M-cycle of HBlank. Correct emulation of STAT access conflicts on the CGB (Test: CPU-E, single speed only). Fixes a minor graphical glitch in Pokémon Puzzle Challenge.
2018-05-25 23:42:36 +03:00
Lior Halphon
249acb04cc
Verified some timings on a DMG. Fixed palette write conflict timing (Although the fix kind of implies time traveling). Closes #65
2018-05-16 00:59:11 +03:00
Lior Halphon
562b43a7c5
Notes about the DMG wave-ram glitch
2018-05-15 23:02:07 +03:00
Lior Halphon
7df571d42f
Less strict matching for delete
and unwatch
. Fixes #71
2018-05-13 23:17:23 +03:00
Lior Halphon
1fcde88d8a
Improved accuracy of the halt bug
2018-05-12 22:13:52 +03:00
Lior Halphon
713dc02e46
A bit tacky, but T-cycle accurate emulation of LYC write conflicts on the CGB. Only single speed mode verified. Closes #54
2018-05-11 12:38:55 +03:00
Lior Halphon
af3554c1d1
More accurate emulation of the LYC register and interrupt. (Still not perfect on a CGB)
2018-04-27 13:40:39 +03:00
Lior Halphon
0f8385a798
Refined line 153 behavior on a CGB. Verified on CGB-E.
2018-04-25 00:08:06 +03:00
Lior Halphon
be9df4d658
Added mechanism to handle MMIO read/write conflicts. Fixes #65
2018-04-14 17:57:00 +03:00
Lior Halphon
2c6f7906c5
Make multi-byte opcodes trigger the OAM bug when they increase PC
2018-04-14 15:32:55 +03:00
Lior Halphon
84aa06aba5
Clean up OAM bug code
2018-04-14 13:35:16 +03:00
Lior Halphon
d667d87bbe
Refactor CPU code so handling access conflicts is possible
2018-04-14 13:25:55 +03:00
Lior Halphon
f1ec42d4ba
H/GDMA was 4 times faster than it should have been. Made it also more accurate. Fixes #56
2018-04-13 14:41:39 +03:00
orbea
10dc12c502
Core: Fix libretro builds
2018-04-11 14:21:46 -07:00
Lior Halphon
89094950f8
Correct emulation of mapping both button sets. Fixes #60
2018-04-07 16:45:31 +03:00
Lior Halphon
5be2b3db29
It appears that OAM DMA blocks PPU access to OAM
2018-04-07 13:59:36 +03:00
Lior Halphon
0725b008be
Further simplifications
2018-04-07 13:02:53 +03:00
Lior Halphon
097b768127
Update comments
2018-04-07 03:36:47 +03:00
Lior Halphon
9ce028056a
Cleanup
2018-04-07 03:26:10 +03:00
Lior Halphon
fed2556fc3
More reasonable implementation of sprite timings
2018-04-07 03:00:26 +03:00
Lior Halphon
0751eae90b
Moved the fetcher state machine to another function
2018-04-06 19:29:49 +03:00
Lior Halphon
0461fb5b2a
Simplified FIFO logic
2018-04-06 19:11:48 +03:00
Lior Halphon
cb01259073
Fixed #61
2018-04-06 11:37:49 +03:00
Lior Halphon
0c86ff1ee4
More CGB revision quirks
2018-04-06 04:00:37 +03:00
Lior Halphon
a6ed2029b7
New information about PPU changes between CGB-B and CGB-E
2018-04-06 03:19:47 +03:00
Lior Halphon
cc95c89d3c
Surprise! The CGB has a 16-bit VRAM data bus
2018-04-05 16:15:51 +03:00
Lior Halphon
9aadc80f75
Implemented some obscure PPU rendering quirks, verified some timings
2018-04-05 15:33:21 +03:00
Lior Halphon
d785e45308
More accurate emulation of LCDC.0
2018-04-05 12:27:01 +03:00
Lior Halphon
d8e0683c35
Fixed a bug where skipping a sprite by modifying LCDC flags mid-scanline will disable sprites for the rest of the scalene.
2018-04-05 00:51:37 +03:00
Lior Halphon
5d63892949
T-cycle accurate timing of the extra OAM interrupt. Fixes vblank_stat_intr-GS, related to #54
2018-04-03 01:43:24 +03:00
Lior Halphon
ba07e7ba85
Fixed a bug where 0:$dxxx reads/writes from the wrong bank in CGB mode. Made sure symbols are reset after reloading a sym file.
2018-04-02 19:57:39 +03:00
Lior Halphon
e163026ca9
The STAT bug does not occur during the glitched mode 0
2018-04-02 01:05:32 +03:00
Lior Halphon
9339a6027f
Slight refinement to the last fix
2018-04-01 22:20:26 +03:00
Lior Halphon
ec64c041ab
The OAM interrupt is internally implemented differently from the other 3. Fixed the stat_write_if tests, relates to #54
2018-04-01 21:45:56 +03:00
Lior Halphon
0d0d9ccdae
Fixed a timer regression, fixes timer_if in DMG mode. Relates to #54
2018-03-31 15:52:31 +03:00
Lior Halphon
73dc3560a5
Mode 0 interrupts do not occur in the glitched mode 0 of the first line 0. The extra OAM interrupt bug also affects DMG.
2018-03-31 13:18:02 +03:00
Lior Halphon
0a2d6e6dcb
Fixed DMG timing regression
2018-03-31 12:21:34 +03:00
Lior Halphon
9811dceca1
Emulate another OAM timing quirk; a sprite at x = 0 has extra penalty if SCX is not 0. Fixes intr_2_mode0_timing_sprites_scx*_nops, affects #54
2018-03-30 17:06:27 +03:00
Lior Halphon
2c44ffbe39
More accurate fetcher penalty emulation, fixed intr_2_mode0_timing_sprites_nops, affects #54
2018-03-30 02:53:49 +03:00
Lior Halphon
c7ca786e77
Attempt to fix building using MINGW. Affects #55
2018-03-29 21:27:19 +03:00
Lior Halphon
a9fbbd3894
Merge branch 'master' of https://github.com/LIJI32/SameBoy
2018-03-29 21:07:04 +03:00
Lior Halphon
e380a00b67
Fixed another timing regression with the CB opcodes
2018-03-29 21:06:53 +03:00
Kyle Swanson
7ffe132e79
fix typo
2018-03-28 21:38:48 -07:00
Kyle Swanson
7bfe5de9c7
chmod -x
2018-03-28 21:37:34 -07:00
Lior Halphon
96063fb0da
Fixed Windows build, added Unicode support in Windows.
2018-03-28 21:59:27 +03:00
Lior Halphon
4cf78139a8
Fixed a bug where SameBoy freezes for a while after leaving turbo mode
2018-03-27 23:33:31 +03:00
Lior Halphon
0e3d2770d9
Properly handle cases where an object’s X position is modified between the OAM mode and rendering mode
2018-03-27 22:13:08 +03:00
Lior Halphon
0912a30bb9
Fixed a regression in dmg_sound-2
2018-03-27 21:04:55 +03:00
Lior Halphon
f5493e023d
Fixed a timing regression in the CB opcodes
2018-03-27 20:21:24 +03:00
Lior Halphon
7671648fca
Simplified a function
2018-03-27 19:06:36 +03:00
Lior Halphon
7543461c24
Increasing PC in OAM triggers the OAM bug
2018-03-27 16:36:39 +03:00
Lior Halphon
4cbade9a88
Function name change
2018-03-27 15:55:12 +03:00
Lior Halphon
4986930511
Mostly complete emulation of the OAM bug. Passes oam_bug-2.
2018-03-27 15:46:00 +03:00
Lior Halphon
9093f22293
More accurate emulation of the OAM bug
2018-03-24 14:46:51 +03:00
Lior Halphon
5cb74fb684
Bugfix: turning the PPU off during OAM mode made the OAM bug persist while the LCD is off
2018-03-24 02:58:37 +03:00
Lior Halphon
d343152fca
Basic emulation of the OAM bug
2018-03-24 00:32:19 +03:00
Lior Halphon
f8c6b9e7a0
Fixed the lcd command
2018-03-23 21:26:49 +03:00
Lior Halphon
4e3928df81
Turns out the behavior differs between DMG and CGB – in DMG mode, the objects enabled bit is checked before halting the FIFOs, meaning that disabled sprites do not affect Mode 3’s length on the DMG.
2018-03-23 20:01:27 +03:00
Lior Halphon
48a8db233d
Refinement to the last fix
2018-03-23 19:54:11 +03:00
Lior Halphon
e9eeace995
The object enabled bit is checked only when popping from the object FIFO. Objects affect timing even when disabled.
2018-03-23 19:50:19 +03:00
Lior Halphon
04bfc89816
Cycle accurate OAM search mode
2018-03-23 19:07:14 +03:00
Lior Halphon
c11af7ea26
Fix CGB timings
2018-03-23 12:58:51 +03:00
Lior Halphon
3e5e17d1a3
Fixed CB [hl] opcodes timings
2018-03-23 12:35:37 +03:00
Lior Halphon
18e32d1755
Merge branch 'master' into timing
...
# Conflicts:
# Core/gb.c
2018-03-22 22:37:35 +02:00
Lior Halphon
577e23925b
Fixed sources-dmgABCXmgbS
2018-03-22 20:09:01 +02:00
Lior Halphon
e9f243a913
Fix sprite priority
2018-03-21 00:02:35 +02:00
Lior Halphon
cb33a5b25a
Fix Aevilla
2018-03-20 20:08:29 +02:00
Lior Halphon
3883b7d86a
Merge branch 'master' into timing
...
# Conflicts:
# Core/display.c
# Core/z80_cpu.c
2018-03-19 23:46:33 +02:00
Lior Halphon
b50c97f4a7
Prevent starting HDMA in the middle of an instruction, making both the CPU and DMA access memory at the same time. Closes #47
2018-03-19 20:01:31 +02:00
Lior Halphon
202eb2b5cc
Fix stat_lyc_onoff
2018-03-18 20:32:19 +02:00
Lior Halphon
80b1275e07
Fix stat_lyc_onoff
2018-03-18 20:08:45 +02:00
Lior Halphon
0dc30f081a
CGB halt interrupt timing
2018-03-17 23:21:14 +02:00
Lior Halphon
12ae5745db
While fixing some rendering issues, this change was incorrect.
2018-03-17 21:04:48 +02:00
Lior Halphon
269bac4626
More CGB fixes
2018-03-17 20:34:55 +02:00
Lior Halphon
21b75494a2
More CGB fixes (currently on DMG-mode CGB is verified). Halt interrupt timing isn’t correct yet.
2018-03-11 00:17:57 +02:00
Lior Halphon
15b6c48d7c
Fixed vblank_stat_intr-C
2018-03-10 15:52:22 +02:00
Lior Halphon
c267ad00b5
Goodbye
2018-03-09 23:34:23 +02:00
Lior Halphon
e8b107efdb
In double speed mode, there are no quirks where IF and STAT don’t update together
2018-03-09 23:31:49 +02:00
Lior Halphon
cb6bb0590e
Starting to fix CGB timing quirks
2018-03-09 21:11:35 +02:00
Lior Halphon
9083e883fe
CGB BG rendering
2018-03-09 18:52:36 +02:00
Lior Halphon
a32f232bb1
Fixed OAM-window priority glitch, fixed OAM glitch in Prehistoric Man
2018-03-09 17:10:19 +02:00
Lior Halphon
1149c266cf
More regression fixes, actually fix Pinball Deluxe this time
2018-03-08 23:22:03 +02:00
Lior Halphon
544ca2be4c
Changing the timings of memory writes so they’re not effectively one T-cycle late. This screws up APU’s cycle accuracy for now.
2018-03-05 21:17:37 +02:00
Lior Halphon
88a11b891f
Object rendering
2018-03-04 23:27:31 +02:00
Lior Halphon
3d1c8b50c4
OAM search and OAM timing in mode 3
2018-03-04 22:21:56 +02:00
Lior Halphon
476133abd0
The scrolled y value is cached and not recalculated
2018-03-03 20:51:38 +02:00
Lior Halphon
518746f664
fixed rendering off by one
2018-03-03 19:52:48 +02:00
Lior Halphon
496c5589e6
Added window support
2018-03-03 19:36:21 +02:00
Lior Halphon
5ea33cc931
Cleanup
2018-03-03 19:05:29 +02:00
Lior Halphon
b08f02c4f3
Rewriting the PPU rendering: T-cycle accurate background rendering. DMG only, CGB completely broken
2018-03-03 15:47:36 +02:00
Lior Halphon
a67db0595b
Fixed window behavior
2018-03-01 22:03:56 +02:00
Lior Halphon
b702d56547
Merge branch 'master' into timing
...
# Conflicts:
# Core/display.c
# Core/z80_cpu.c
2018-03-01 21:22:33 +02:00
Lior Halphon
94c6dbd281
Fixed ‘call’ instruction not being properly symbolicated. Closes #37
2018-03-01 21:12:37 +02:00
Lior Halphon
7248403be7
Fixed several DMG regressions, fixes Pinball Deluxe again
2018-03-01 00:12:04 +02:00
Lior Halphon
fb03479a1f
Added 16-bit dereferencing operator ({address}
) to the debugger. Closes #38
2018-02-28 19:39:22 +02:00
Lior Halphon
b02e40d5a2
Refinement to that last fix
2018-02-25 23:23:55 +02:00
Lior Halphon
90a943d05a
Emulate an HDMA quirk required to properly emulate Aevilia
2018-02-25 22:32:41 +02:00
Lior Halphon
ef670986c6
Rewrote PPU (currently only emulates DMG correctly) to use the new timing mechanism. Removed “future interrupts” (No longer required because SameBoy is now T-cycle based)
2018-02-25 00:48:45 +02:00
Lior Halphon
42ab746a66
Starting to remove the delayed interrupts hack – done for timer interrupt, broken for display interrupts
2018-02-23 15:33:44 +02:00
Lior Halphon
c48097a484
Convert div counter to the SM mechanism
2018-02-23 13:16:05 +02:00
Lior Halphon
5974092c94
Bugfix
2018-02-20 23:04:35 +02:00
Lior Halphon
56eac9f875
Removed some dead code from display.c
2018-02-20 21:23:27 +02:00
Lior Halphon
9802ca41dd
Components not affected by CGB’s double speed mode now operate in 8MHz mode to theoretically make advance_cycles(gb, 1) safe.
2018-02-20 21:17:12 +02:00
Lior Halphon
f79af39ea2
More accurate emulation of the APU’s analog characteristics
2018-02-16 18:01:50 +02:00
Lior Halphon
fc35111ae7
Corrected the emulated DAC’s range
2018-02-16 01:26:37 +02:00
Lior Halphon
0c231db9e7
This is probably not correct (and makes no sense from an hardware design perspective), but this correctly emulates my analog test cases and fixes the pops introduced by the last commit.
2018-02-13 23:13:15 +02:00
Lior Halphon
bfb37884e1
Inactive channels are not equivalent to channels with 0 volume.
2018-02-11 22:50:15 +02:00
Lior Halphon
afcc66fb3c
Added CPU under/over-clocking support in Core, add under-clocking hotkey in the Cocoa port, allow modifier keys to be configured as input keys in Cocoa.
2018-02-10 23:30:30 +02:00
Lior Halphon
0cbbaac490
Updated incorrect comment after verification
2018-02-10 19:50:42 +02:00
Lior Halphon
81f808e184
Refinements for the Wii U port
2018-02-10 15:02:22 +02:00
Lior Halphon
00c67f8842
Merge commit '217e9787bd640cbd1b8250e31c0064331ddc302f'
2018-02-10 14:49:57 +02:00
Lior Halphon
1c61b006ba
Added rewinding support to the core and the Cocoa frontend
2018-02-10 14:42:14 +02:00
radius
217e9787bd
change MAX_CH_AMP on WiiU
2018-02-07 15:28:30 -05:00
Lior Halphon
95234036bb
Added return value to GB_run API.
2018-01-31 15:18:04 +02:00
Lior Halphon
09dd47c6de
Fixed unintentional delay in NR50 and NR51’s effects
2018-01-19 19:56:39 +02:00
Lior Halphon
37906bcd1f
Fixed sound pops in Super Mario Land 2.
2018-01-19 00:47:46 +02:00
Lior Halphon
0a76881eb6
Correctly emulating NRx4 effects on the sound envelop of the previously playing sound. Closes #19
2018-01-06 12:37:45 +02:00
Lior Halphon
a20e8a8220
Fixed bug in NR42 write that also caused memory corruption
2018-01-06 12:17:06 +02:00
Lior Halphon
a1af4c59ca
Fixed NR51 volume levels (They’re 1-8, not 0-7)
2018-01-06 11:58:49 +02:00
Lior Halphon
2205493862
Bug fixes in the SDL port
2017-12-30 17:07:05 +02:00
Lior Halphon
d3a2e49d38
Merge branch 'sdl_gui' into libretro_core
...
# Conflicts:
# Makefile
# SDL/main.c
2017-12-29 13:12:12 +02:00
Lior Halphon
61f9dbd95d
Use SDL’s key mapping when available
2017-12-28 20:22:54 +02:00
Lior Halphon
dc59fdf40e
Highpass filter in SDL
2017-12-23 22:11:53 +02:00
Lior Halphon
f0e772ca97
Fixed: Loading states in DMG mode results in a black screen
2017-12-22 21:58:31 +02:00
Lior Halphon
19c382c9e0
Fixed ei_sequence test
2017-12-03 21:07:34 +02:00
Lior Halphon
4b69331321
Merge branch 'master' into libretro_core
2017-10-16 20:49:33 +03:00
Lior Halphon
e71154b7e0
Fixed set_color_correction breaking DMG’s palette
2017-10-16 20:48:39 +03:00
Lior Halphon
6c97bb9052
Accidentally reversed ifdef condition
2017-10-13 17:28:32 +03:00
Lior Halphon
27b5718b07
Merge branch 'master' into libretro_core
2017-10-12 22:50:02 +03:00
Lior Halphon
a753e00b59
Added direct_access interface to interrupt_enable/IE register
2017-10-12 22:49:39 +03:00
Lior Halphon
40e4f93637
Replaced libretro specific code with a generic API
2017-10-12 22:06:01 +03:00
Lior Halphon
6b71d1d477
“Baked” boot ROM is now auto-generated.
2017-10-12 21:52:51 +03:00
Lior Halphon
441781cbe9
Libretro .o files are now in the build/obj folder and are suffixed with _libretro (since they have different compilation flags). This also lets us rename gbmemory.c/h back to its original name.
2017-10-12 19:42:30 +03:00
Lior Halphon
7c0ad24175
Added compilation flag to disable timekeeping for frontends that handle fps keeping on their own
2017-10-12 19:24:12 +03:00
Lior Halphon
a50aa2486b
Removed input callbacks when no debugger is included
2017-10-12 19:16:33 +03:00
Lior Halphon
dcadfc37f4
Changed the way HAVE_DEBUGGER works and renamed it (so it’s on by default) to DISABLE_DEBUGGER. Fixes build break.
2017-10-12 19:05:27 +03:00
Lior Halphon
9615ca6fa6
Merge pull request #14 from libretro/master
...
libretro core
2017-10-12 18:29:26 +03:00
Lior Halphon
65dd02cc52
Added 3 color correction profiles, added color correction setting to Cocoa GUI, improved cross-platform and cross-frontend save-state compatibility
2017-10-12 17:22:22 +03:00
radius
8d691563c7
include unistd
2017-10-09 19:53:07 -05:00
radius
18b376ac5f
Updates:
...
-fix input descriptors
-implement savestates
-implement sram interface
2017-10-09 14:21:32 -05:00
twinaphex
a7db98c22e
Memory needs to be uniquely named for Android
2017-10-09 11:36:55 -05:00
twinaphex
b02aeab022
We don't need stdin
2017-10-09 11:36:54 -05:00
twinaphex
09f4edda57
Comment out debugger code - add HAVE_DEBUGGER ifdef
2017-10-09 11:36:53 -05:00
twinaphex
aeea20ae9d
Comment out nsleep
2017-10-09 11:36:53 -05:00
twinaphex
9f5b746e0b
Fix compiler error
2017-10-09 11:36:53 -05:00
radius
765a072c73
this fixes fast forwarding but probably has to change to a proper fix
2017-10-09 11:36:24 -05:00
twinaphex
33a9c54842
Correct memset lines
2017-10-09 11:36:23 -05:00
twinaphex
d433cdf260
Add baked-in generated BIOS files
2017-10-09 11:36:23 -05:00
Lior Halphon
c1f27d7b27
Spacing
2017-10-02 22:59:03 +03:00
Lior Halphon
d9b0576351
Emulation of NRX2-write glitches. Fixes Prehistorik Man audio.
2017-10-02 22:56:24 +03:00
Lior Halphon
78446f0ed4
Fixed several memory leaks (mostly in Cocoa port debugging utils)
2017-09-27 22:09:26 +03:00
Lior Halphon
7a41a9b417
Refined OAM interrupt timing. Fixes Pinball Deluxe in DMG mode; closes #1 .
2017-09-23 21:08:05 +03:00
Lior Halphon
1804a5c8e6
Updated save struct version
2017-09-23 00:25:21 +03:00
Lior Halphon
67f1566b5e
Minor refinement to sweep
2017-09-23 00:23:02 +03:00
Lior Halphon
e0a6edac35
Setting sweep period to 0 cancels pending calculate event
2017-09-22 14:53:24 +03:00
Lior Halphon
2ffce49e16
Minor bugfixes related to sweeping
2017-09-22 14:39:39 +03:00
Lior Halphon
75db33559a
Current sample index (Channel 1 and 2) is only reset after turning the APU off
2017-09-22 02:25:06 +03:00
Lior Halphon
8f4cd5c412
Corrected behavior for channel 1 and 2 restart
2017-09-22 02:04:29 +03:00
Lior Halphon
882b141478
Fixed dmg_sound-1
2017-09-21 18:32:21 +03:00
Lior Halphon
2ca550273a
Fixed dmg_sound-5
2017-09-21 18:18:10 +03:00
Lior Halphon
d3c15ef6ca
Fixing APU bugs, one at a time: Blargg’s dmg_sound 8.2
2017-09-21 14:52:09 +03:00
Lior Halphon
02ac609f3c
Merge branch 'master' into new_apu
2017-09-20 16:16:05 +03:00
Lior Halphon
be038dc8e7
Refinement to the last fix
2017-09-20 03:08:54 +03:00
Lior Halphon
57e7782ac4
Interrupt servicing is now more accurate. Fixes mooneye-gb’s ie_push (all models) and Pinball Deluxe (!!!) for CGB mode
2017-09-20 02:49:45 +03:00
Lior Halphon
09b7e2fff4
Fixed a bug in scx_delay’s calculation
2017-09-11 23:56:35 +03:00
Lior Halphon
b9bdd6c49c
Merge branch 'master' into new_apu
2017-09-10 02:33:40 +03:00
Lior Halphon
14f267b4fa
Another whoops
2017-09-09 19:31:05 +03:00
Lior Halphon
02841ddde6
Whoops
2017-09-09 16:55:55 +03:00
Lior Halphon
026baddbab
Implemented delayed/future interrupts for DMG hblank interrupt. Restores vblank_stat_intr-GS support.
2017-09-09 13:45:01 +03:00
Lior Halphon
1e90400916
Reimplemented delayed/future interrupts, currently correct only for CGB.
2017-09-09 13:32:12 +03:00
Lior Halphon
742c9e95d3
Updated previous timing improvements to correctly implement double speed behavior
2017-09-08 23:46:38 +03:00
Lior Halphon
e5d354e896
Refined SCX’s effects on PPU timing
2017-09-08 23:02:24 +03:00
Lior Halphon
0f1fa3176f
Refinements to LCD timing (breaks vblank_stat_intr-GS for now)
2017-09-08 12:59:57 +03:00
Lior Halphon
0f643e01b7
Removing the delayed interrupt mechanism, research is not complete enough for implementation
2017-09-08 12:58:35 +03:00
Lior Halphon
ba0e66a5b7
Merge branch 'master' into new_apu
2017-09-04 18:41:13 +03:00
Lior Halphon
72d26c7046
Fixed obscure timer behavior, fixed regression in rapid_toggle.gb.
2017-09-04 18:40:43 +03:00
Lior Halphon
9bde98dede
SCY latching is now correctly emulated, rendering mode timing refined.
2017-09-04 15:45:18 +03:00
Lior Halphon
a1a13c61bf
On CGB, the VBlank and STAT interrupts are “delayed” by one T-cycle (relative to IF) since they’re not aligned to a T-Cycle
2017-09-03 00:41:52 +03:00
Lior Halphon
0532d2a159
A test ROM I wrote seems to contradicts some of AntonioND’s findings regrading PPU timing in CGB mode. CGB mode now behaves like DMG mode until I figure out what caused the difference.
2017-09-02 23:51:02 +03:00
Lior Halphon
9b490396bb
Fixed timing when turning the LCD display on during double speed mode
2017-09-02 23:26:45 +03:00
Lior Halphon
54eb51d8db
Refined timer interrupt timing
2017-09-02 22:08:20 +03:00
Lior Halphon
e7d5cdbb42
Merge branch 'master' into new_apu
2017-08-20 01:37:33 +03:00
Lior Halphon
cbbaf2ee84
Refined Window behavior once more, Fixes #12 (While not breaking Donkey Kong or 007)
2017-08-20 01:34:12 +03:00
Lior Halphon
62878fdc7a
More accurate div-event handling
2017-08-15 22:27:15 +03:00
Lior Halphon
8d011ca4b9
Accuracy improvements (Sweep)
2017-08-15 22:05:20 +03:00
Lior Halphon
d04aaddcbd
Added highpass filter
2017-08-15 21:59:11 +03:00
Lior Halphon
ca59aca4a6
Fixed a bug where writing to NR52 affected channels 1 and 2’s duty pattern in DMG mode. Fixed NR43 being written to NR44 as well.
2017-08-13 20:26:35 +03:00
Lior Halphon
36943866e2
Better click prevention
2017-08-12 23:35:18 +03:00
Lior Halphon
d43daed6a6
Merge branch 'master' into new_apu
2017-08-12 21:43:09 +03:00
Lior Halphon
7df4e56454
KEY1 is only writable in CGB mode; screen should be black is LCD is on while in stop mode.
2017-08-12 21:42:47 +03:00
Lior Halphon
dba7370d6d
Turns out APU signal is inverted. This fixes Perfect Dark’s audio.
2017-08-12 20:47:55 +03:00
Lior Halphon
688991f57f
The volume envelopes and length controls are handled in different phases of the div-divider
2017-08-12 20:17:20 +03:00
Lior Halphon
4b8be255ce
Fixed some channel 4 delays, documented a not currently emulated timing quirk.
2017-08-12 19:50:39 +03:00
Lior Halphon
066efab985
In DMG mode, the length registers are not affected by turning the APU on and off. Why? Why not!
2017-08-11 22:23:03 +03:00
Lior Halphon
0e22ad8eb1
Noise channel support
2017-08-11 17:57:08 +03:00
Lior Halphon
1a8bcd314d
Accuracy improvements to sweeping (Still not complete though, more research needed)
2017-08-10 19:42:23 +03:00
Lior Halphon
ab5611119a
Accuracy improvements, especially to the length control
2017-08-02 21:14:23 +03:00
Lior Halphon
d65c2247e5
Added channel 1 and 2, fixed accuracy issues with channel 3
2017-07-27 23:11:33 +03:00
Lior Halphon
2936f7fa57
Fixed channel 3 counter behavior, verified with new tests. The DIV register ticks the APU at 512Hz.
2017-07-22 19:51:11 +03:00
Lior Halphon
a19ee1e5e0
2MHz audio downscaling support. Implemented NR50 and NR51.
2017-07-21 23:17:48 +03:00
Lior Halphon
baccf336d7
Complete rewrite of the APU. Channel 3 is complete and passes all the relevant tests from blargg’s suite, as well as PCM34-based tests. Actual sound output is basic and limited, though.
2017-07-21 19:06:55 +03:00
nattthebear
eb7492c6c6
Fix undefined behavior (sequence point modification). GCC 4.6.4 compiles the code incorrectly without this fix.
2017-07-16 21:08:07 -04:00
Lior Halphon
c4ccbd5cce
Improved serial interrupt timing, fixes boot_sclk_align.
2017-06-23 17:58:04 +03:00
Lior Halphon
c59272d46d
Misc minor fixes, fixes several Mooneye-GB tests
2017-06-21 20:39:23 +03:00
Lior Halphon
efbc385417
Forgot to amend the last commit, it was broken.
2017-06-21 01:07:11 +03:00
Lior Halphon
aefca34b39
Improved MBC1 emulation. Fixed incorrect error messages.
2017-06-19 19:46:09 +03:00
Lior Halphon
abf7efcc5a
Fixed lcdon_write_timing.
2017-06-18 21:27:07 +03:00
Lior Halphon
86c9f9d89d
Updated SameBoy to pass Mooneye-GB’s lcdon_timing test (on a DMG), as well as refined related CBG behaviors.
2017-06-17 22:17:58 +03:00
Lior Halphon
babcc0a7dc
Added API to load/save states from RAM
2017-06-14 00:23:34 +03:00
Lior Halphon
144d0348dd
Loading a save state creating during the effect of the previous MBC RAM bug will now attempt to fix the (broken) save state.
2017-06-08 23:26:04 +03:00
Lior Halphon
c650337928
Fixed a bug where MBC RAM was no longer accessible after using the GB_reset functions
2017-06-08 22:48:23 +03:00
Lior Halphon
a9475fbdf4
Refined the behavior of the last fix on a DMG.
2017-06-03 20:06:52 +03:00
Lior Halphon
65b0dcb2c5
Fixed a bug where SameBoy freeze for a moment after leaving turbo mode
2017-06-03 17:02:12 +03:00
Lior Halphon
d72807dd67
Implemented LCD first-frame-skip behavior, fixes a visual glitch in Pokémon Pinball
2017-06-03 16:42:42 +03:00