Lior Halphon
9693b2de6a
Refined the STAT bug behavior. Still not perfect.
2018-05-26 17:06:49 +03:00
Lior Halphon
855ffb490a
A HBlank interrupt cannot occur in the last M-cycle of HBlank. Correct emulation of STAT access conflicts on the CGB (Test: CPU-E, single speed only). Fixes a minor graphical glitch in Pokémon Puzzle Challenge.
2018-05-25 23:42:36 +03:00
Lior Halphon
249acb04cc
Verified some timings on a DMG. Fixed palette write conflict timing (Although the fix kind of implies time traveling). Closes #65
2018-05-16 00:59:11 +03:00
Lior Halphon
562b43a7c5
Notes about the DMG wave-ram glitch
2018-05-15 23:02:07 +03:00
Lior Halphon
7df571d42f
Less strict matching for delete and unwatch. Fixes #71
2018-05-13 23:17:23 +03:00
Lior Halphon
1fcde88d8a
Improved accuracy of the halt bug
2018-05-12 22:13:52 +03:00
Lior Halphon
4527d9ee39
Styling fixes, fixed bugs caused by a rebellious brace, removed debug prints
2018-05-11 13:29:58 +03:00
Lior Halphon
9a29beb189
Merge commit '8f3fc1c2ade3c1c632cd3f3998ee26d2962e4dea'
...
# Conflicts:
# SDL/main.c
2018-05-11 13:26:30 +03:00
Lior Halphon
6b6c25635a
Merge commit '240730417774174315c2f7c148393834eb3297eb'
2018-05-11 13:11:53 +03:00
Lior Halphon
bfc96abf8f
Make save state names consistent across the Cocoa and SDL port
2018-05-11 12:51:15 +03:00
Lior Halphon
feaa0d0654
Merge commit '7fe86cec59c1143275ffb7fc07b6716ae0116033'
2018-05-11 12:50:53 +03:00
Lior Halphon
f4eddf316b
Merge commit '9343d8162d5e6934d7894d9eea57c55f52faa503'
2018-05-11 12:46:23 +03:00
Lior Halphon
713dc02e46
A bit tacky, but T-cycle accurate emulation of LYC write conflicts on the CGB. Only single speed mode verified. Closes #54
2018-05-11 12:38:55 +03:00
Lior Halphon
af3554c1d1
More accurate emulation of the LYC register and interrupt. (Still not perfect on a CGB)
2018-04-27 13:40:39 +03:00
Lior Halphon
0f8385a798
Refined line 153 behavior on a CGB. Verified on CGB-E.
2018-04-25 00:08:06 +03:00
Lothar Serra Mari
8f3fc1c2ad
Fix check for SDL2 version
2018-04-22 16:20:11 +02:00
Lothar Serra Mari
ca571c6fa5
SDL2: Update to SDL_OpenAudioDevice()
...
Instead of the legacy SDL_OpenAudio() method, we now use the newer
SDL_OpenAudioDevice() functions. This fixes audio in Windows if the SDL
version is 2.0.6 or higher.
It also allows us to use 48kHz audio for Windows (96kHz somewhat works
too, but since we don't get absolutely smooth audio with it, I'd stick
with 48kHz for now until we find a solution. 44.1Khz is available as
fallback for SDL 2.0.5 and lower. Yes, the 2.0.5 to 2.0.6 transition was
quite harsh in terms of Windows audio support...
2018-04-22 15:22:10 +02:00
Lothar Serra Mari
2407304177
SDL2: Write battery file information before issueing RESET_COMMAND
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Before performing the GB reset, we should perform a GB_save_battery.
Otherwise, resetting the emulation will kill ("kill" as in simply don't
write them into the .sav) all changes made to the battery save since
sameboy was started.
2018-04-19 16:47:54 +02:00
Lothar Serra Mari
7fe86cec59
Fix savestates in SDL2 port
...
Because SDL_SCANCODE_0 comes *after* SDL_SCANCODE_9 in the SDL keycode
table, we have to check if the keycode is between >=1 and <=0. We also
have to substract SDL_SCANCODE_1 in order to set command_parameter
properly.
Errata: Currently, the savestate created with CTRL+0 is created, but
refuses to load on Windows (working fine on Linux).
2018-04-19 14:52:36 +02:00
Lothar Serra Mari
9343d8162d
Add fullscreen mode for the SDL2 port
2018-04-18 19:22:08 +02:00
Lior Halphon
be9df4d658
Added mechanism to handle MMIO read/write conflicts. Fixes #65
2018-04-14 17:57:00 +03:00
Lior Halphon
2c6f7906c5
Make multi-byte opcodes trigger the OAM bug when they increase PC
2018-04-14 15:32:55 +03:00
Lior Halphon
84aa06aba5
Clean up OAM bug code
2018-04-14 13:35:16 +03:00
Lior Halphon
d667d87bbe
Refactor CPU code so handling access conflicts is possible
2018-04-14 13:25:55 +03:00
Lior Halphon
f1ec42d4ba
H/GDMA was 4 times faster than it should have been. Made it also more accurate. Fixes #56
2018-04-13 14:41:39 +03:00
Lior Halphon
51e3cb7b9f
Merge pull request #64 from orbea/debugger
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Core: Fix libretro builds
2018-04-12 00:25:38 +03:00
orbea
10dc12c502
Core: Fix libretro builds
2018-04-11 14:21:46 -07:00
Lior Halphon
417ae21dfa
Merge pull request #63 from libretro/master
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Refactor android jni makefiles (#17 )
2018-04-11 11:02:03 +03:00
webgeek1234
ebe0aa0c76
Refactor android jni makefiles ( #17 )
2018-04-10 21:42:04 -05:00
Lior Halphon
89094950f8
Correct emulation of mapping both button sets. Fixes #60
2018-04-07 16:45:31 +03:00
Lior Halphon
5be2b3db29
It appears that OAM DMA blocks PPU access to OAM
2018-04-07 13:59:36 +03:00
Lior Halphon
0725b008be
Further simplifications
2018-04-07 13:02:53 +03:00
Lior Halphon
097b768127
Update comments
2018-04-07 03:36:47 +03:00
Lior Halphon
9ce028056a
Cleanup
2018-04-07 03:26:10 +03:00
Lior Halphon
fed2556fc3
More reasonable implementation of sprite timings
2018-04-07 03:00:26 +03:00
Lior Halphon
0751eae90b
Moved the fetcher state machine to another function
2018-04-06 19:29:49 +03:00
Lior Halphon
0461fb5b2a
Simplified FIFO logic
2018-04-06 19:11:48 +03:00
Lior Halphon
cb01259073
Fixed #61
2018-04-06 11:37:49 +03:00
Lior Halphon
0c86ff1ee4
More CGB revision quirks
2018-04-06 04:00:37 +03:00
Lior Halphon
a6ed2029b7
New information about PPU changes between CGB-B and CGB-E
2018-04-06 03:19:47 +03:00
Lior Halphon
cc95c89d3c
Surprise! The CGB has a 16-bit VRAM data bus
2018-04-05 16:15:51 +03:00
Lior Halphon
9aadc80f75
Implemented some obscure PPU rendering quirks, verified some timings
2018-04-05 15:33:21 +03:00
Lior Halphon
d785e45308
More accurate emulation of LCDC.0
2018-04-05 12:27:01 +03:00
Lior Halphon
d8e0683c35
Fixed a bug where skipping a sprite by modifying LCDC flags mid-scanline will disable sprites for the rest of the scalene.
2018-04-05 00:51:37 +03:00
Lior Halphon
b1d65fd84f
Fixed boot_hwio-C (for SameBoy’s boot). Closes #59
2018-04-03 20:10:11 +03:00
Lior Halphon
5d63892949
T-cycle accurate timing of the extra OAM interrupt. Fixes vblank_stat_intr-GS, related to #54
2018-04-03 01:43:24 +03:00
Lior Halphon
ba07e7ba85
Fixed a bug where 0:$dxxx reads/writes from the wrong bank in CGB mode. Made sure symbols are reset after reloading a sym file.
2018-04-02 19:57:39 +03:00
Lior Halphon
e163026ca9
The STAT bug does not occur during the glitched mode 0
2018-04-02 01:05:32 +03:00
Lior Halphon
9339a6027f
Slight refinement to the last fix
2018-04-01 22:20:26 +03:00
Lior Halphon
ec64c041ab
The OAM interrupt is internally implemented differently from the other 3. Fixed the stat_write_if tests, relates to #54
2018-04-01 21:45:56 +03:00
