Lior Halphon
e1873ad2ec
Add JOYP write callback API
2019-07-15 22:35:21 +03:00
Lior Halphon
2bfe922650
Allow emulating an SGB without SFC HLE
2019-07-15 20:47:16 +03:00
Lior Halphon
9f7255cd23
Make the automation results more consistent across revisions, and making use of this change as a chance to add color correction to the automation
2019-07-13 20:29:11 +03:00
Lior Halphon
50a6a3e35c
Fix libretro SGB1 FPS, fix un/serialization memory corruptions in libretro
2019-06-19 23:49:43 +03:00
Lior Halphon
e268efefef
Redesign and reimplement the audio API, let the frontends handle more stuff. Probably affects #161
2019-06-15 23:22:27 +03:00
Lior Halphon
274760746e
Fix #165
2019-06-07 19:18:07 +03:00
Lior Halphon
2f9de4942c
Increase input polling frequency in the Cocoa and SDL frontends, should make inputs look less synthetic and potentially reduce input lag
2019-06-07 18:27:25 +03:00
Lior Halphon
64879f5b02
Accurate emulation of (most aspects of) stop mode
2019-06-07 13:53:50 +03:00
Lior Halphon
3e724afb0a
Basic SGB support in the SDL port
2019-05-18 18:45:31 +03:00
Lior Halphon
06670fc970
Fix #172 . Allow unroll optimizations when compiling with GCC.
2019-05-10 21:51:11 +03:00
Lior Halphon
05cd81b77c
Implemented jump-to breakpoints
2019-04-12 20:29:43 +03:00
Lior Halphon
7242ddae64
speling is difikult
2019-03-16 20:56:22 +02:00
Lior Halphon
c342663200
Emulate serial bit shifting, update the serial API to use bits instead of bytes, update printer emulation and libretro to use the new API
2019-03-15 14:36:10 +02:00
Lior Halphon
9d0aadb83f
Emulate missing Vreset signal (SGB only for now) and ICD2 desyncing
2019-02-15 17:04:48 +02:00
Lior Halphon
73a54049d2
Accurate PPU access timings
2019-01-19 19:32:26 +02:00
Lior Halphon
ba5c07bed9
Correctly emulate speed switch timing
2019-01-13 01:09:41 +02:00
Lior Halphon
c74b39e712
The CPU core of the Game Boy is (most likely) called SM83
2019-01-12 00:42:16 +02:00
Lior Halphon
21eb96a2f5
Joypad multiplayer support (Cocoa)
2018-12-15 18:55:41 +02:00
Lior Halphon
b1a2e45168
Improvements to the SGB animation
2018-12-01 13:39:43 +02:00
Lior Halphon
2d6d1e6325
SGB boot animation
2018-11-24 13:21:00 +02:00
Lior Halphon
2f2b792edf
SGB save states
2018-11-16 01:53:01 +02:00
Lior Halphon
634a54c046
SGB resolution support (Cocoa only so far)
2018-11-15 00:21:21 +02:00
Lior Halphon
6ba5cfbeef
Support for multi-packet SGB commands
2018-11-13 23:45:26 +02:00
Lior Halphon
7735d638c6
Multiplayer SGB APIs/SGB detection
2018-11-12 00:37:06 +02:00
Lior Halphon
5c581651ce
Handle the SGB header commands, disable SGB functions if needed.
2018-11-11 22:50:00 +02:00
Lior Halphon
44891d5c4a
Initial code to support SGB, command “parsing”, replacement SGB boot ROM
2018-11-11 01:16:32 +02:00
Lior Halphon
c9d6a1381f
Cross emulator compatibility with RTC saves
2018-11-03 01:31:14 +02:00
Lior Halphon
2e9e3424ec
Document some revision differences
2018-07-14 21:52:54 +03:00
Lior Halphon
a7aabca618
Starting to add CGB-C support
2018-07-03 21:43:46 +03:00
Lior Halphon
45c73e0175
Replaced the is_cgb bool with a more future compatible model enum. Removed the GB_init_cgb API and replaced it with an extended GB_init and GB_switch_model_and_reset APIs that now receive a model parameter. Increased the struct version.
2018-06-16 13:59:33 +03:00
Lior Halphon
f64da1864f
APU glitch: When turning the APU on while DIV's bit 4 (or 5 in double speed mode), the first DIV/APU event is skipped.
2018-06-09 15:11:20 +03:00
Lior Halphon
f1dfa2a1bc
More sensible implementation of the STAT interrupt.
2018-06-04 02:07:38 +03:00
Lior Halphon
855ffb490a
A HBlank interrupt cannot occur in the last M-cycle of HBlank. Correct emulation of STAT access conflicts on the CGB (Test: CPU-E, single speed only). Fixes a minor graphical glitch in Pokémon Puzzle Challenge.
2018-05-25 23:42:36 +03:00
Lior Halphon
1fcde88d8a
Improved accuracy of the halt bug
2018-05-12 22:13:52 +03:00
Lior Halphon
af3554c1d1
More accurate emulation of the LYC register and interrupt. (Still not perfect on a CGB)
2018-04-27 13:40:39 +03:00
Lior Halphon
d667d87bbe
Refactor CPU code so handling access conflicts is possible
2018-04-14 13:25:55 +03:00
Lior Halphon
f1ec42d4ba
H/GDMA was 4 times faster than it should have been. Made it also more accurate. Fixes #56
2018-04-13 14:41:39 +03:00
Lior Halphon
fed2556fc3
More reasonable implementation of sprite timings
2018-04-07 03:00:26 +03:00
Lior Halphon
0751eae90b
Moved the fetcher state machine to another function
2018-04-06 19:29:49 +03:00
Lior Halphon
0461fb5b2a
Simplified FIFO logic
2018-04-06 19:11:48 +03:00
Lior Halphon
9aadc80f75
Implemented some obscure PPU rendering quirks, verified some timings
2018-04-05 15:33:21 +03:00
Lior Halphon
ec64c041ab
The OAM interrupt is internally implemented differently from the other 3. Fixed the stat_write_if tests, relates to #54
2018-04-01 21:45:56 +03:00
Lior Halphon
73dc3560a5
Mode 0 interrupts do not occur in the glitched mode 0 of the first line 0. The extra OAM interrupt bug also affects DMG.
2018-03-31 13:18:02 +03:00
Lior Halphon
9811dceca1
Emulate another OAM timing quirk; a sprite at x = 0 has extra penalty if SCX is not 0. Fixes intr_2_mode0_timing_sprites_scx*_nops, affects #54
2018-03-30 17:06:27 +03:00
Lior Halphon
2c44ffbe39
More accurate fetcher penalty emulation, fixed intr_2_mode0_timing_sprites_nops, affects #54
2018-03-30 02:53:49 +03:00
Lior Halphon
96063fb0da
Fixed Windows build, added Unicode support in Windows.
2018-03-28 21:59:27 +03:00
Lior Halphon
0e3d2770d9
Properly handle cases where an object’s X position is modified between the OAM mode and rendering mode
2018-03-27 22:13:08 +03:00
Lior Halphon
4986930511
Mostly complete emulation of the OAM bug. Passes oam_bug-2.
2018-03-27 15:46:00 +03:00
Lior Halphon
04bfc89816
Cycle accurate OAM search mode
2018-03-23 19:07:14 +03:00
Lior Halphon
3883b7d86a
Merge branch 'master' into timing
...
# Conflicts:
# Core/display.c
# Core/z80_cpu.c
2018-03-19 23:46:33 +02:00
Lior Halphon
b50c97f4a7
Prevent starting HDMA in the middle of an instruction, making both the CPU and DMA access memory at the same time. Closes #47
2018-03-19 20:01:31 +02:00
Lior Halphon
c267ad00b5
Goodbye
2018-03-09 23:34:23 +02:00
Lior Halphon
9083e883fe
CGB BG rendering
2018-03-09 18:52:36 +02:00
Lior Halphon
a32f232bb1
Fixed OAM-window priority glitch, fixed OAM glitch in Prehistoric Man
2018-03-09 17:10:19 +02:00
Lior Halphon
3d1c8b50c4
OAM search and OAM timing in mode 3
2018-03-04 22:21:56 +02:00
Lior Halphon
476133abd0
The scrolled y value is cached and not recalculated
2018-03-03 20:51:38 +02:00
Lior Halphon
496c5589e6
Added window support
2018-03-03 19:36:21 +02:00
Lior Halphon
5ea33cc931
Cleanup
2018-03-03 19:05:29 +02:00
Lior Halphon
b08f02c4f3
Rewriting the PPU rendering: T-cycle accurate background rendering. DMG only, CGB completely broken
2018-03-03 15:47:36 +02:00
Lior Halphon
b702d56547
Merge branch 'master' into timing
...
# Conflicts:
# Core/display.c
# Core/z80_cpu.c
2018-03-01 21:22:33 +02:00
Lior Halphon
90a943d05a
Emulate an HDMA quirk required to properly emulate Aevilia
2018-02-25 22:32:41 +02:00
Lior Halphon
ef670986c6
Rewrote PPU (currently only emulates DMG correctly) to use the new timing mechanism. Removed “future interrupts” (No longer required because SameBoy is now T-cycle based)
2018-02-25 00:48:45 +02:00
Lior Halphon
42ab746a66
Starting to remove the delayed interrupts hack – done for timer interrupt, broken for display interrupts
2018-02-23 15:33:44 +02:00
Lior Halphon
c48097a484
Convert div counter to the SM mechanism
2018-02-23 13:16:05 +02:00
Lior Halphon
9802ca41dd
Components not affected by CGB’s double speed mode now operate in 8MHz mode to theoretically make advance_cycles(gb, 1) safe.
2018-02-20 21:17:12 +02:00
Lior Halphon
afcc66fb3c
Added CPU under/over-clocking support in Core, add under-clocking hotkey in the Cocoa port, allow modifier keys to be configured as input keys in Cocoa.
2018-02-10 23:30:30 +02:00
Lior Halphon
1c61b006ba
Added rewinding support to the core and the Cocoa frontend
2018-02-10 14:42:14 +02:00
Lior Halphon
95234036bb
Added return value to GB_run API.
2018-01-31 15:18:04 +02:00
Lior Halphon
27b5718b07
Merge branch 'master' into libretro_core
2017-10-12 22:50:02 +03:00
Lior Halphon
a753e00b59
Added direct_access interface to interrupt_enable/IE register
2017-10-12 22:49:39 +03:00
Lior Halphon
40e4f93637
Replaced libretro specific code with a generic API
2017-10-12 22:06:01 +03:00
Lior Halphon
441781cbe9
Libretro .o files are now in the build/obj folder and are suffixed with _libretro (since they have different compilation flags). This also lets us rename gbmemory.c/h back to its original name.
2017-10-12 19:42:30 +03:00
Lior Halphon
9615ca6fa6
Merge pull request #14 from libretro/master
...
libretro core
2017-10-12 18:29:26 +03:00
Lior Halphon
65dd02cc52
Added 3 color correction profiles, added color correction setting to Cocoa GUI, improved cross-platform and cross-frontend save-state compatibility
2017-10-12 17:22:22 +03:00
twinaphex
a7db98c22e
Memory needs to be uniquely named for Android
2017-10-09 11:36:55 -05:00
twinaphex
d433cdf260
Add baked-in generated BIOS files
2017-10-09 11:36:23 -05:00
Lior Halphon
1804a5c8e6
Updated save struct version
2017-09-23 00:25:21 +03:00
Lior Halphon
b9bdd6c49c
Merge branch 'master' into new_apu
2017-09-10 02:33:40 +03:00
Lior Halphon
1e90400916
Reimplemented delayed/future interrupts, currently correct only for CGB.
2017-09-09 13:32:12 +03:00
Lior Halphon
0f643e01b7
Removing the delayed interrupt mechanism, research is not complete enough for implementation
2017-09-08 12:58:35 +03:00
Lior Halphon
ba0e66a5b7
Merge branch 'master' into new_apu
2017-09-04 18:41:13 +03:00
Lior Halphon
72d26c7046
Fixed obscure timer behavior, fixed regression in rapid_toggle.gb.
2017-09-04 18:40:43 +03:00
Lior Halphon
9bde98dede
SCY latching is now correctly emulated, rendering mode timing refined.
2017-09-04 15:45:18 +03:00
Lior Halphon
54eb51d8db
Refined timer interrupt timing
2017-09-02 22:08:20 +03:00
Lior Halphon
e7d5cdbb42
Merge branch 'master' into new_apu
2017-08-20 01:37:33 +03:00
Lior Halphon
cbbaf2ee84
Refined Window behavior once more, Fixes #12 (While not breaking Donkey Kong or 007)
2017-08-20 01:34:12 +03:00
Lior Halphon
d65c2247e5
Added channel 1 and 2, fixed accuracy issues with channel 3
2017-07-27 23:11:33 +03:00
Lior Halphon
a19ee1e5e0
2MHz audio downscaling support. Implemented NR50 and NR51.
2017-07-21 23:17:48 +03:00
Lior Halphon
baccf336d7
Complete rewrite of the APU. Channel 3 is complete and passes all the relevant tests from blargg’s suite, as well as PCM34-based tests. Actual sound output is basic and limited, though.
2017-07-21 19:06:55 +03:00
Lior Halphon
c4ccbd5cce
Improved serial interrupt timing, fixes boot_sclk_align.
2017-06-23 17:58:04 +03:00
Lior Halphon
efbc385417
Forgot to amend the last commit, it was broken.
2017-06-21 01:07:11 +03:00
Lior Halphon
abf7efcc5a
Fixed lcdon_write_timing.
2017-06-18 21:27:07 +03:00
Lior Halphon
86c9f9d89d
Updated SameBoy to pass Mooneye-GB’s lcdon_timing test (on a DMG), as well as refined related CBG behaviors.
2017-06-17 22:17:58 +03:00
Lior Halphon
babcc0a7dc
Added API to load/save states from RAM
2017-06-14 00:23:34 +03:00
Lior Halphon
a9475fbdf4
Refined the behavior of the last fix on a DMG.
2017-06-03 20:06:52 +03:00
Lior Halphon
d72807dd67
Implemented LCD first-frame-skip behavior, fixes a visual glitch in Pokémon Pinball
2017-06-03 16:42:42 +03:00
Lior Halphon
86332d0311
Modifying WX and WY outside of VBlank is now more accurate, but still requires more research. Closes #6 .
2017-05-12 19:33:42 +03:00
Lior Halphon
00623d4eea
- Added audio supersampling support to greatly improve audio quality.
...
- Fixed a bug where low sampling rate or disabled sound resulted in wrong APU behavior.
- Added API to get the current number of pending samples.
- This change broke save state compatibility with v0.8 and older
Closes #8 .
2017-05-12 17:11:55 +03:00
Lior Halphon
b858f17425
Added the GB_run_frame API; closes #5 .
2017-04-25 00:19:10 +03:00
Lior Halphon
22d3510dde
Added LCD command to the debugger
2017-04-22 14:55:17 +03:00