Commit Graph

297 Commits

Author SHA1 Message Date
Lior Halphon
96d127e160 Remove the SLD command, reorder debugger commands 2022-07-01 16:14:52 +03:00
Lior Halphon
aaf9a76b67 The vblank callback now reports the vblank type 2022-06-25 01:59:51 +03:00
Lior Halphon
22f8ab6509 Last fix was wrong, this is correct 2022-06-17 18:17:29 +03:00
Lior Halphon
4d90504688 HuC-1 mode is not a thing, fixes Robopon Japanese prototype 2022-06-11 20:57:02 +03:00
Lior Halphon
d41c188cfd More accurate Camera MBC emulation 2022-06-11 14:44:06 +03:00
Lior Halphon
4f91b19a94 Added MBC7 BESS support, documented BESS TPP1 2022-06-05 14:09:33 +03:00
Lior Halphon
bb836662dd More accurate emulation of Hblank skip, emulation of Mode 2 skip 2022-05-14 01:14:41 +03:00
Lior Halphon
4521bb4767 Fixed and accurate emulation of object at x=0 timings 2022-05-11 02:15:56 +03:00
Lior Halphon
6337e3e43a Remove unused 2022-05-07 20:24:28 +03:00
Lior Halphon
ac29b4391e Refactor FIFOs 2022-05-07 19:27:25 +03:00
Lior Halphon
b2edcc9543 Improve serial accuracy 2022-04-17 23:41:05 +03:00
Lior Halphon
5e119548e9 GDMA during mode 3 writes to both banks, list AGB_E as a future model 2022-03-09 00:32:50 +02:00
Lior Halphon
c78a003712 MMM01 support 2022-03-05 21:20:42 +02:00
Lior Halphon
a621803e82 More compact memory usage for symbol maps, removes the 0x200 bank limit 2022-02-28 23:30:31 +02:00
Lior Halphon
4c6bc91ded Add missing register 2022-02-14 22:59:05 +02:00
Lior Halphon
a4209b47d0 Be consistent with hex casing 2022-02-13 16:58:44 +02:00
Lior Halphon
97c758ba75 More accurate internal bus behavior 2022-02-06 13:02:15 +02:00
Lior Halphon
4e27558ac2 Mode 2 OAM open bus behavior 2022-02-05 18:50:33 +02:00
Lior Halphon
1a41957b3c LCDOff behavior, basic halt/stop behavior 2022-01-31 01:02:31 +02:00
Lior Halphon
a7f7530eed Preparation for future AGB-0 and B support 2022-01-30 18:11:35 +02:00
Lior Halphon
3a2d028efa GDMA/PPU conflicts 2022-01-30 14:38:58 +02:00
Lior Halphon
26656de44f Improvements to GDMA 2022-01-28 23:56:26 +02:00
Lior Halphon
ab75858c86 DMA/PPU VRAM conflicts on the CGB/AGB 2022-01-17 22:07:24 +02:00
Lior Halphon
b45761146f VRAM DMA during mode 3 2022-01-16 13:50:59 +02:00
Lior Halphon
eaeeb49612 Minor stylistic changes 2022-01-14 22:26:23 +02:00
orbea
adfc329cdf gb.h: Silence -Wembedded-directive warning with -pedantic
gb.h:731:2: warning: embedding a directive within macro arguments has undefined behavior [-Wembedded-directive]
\#define GB_REWIND_FRAMES_PER_KEY 255
 ^
2022-01-14 11:40:55 -08:00
orbea
5cf71b406e gb.h: Silence -Wembedded-directive warnings with -pedantic
gb.h:400:2: warning: embedding a directive within macro arguments has undefined behavior [-Wembedded-directive]
\#ifdef GB_BIG_ENDIAN
 ^
gb.h:410:2: warning: embedding a directive within macro arguments has undefined behavior [-Wembedded-directive]
\#endif
 ^
2022-01-14 11:40:55 -08:00
Lior Halphon
d92148b461 Merge branch 'master' of https://github.com/LIJI32/SameBoy 2022-01-14 17:09:49 +02:00
Lior Halphon
4ce8e77796 More accurate OAM access timings 2022-01-14 15:07:50 +02:00
orbea
fefb81ab65 gb.h: Silence -pedantic warnings
Silences warnings such as the following when including gb.h as a dependency.

gb.h:385:6: warning: extra ';' inside a struct [-Wextra-semi]
    );
     ^
2022-01-13 20:12:58 -08:00
Lior Halphon
ec012cf9f8 is_dma_restarting hack no longer needed 2022-01-12 14:12:55 +02:00
Lior Halphon
c4a14ac4db Simplify DMA code, fix DMA read timing 2022-01-12 00:26:18 +02:00
Lior Halphon
b7f03dea8d Add CGB-A support 2022-01-05 21:55:46 +02:00
Lior Halphon
ab1d4cd26e More DMA write conflicts 2022-01-05 21:40:10 +02:00
Lior Halphon
5e7bb0f891 DMA write conflict revision differences 2022-01-04 19:59:46 +02:00
Lior Halphon
bc073e3d09 Expose PC 2021-12-30 23:53:24 +02:00
Lior Halphon
b72c2ea225 DMG palette getter 2021-12-29 13:08:46 +02:00
Lior Halphon
66f7babe86 Cache the clock rate 2021-12-26 15:50:24 +02:00
Lior Halphon
69de3f0fae Implement a PPU fast path, up to 34% performance boost 2021-12-26 01:47:59 +02:00
Lior Halphon
f3277ab8d3 Sorry C++ users 2021-12-20 18:59:51 +02:00
Lior Halphon
e9629407a5 Fix potential alignment issues 2021-12-19 00:54:29 +02:00
Lior Halphon
cdc3321c36 Add an API to allow illegal inputs 2021-12-19 00:28:24 +02:00
Lior Halphon
5127cb0022 Direct access to registers (#422) 2021-12-18 14:51:14 +02:00
Lior Halphon
c63ddbe771 Lag frame detection API (#422) 2021-12-18 01:25:06 +02:00
Lior Halphon
c3d9141b7c Replace the term sprite with object for consistency 2021-12-17 21:16:23 +02:00
Lior Halphon
c1ae129ed4 Allow hiding background/object "layers" (#422) 2021-12-17 21:12:26 +02:00
Lior Halphon
7e5e672988 RTC speed multiplier, for TAS syncing (#422) 2021-12-11 02:51:21 +02:00
Lior Halphon
a30247cf16 LCD line callback (for #422) 2021-12-10 19:49:52 +02:00
Lior Halphon
7508ddb0cf Execute callback (for #422) 2021-12-10 19:42:47 +02:00
Lior Halphon
25e3414974 Redesigned vblank callback scheduling scheme, should be more regular and less prune to various sorts of frontend DOS 2021-12-04 15:04:46 +02:00