The second half WRAM is banked on CGB, so bank 0 is only ever the first half.
If we query bank 0 for the second half, force it to bank 1. Further, VRAM bank
1 only exists on CGB, so force it to bank 0 on DMG.
* Try to correct the RTC state machine to only operate on edges
Unsure if all of this is entirely right (haven't ran any tests to confirm behavior here). Fixes RTC within Pokemon games (and maybe other games) due to the added write latch code adding a _readPins call.
* More correct behavior based on testing
* Move this init to align to struct
* Correctly handle rtc output on falling edges rather than raising edges
also correctly handle rtc output in general, even in cases outside of an rtc read cmd
_outputPins needed to be corrected here, it shouldn't be reading gpioBase here...
* Simplify
* More RTC state machine fixes
Separate out command start and command write data processing
Command start processing happens again if the command magic is invalid (note: doesn't apply to the unmapped command 5)
Ensure command data processing loops
Output 1s for commands with no actual output
* Put SIO output in states
* Try to correct light sensor too
* inc state version
* fix reserved names
* Allow truncation to work within VFileFromMemory/VFileFromConstMemory
Truncation here is limited to buffer size (allowing for shrinking but not growing the buffer size)
* Don't change VFileFromConstMemory; have VFileFromMemory write "expand" size until the buffer size
* 0 out "expanded" space
The base video size of the Game Boy core is the Super Game Boy’s resolution of 256×224 pixels.
Previously frames were exported at that size, leading to a 160×144 frame surrounded by uninitialized memory.
This assumes that the base size is always greater or equal to the current video size.
Regardless of direction, a write to GPIO data actually succeeds fully with all 4 bits. However, this does not directly touch the pin state. It instead places it into an internal write only latch. This latch asserts bits onto the pin state if direction allows for such, otherwise the other side (e.g. RTC) will be the one asserting bits (but this does not end up touching the internal write latch).
The implementation here is likely not entirely accurate for direction changes from out to in (as that depends on each external device implementation), but it should be correct for in to out changes.
