Lior Halphon
45c73e0175
Replaced the is_cgb bool with a more future compatible model enum. Removed the GB_init_cgb API and replaced it with an extended GB_init and GB_switch_model_and_reset APIs that now receive a model parameter. Increased the struct version.
2018-06-16 13:59:33 +03:00
Lior Halphon
38c0cb3323
Typo
2018-06-09 15:12:42 +03:00
Lior Halphon
f64da1864f
APU glitch: When turning the APU on while DIV's bit 4 (or 5 in double speed mode), the first DIV/APU event is skipped.
2018-06-09 15:11:20 +03:00
Lior Halphon
562b43a7c5
Notes about the DMG wave-ram glitch
2018-05-15 23:02:07 +03:00
Kyle Swanson
7bfe5de9c7
chmod -x
2018-03-28 21:37:34 -07:00
Lior Halphon
0912a30bb9
Fixed a regression in dmg_sound-2
2018-03-27 21:04:55 +03:00
Lior Halphon
c48097a484
Convert div counter to the SM mechanism
2018-02-23 13:16:05 +02:00
Lior Halphon
9802ca41dd
Components not affected by CGB’s double speed mode now operate in 8MHz mode to theoretically make advance_cycles(gb, 1) safe.
2018-02-20 21:17:12 +02:00
Lior Halphon
f79af39ea2
More accurate emulation of the APU’s analog characteristics
2018-02-16 18:01:50 +02:00
Lior Halphon
fc35111ae7
Corrected the emulated DAC’s range
2018-02-16 01:26:37 +02:00
Lior Halphon
0c231db9e7
This is probably not correct (and makes no sense from an hardware design perspective), but this correctly emulates my analog test cases and fixes the pops introduced by the last commit.
2018-02-13 23:13:15 +02:00
Lior Halphon
bfb37884e1
Inactive channels are not equivalent to channels with 0 volume.
2018-02-11 22:50:15 +02:00
Lior Halphon
afcc66fb3c
Added CPU under/over-clocking support in Core, add under-clocking hotkey in the Cocoa port, allow modifier keys to be configured as input keys in Cocoa.
2018-02-10 23:30:30 +02:00
Lior Halphon
09dd47c6de
Fixed unintentional delay in NR50 and NR51’s effects
2018-01-19 19:56:39 +02:00
Lior Halphon
37906bcd1f
Fixed sound pops in Super Mario Land 2.
2018-01-19 00:47:46 +02:00
Lior Halphon
0a76881eb6
Correctly emulating NRx4 effects on the sound envelop of the previously playing sound. Closes #19
2018-01-06 12:37:45 +02:00
Lior Halphon
a20e8a8220
Fixed bug in NR42 write that also caused memory corruption
2018-01-06 12:17:06 +02:00
Lior Halphon
a1af4c59ca
Fixed NR51 volume levels (They’re 1-8, not 0-7)
2018-01-06 11:58:49 +02:00
Lior Halphon
61f9dbd95d
Use SDL’s key mapping when available
2017-12-28 20:22:54 +02:00
Lior Halphon
c1f27d7b27
Spacing
2017-10-02 22:59:03 +03:00
Lior Halphon
d9b0576351
Emulation of NRX2-write glitches. Fixes Prehistorik Man audio.
2017-10-02 22:56:24 +03:00
Lior Halphon
67f1566b5e
Minor refinement to sweep
2017-09-23 00:23:02 +03:00
Lior Halphon
e0a6edac35
Setting sweep period to 0 cancels pending calculate event
2017-09-22 14:53:24 +03:00
Lior Halphon
2ffce49e16
Minor bugfixes related to sweeping
2017-09-22 14:39:39 +03:00
Lior Halphon
75db33559a
Current sample index (Channel 1 and 2) is only reset after turning the APU off
2017-09-22 02:25:06 +03:00
Lior Halphon
8f4cd5c412
Corrected behavior for channel 1 and 2 restart
2017-09-22 02:04:29 +03:00
Lior Halphon
882b141478
Fixed dmg_sound-1
2017-09-21 18:32:21 +03:00
Lior Halphon
2ca550273a
Fixed dmg_sound-5
2017-09-21 18:18:10 +03:00
Lior Halphon
d3c15ef6ca
Fixing APU bugs, one at a time: Blargg’s dmg_sound 8.2
2017-09-21 14:52:09 +03:00
Lior Halphon
62878fdc7a
More accurate div-event handling
2017-08-15 22:27:15 +03:00
Lior Halphon
8d011ca4b9
Accuracy improvements (Sweep)
2017-08-15 22:05:20 +03:00
Lior Halphon
d04aaddcbd
Added highpass filter
2017-08-15 21:59:11 +03:00
Lior Halphon
ca59aca4a6
Fixed a bug where writing to NR52 affected channels 1 and 2’s duty pattern in DMG mode. Fixed NR43 being written to NR44 as well.
2017-08-13 20:26:35 +03:00
Lior Halphon
36943866e2
Better click prevention
2017-08-12 23:35:18 +03:00
Lior Halphon
dba7370d6d
Turns out APU signal is inverted. This fixes Perfect Dark’s audio.
2017-08-12 20:47:55 +03:00
Lior Halphon
688991f57f
The volume envelopes and length controls are handled in different phases of the div-divider
2017-08-12 20:17:20 +03:00
Lior Halphon
4b8be255ce
Fixed some channel 4 delays, documented a not currently emulated timing quirk.
2017-08-12 19:50:39 +03:00
Lior Halphon
066efab985
In DMG mode, the length registers are not affected by turning the APU on and off. Why? Why not!
2017-08-11 22:23:03 +03:00
Lior Halphon
0e22ad8eb1
Noise channel support
2017-08-11 17:57:08 +03:00
Lior Halphon
1a8bcd314d
Accuracy improvements to sweeping (Still not complete though, more research needed)
2017-08-10 19:42:23 +03:00
Lior Halphon
ab5611119a
Accuracy improvements, especially to the length control
2017-08-02 21:14:23 +03:00
Lior Halphon
d65c2247e5
Added channel 1 and 2, fixed accuracy issues with channel 3
2017-07-27 23:11:33 +03:00
Lior Halphon
2936f7fa57
Fixed channel 3 counter behavior, verified with new tests. The DIV register ticks the APU at 512Hz.
2017-07-22 19:51:11 +03:00
Lior Halphon
a19ee1e5e0
2MHz audio downscaling support. Implemented NR50 and NR51.
2017-07-21 23:17:48 +03:00
Lior Halphon
baccf336d7
Complete rewrite of the APU. Channel 3 is complete and passes all the relevant tests from blargg’s suite, as well as PCM34-based tests. Actual sound output is basic and limited, though.
2017-07-21 19:06:55 +03:00
Lior Halphon
c59272d46d
Misc minor fixes, fixes several Mooneye-GB tests
2017-06-21 20:39:23 +03:00
Lior Halphon
6dd24e0733
Fixed hung note issue. Closes #7
2017-05-13 17:04:05 +03:00
Lior Halphon
00623d4eea
- Added audio supersampling support to greatly improve audio quality.
...
- Fixed a bug where low sampling rate or disabled sound resulted in wrong APU behavior.
- Added API to get the current number of pending samples.
- This change broke save state compatibility with v0.8 and older
Closes #8 .
2017-05-12 17:11:55 +03:00
Lior Halphon
a925ef130d
Stabilizing API: New joypad, debugger and reset APIs; internal APIs and direct struct access are no longer available without defining GB_INTERNAL. The SDL port uses the new “public” APIs, as well as most of the non-debug Cocoa code.
2017-04-17 20:16:17 +03:00
Lior Halphon
252439c1af
Fixed a deadlocking race condition that might happen when reading APU memory in the hex viewer
2016-09-21 01:59:43 +03:00
